Effects of the “all-fish” GH (growth hormone) transgene expression on resistance to Ichthyophthirius multifiliis infections in common carp, Cyprinus carpio L.

A study was undertaken on the susceptibility of the F-4 generation of "all-fish" growth hormone transgenic carp, Cyprinus carpio L, against Ichthyophthirius multifiliis infections. When 1-year old, transgenic carp, with non-transgenic carp and non-manipulated carp (controls) were split into three batches, and experimental infections were performed throughout the 3-month period. All 72 fish were successfully infected. It was shown that there was a significant difference (P<0.01) on infection level between transgenics and non-transgenics, and transgenics and controls. It possibly resulted from transgenics that had stronger non-specific immune functions. In addition, fish surface area affected significantly infection level (P<0.001). Carp with larger surface area harboured more parasites for each type of fish, but transgenic with larger surface area than non-transgenics and controls (P<0.01), loaded fewer parasites than others. Besides, the time of infection also greatly influenced (P<0.001) infection level. Results showed that there was a significant decline in parasite infectivity through October to November (P<0.001). It was likely to suggest that there existed senescence resulted in failure of any I. multifiliis isolate maintenance. Significant difference in infectivity between isolate G from grass carp and isolate H from gold fish suggested that different parasite strains may exist. (C) 2009 Elsevier B.V. All rights reserved.

20—50 MeV O~(5+)离子引起Au的L壳层X射线产生截面研究

在北京13 MV串列加速器上利用20—50MeVO5+离子研究Au的L壳层X射线产生截面.实验结果表明σ(Ll)/σ(Lα),σ(Lβ)/σ(Lα)和σ(Lγ)/σ(Lα)与ECPSSR理论计算结果符合比较好.在实验中由于较高的能量,在能量点存在能移现象.

氟离子碰撞引起的钽L壳层X射线产生截面测量

测量了20~55 MeV F5+离子和Ta原子碰撞中Ta产生的L壳层X射线。计算了Ta的L各支壳层产生截面的比值和总截面的比值。利用L壳层的辐射跃迁几率、Croster-Kroning跃迁几率和L亚壳层的荧光产额,将平面波波恩近似(PWBA)和ECPSSR理论计算的电离截面转换为L层X射线产生截面,并与实验结果进行比较。结果表明,σ(Ll)/σ(Lα)、σ(Lγ)/σ(Lα)和σ(Ltotal)/σ(Lα)与ECPSSR理论预测结果吻合较好,σ(Lβ)/σ(Lα)较两种理论预测值均偏小。

20—50MeV O5+离子引起Au的L壳层X射线产生截面研究

在北京13 MV串列加速器上利用20—50MeV O5+离子研究Au的L壳层X射线产生截面. 实验结果表明σ（Ll）/σ（Lα） ，σ（Lβ）/σ（Lα） 和σ（Lγ）/σ（Lα）与EＣＰSSR理论计算结果符合比较好.在实验中由于较高的能量,在能量点存在能移现象.

Design and Verification of the Programming Circuit in an Application-Specific FPGA

In this paper we present a methodology and its implementation for the design and verification of programming circuit used in a family of application-specific FPGAs that share a common architecture. Each member of the family is different either in the types of functional blocks contained or in the number of blocks of each type. The parametrized design methodology is presented here to achieve this goal. Even though our focus is on the programming circuitry that provides the interface between the FPGA core circuit and the external programming hardware, the parametrized design method can be generalized to the design of entire chip for all members in the FPGA family. The method presented here covers the generation of the design RTL files and the support files for synthesis, place-and-route layout and simulations. The proposed method is proven to work smoothly within the complete chip design methodology. We will describe the implementation of this method to the design of the programming circuit in details including the design flow from the behavioral-level design to the final layout as well as the verification. Different package options and different programming modes are included in the description of the design. The circuit design implementation is based on SMIC 0.13-micron CMOS technology.

A Synthesis Tool for a Tile-Based Heterogeneous FPGA

A multi-mode logic cell architecture in a tile-based heterogeneous FPGA is proposed, and a logic synthesis tool, called Vsyn, based on this architecture is presented. The logic cell architecture design and its synthesis tool development are strongly influencing each other. Any feature or parameter from one needs to be fully exercised and verified on the other. In this paper, we presented experimental results based MCNC benchmarks to show that the integration of the synthesis tool and the FPGA architecture can achieve high performance in the targeted FPGA applications. In addition, Vsyn can also target embedded special-purpose macros for the heterogeneous FPGA.