A Synthesis Tool for a Tile-Based Heterogeneous FPGA


Autoria(s): Zhang K; Yu HM; Chen SL; Liu ZL
Data(s)

2008

Resumo

A multi-mode logic cell architecture in a tile-based heterogeneous FPGA is proposed, and a logic synthesis tool, called Vsyn, based on this architecture is presented. The logic cell architecture design and its synthesis tool development are strongly influencing each other. Any feature or parameter from one needs to be fully exercised and verified on the other. In this paper, we presented experimental results based MCNC benchmarks to show that the integration of the synthesis tool and the FPGA architecture can achieve high performance in the targeted FPGA applications. In addition, Vsyn can also target embedded special-purpose macros for the heterogeneous FPGA.

A multi-mode logic cell architecture in a tile-based heterogeneous FPGA is proposed, and a logic synthesis tool, called Vsyn, based on this architecture is presented. The logic cell architecture design and its synthesis tool development are strongly influencing each other. Any feature or parameter from one needs to be fully exercised and verified on the other. In this paper, we presented experimental results based MCNC benchmarks to show that the integration of the synthesis tool and the FPGA architecture can achieve high performance in the targeted FPGA applications. In addition, Vsyn can also target embedded special-purpose macros for the heterogeneous FPGA.

zhangdi于2010-03-09批量导入

zhangdi于2010-03-09批量导入

IEEE Beijing Sect.; Chinese Inst Elect.; IEEE Electron Devices Soc.; IEEE EDS Beijing Chapter.; IEEE Solid State Circuits Soc.; IEEE Circuites & Syst Soc.; IEEE Hong Kong EDS, SSCS Chapter.; IEEE SSCS Beijing Chapter.; Japan Soc Appl Phys.; Elect Div IEEE.; URSI Commiss D.; Inst Elect Engineers Korea.; Assoc Asia Pacific Phys Soc.; Peking Univ, IEEE EDS Student Chapter.

[Zhang, Kun; Yu, Hongmin; Chen, Stanley L.; Liu, Zhongli] Chinese Acad Sci, Inst Semicond, Beijing 10083, Peoples R China

IEEE Beijing Sect.; Chinese Inst Elect.; IEEE Electron Devices Soc.; IEEE EDS Beijing Chapter.; IEEE Solid State Circuits Soc.; IEEE Circuites & Syst Soc.; IEEE Hong Kong EDS, SSCS Chapter.; IEEE SSCS Beijing Chapter.; Japan Soc Appl Phys.; Elect Div IEEE.; URSI Commiss D.; Inst Elect Engineers Korea.; Assoc Asia Pacific Phys Soc.; Peking Univ, IEEE EDS Student Chapter.

Identificador

http://ir.semi.ac.cn/handle/172111/8306

http://www.irgrid.ac.cn/handle/1471x/65851

Idioma(s)

英语

Publicador

IEEE

345 E 47TH ST, NEW YORK, NY 10017 USA

Fonte

Zhang, K;Yu, HM;Chen, SL;Liu, ZL.A Synthesis Tool for a Tile-Based Heterogeneous FPGA .见:IEEE .2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY,345 E 47TH ST, NEW YORK, NY 10017 USA ,2008,VOLS 1-4: 2321-2324

Palavras-Chave #微电子学
Tipo

会议论文