29 resultados para Industrial electronics

em Chinese Academy of Sciences Institutional Repositories Grid Portal


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This paper presents a fully integrated CMOS analog front end for a passive 900-MHz radio-frequency identification (RFID) transponder. The power supply in this front end is generated from the received RF electromagnetic energy by using an RF-dc voltage rectifier. In order to improve the compatibility with standard CMOS technology, Schottky diodes in conventional RF-dc rectifiers are replaced by diode-connected MOS transistors with zero threshold. Meanwhile, theoretical analyses for the proposed rectifier are provided and verified by both simulation and measurement results. The design considerations of the pulsewidth-modulation (PWM) demodulator and the backscatter modulator in the front end are also discussed for low-power applications. The proposed front end is implemented in a 0.35-mu m 2P4M CMOS technology. The whole chip occupies a die area of 490 x 780 mu m(2) and consumes only 2.1 mu W in reading mode under a self-generated 1.5-V supply voltage. The measurement results show that the proposed rectifier can properly operate with a - 14.7-dBm input RF power at a power conversion efficiency of 13.0%. In the proposed RFID applications, this sensitivity corresponds to 10.88-m communication distance at 4-W equivalent isotropically radiated power from a reader base station.

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A new carrier frequency offset estimation scheme in orthogonal frequency division multiplexing (OFDM) is proposed. The scheme includes coarse frequency offset estimation and fine frequency offset estimation. The coarse frequency offset estimation method we present is a improvement of Zhang's method. The estimation range of the new method is as large as the overall signal-band width. A new fine frequency offset estimation algorithm is also discussed in this paper. The new algorithm has a better performance than the Schmidl's algorithm. The system we use to calculate and simulate is based on the high rate WLAN standard adopted by the IEEE 802.11 stanidardization group. Numerical results are presented to demonstrate the performance of the proposed algorithm.

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A-new-carrier-frequency offset estimation scheme in orthogonal frequency division multiplexing (OFDM) is proposed. The scheme includes coarse frequency offset estimation and fine frequency offset estimation. The coarse frequency offset estimation method we present is a improvement of Zhang's method. The estimation range of the new method is as large as the overall signal-band width. A new fine frequency offset estimation algorithm is also discussed in this paper. The new algorithm has a better performance than the Schmidt's algorithm. The system we use to calculate and simulate is based on the high rate WLAN standard adopted by the IEEE 802.11 standardization group. Numerical results are presented to demonstrate the performance of the proposed algorithm.

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Czochralski (CZ) crystal growth process is a widely used technique in manufacturing of silicon crystals and other semiconductor materials. The ultimate goal of the IC industry is to have the highest quality substrates, which are free of point defect, impurities and micro defect clusters. The scale up of silicon wafer size from 200 mm to 300 mm requires large crucible size and more heat power. Transport phenomena in crystal growth processes are quite complex due to melt and gas flows that may be oscillatory and/or turbulent, coupled convection and radiation, impurities and dopant distributions, unsteady kinetics of the growth process, melt crystal interface dynamics, free surface and meniscus, stoichiometry in the case of compound materials. A global model has been developed to simulate the temperature distribution and melt flow in an 8-inch system. The present program features the fluid convection, magnetohydrodynamics, and radiation models. A multi-zone method is used to divide the Cz system into different zones, e.g., the melt, the crystal and the hot zone. For calculation of temperature distribution, the whole system inside the stainless chamber is considered. For the convective flow, only the melt is considered. The widely used zonal method divides the surface of the radiation enclosure into a number of zones, which has a uniform distribution of temperature, radiative properties and composition. The integro-differential equations for the radiative heat transfer are solved using the matrix inversion technique. The zonal method for radiative heat transfer is used in the growth chamber, which is confined by crystal surface, melt surface, heat shield, and pull chamber. Free surface and crystal/melt interface are tracked using adaptive grid generation. The competition between the thermocapillary convection induced by non-uniform temperature distributions on the free surface and the forced convection by the rotation of the crystal determines the interface shape, dopant distribution, and striation pattern. The temperature gradients on the free surface are influenced by the effects of the thermocapillary force on the free surface and the rotation of the crystal and the crucible.

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For efficiently cooling electronic components with high heat flux, experiments were conducted to study the flow boiling heat transfer performance of FC-72 over square silicon chips with the dimensions of 10 × 10 × 0.5 mm3. Four kinds of micro-pin-fins with the dimensions of 30 × 60, 30 × 120, 50 × 60, 50 × 120 μm2 (thickness, t × height, h) were fabricated on the chip surfaces by the dry etching technique for enhancing boiling heat transfer. A smooth surface was also tested for comparison. The experiments were made at three different fluid velocities (0.5, 1 and 2 m/s) and three different liquid subcoolings (15, 25 and 35 K). The results were compared with the previous published data of pool boiling. All micro-pin-fined surfaces show a considerable heat transfer enhancement compared with a smooth surface. Flow boiling can remarkably decrease wall superheat compared with pool boiling. At the velocities lower than 1 m/s, the micro-pin-finned surfaces show a sharp increase in heat flux with increasing wall superheat. For all surfaces, the maximum allowable heat flux, qmax, for the normal operation of LSI chips increases with fluid velocity and subcooling. For all micro-pin-finned surfaces, the wall temperature at the critical heat flux (CHF) is less than the upper limit for the reliable operation of LSI chips, 85◦C. The largest value of qmax can reach nearly 148 W/cm2 for micro-pin-finned chips with the fin height of 120 μm at the fluid velocity of 2 m/s and the liquid subcooling of 35 K. The perspectives for the boiling heat transfer experiment of the prospective micro-pin-finned sur- faces, which has been planned to be made in the Drop Tower Beijing/NMLC in the future, are also presented.

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现代制造业对双频激光干涉仪的最大可测量速度提出了越来越高的要求。最大可测量速度是双频激光干涉仪的一项重要指标,它主要受双频激光光源所输出的频差、干涉仪的光学结构以及电子带宽等因素的限制。本文从理论和实验两方面对干涉仪的最大可测量速度进行了研究,搭建了基于自由落体运动的实验装置。实验结果表明,实际最大可测量速度略低于其理论值。另外,文中还分析了上述三种因素对最大可测量速度的影响。实验装置和结果可供工业应用提供参考。