Zn-doped InGaAs Base Heterojunction Bipolar Transistors Grown by Low Pressure Metal Organic Chemical Vapor Deposition

High performance InP/InGaAs heterojunction bipolar transistors(HBTs) have been widely used in high-speed electronic devices and optoelectronic integrated circuits. InP-based HBTs were fabricated by low pressure metal organic chemical vapor deposition(MOCVD) and wet chemical etching. The sub-collector and collector were grown at 655 ℃ and other layers at 550 ℃. To suppress the Zn out-diffusion in HBT, base layer was grown with a 16-minute growth interruption. Fabricated HBTs with emitter size of 2.5×20 μm~2 showed current gain of 70~90, breakdown voltage(BV_(CE0))>2 V, cut-off frequency(f_T) of 60 GHz and the maximum relaxation frequency(f_(MAX)) of 70 GHz.

Growth of SiGe heterojunction bipolar transistor using Si2H6 gas and Ge solid sources molecular beam epitaxy

N-p-n Si/SiGe/Si heterostructure has been grown by a disilane (Si2H6) gas and Ge solid sources molecular beam epitaxy system using phosphine (PH3) and diborane (B2H6) as n- and p-type in situ doping sources, respectively. X-ray diffraction (XRD) and secondary ion mass spectroscopy (SIMS) measurements show that the grown heterostructure has a good quality, the boron doping is confined to the SiGe base layer, and the Ge has a trapezoidal profile. Postgrowth P implantation was performed to prepare a good ohmic contact to the emitter. Heterojunction bipolar transistor (HBT) has been fabricated using the grown heterostructure and a common-emitter current gain of 75 and a cut-off frequency of 20 GHz at 300 K have been obtained. (C) 2001 Elsevier Science B.V. All rights reserved.

The growth of Si/SiGe/Si structures for heterojunction bipolar transistor by gas source molecular beam epitaxy

Three n-p-n Si/SiGe/Si heterostructures with different layer thickness and doping concentration have been grown by a home-made gas source molecular-beam epitaxy (GSMBE) system using phosphine (PH3) and diborane (B2H6) as n-and p-type in situ doping sources, respectively. Heterojunction bipolar transistors (HBTs) have been fabricated using these structures and a current gain of 40 at 300 K and 62 at 77 K have been obtained. The influence of thickness and doping concentration of the deposited layers on the current gain of the HBTs is discussed. (C) 2000 Elsevier Science B.V. All rights reserved.

Effect of heavy boron doping on the electrical characteristics of SiGeHBTs

A modified version of the Jain-Roulston (J-R) model is developed that takes into account the compensation effect of B to Ge in strained SiGe layers for the first time. Based on this new model, the distribution of the bandgap narrowing (BGN) between the conduction and valence bands is calculated. The influence of this distribution on the transport characteristics of abrupt SiGe heterojunction bipolar transistors (HBTs) has been further considered by using the tunnelling and thermionic emission mechanisms instead of the drift and diffusion mechanisms at the interfaces where discontinuities in energy levels appear. The results show that our modified J-R model better fits the experimental values, and the energy band structure has a strong influence on electrical characteristics.

Effect of heavily doped boron on bandgap narrowing of strained SiGe layers

Taking into account the compensation effect of B to Ge in strained SiGe layers for the first time, the effect of heavily doped boron on the bandgap narrowing of strained SiGe layers is calculated, and the classical Jain-Roulston (J-R) model is modified. The results show that our modified J-R model well fits the experimental values. Based on the modified J-R model, the real bandgap narrowing distribution between the conduction and valence bands is further calculated, which has great influence on modelling the electrical characteristics of SiGe heterojunction bipolar transistors.

Study on Mg memory effect in npn type AlGaN/GaN HBT structures grown by MOCVD

AlGaN/GaN npn heterojunction bipolar transistor structures were grown by low-pressure MOCVD. Secondary ion mass spectroscopy (SIMS) measurements were carried out to study the Mg memory effect and redistribution in the emitter-base junction. The results indicated that there is a Mg-rich film formed in the ongrowing layer after the Cp2Mg source is switched off. The Mg-rich film can be confined in the base section by switching off the Cp2Mg source for appropriate time before the end of base growth. Low temperature growth of the undoped GaN spacer suppresses the Mg redistribution from Mg rich film. The delay rate of the Mg profile in sample C with spacer growing in low temperature is about 56 nm/decade, which becomes sharper than 80 nm/decade of the samples A and B without low temperature spacer. (C) 2005 Elsevier Ltd. All rights reserved.

High Temperature Characteristics of 3C-SiC/Si Heterojunction Diodes Grown by LPCVD

The high temperature (300～480K) characteristics of the n-3C-SiC/p-Si heterojunction diodes (HJD) fabricated by low-pressure chemical vapor deposition on Si (100) substrates are investigated.The obtained diode with best rectifying properties has 1.8×104 of ratio at room temperature,and slightly rectifying characteristics with 3.1 of rectification ratio is measured at 480K of an ambient temperature .220V of reverse breakdown voltage is acquired at 300K.Capacitance-voltage characteristics show that the abrupt junction model is applicable to the SiC/Si HJD structure and the built-in voltage is 0.75V.An ingenious equation is employed to perfectly simulate and explain the forward current density-voltage data measured at various temperatures.The 3C-SiC/Si HJD represents a promising approach for the fabrication of high quality heterojunction devices such as SiC-emitter heterojunction bipolar transistors.

Heteroepitaxial Growth and Heterojunction Characteristics of Voids-Free n-3C-SiC on p-Si(100)

Highly oriented voids-free 3C-SiC heteroepitaxial layers are grown on φ50mm Si (100) substrates by low pressure chemical vapor deposition (LPCVD). The initial stage of carbonization and the surface morphology of carbonization layers of Si(100) are studied using reflection high energy electron diffraction (RHEED) and scanning electron microscopy (SEM). It is shown that the optimized carbonization temperature for the growth of voids-free 3S-SiC on Si (100) substrates is 1100 ℃. The electrical properties of SiC layers are characterized using Van der Pauw method. The I-V, C-V, and the temperature dependence of I-V characteristics in n-3C-SiC-p-Si heterojunctions with AuGeNi and Al electrical pads are investigated. It is shown that the maximum reverse breakdown voltage of the n-3C-SiC-p-Si heterojunction diodes reaches to 220V at room temperature. These results indicate that the SiC/Si heterojunction diode can be used to fabricate the wide bandgap emitter SiC/Si heterojunction bipolar transistors (HBT's).

Optically controlled quantum dot gated transistors with high on/off ratio

We report the design and fabrication of InAs quantum dot gated transistors, which are normally-on, where the channel current can be switched off by laser illumination. Laser light at 650 nm with a power of 850 pW switches the channel current from 5 mu A to 2 pA, resulting in an on/off ratio of more than 60 dB. The switch-off mechanism and carrier dynamics are analyzed with simulated band structure.

Multiple valley couplings in nanometer Si metal-oxide-semiconductor field-effect transistors

We investigate the couplings between different energy band valleys in a metal-oxide-semiconductor field-effect transistor (MOSFET) device using self-consistent calculations of million-atom Schrodinger-Poisson equations. Atomistic empirical pseudopotentials are used to describe the device Hamiltonian and the underlying bulk band structure. The MOSFET device is under nonequilibrium condition with a source-drain bias up to 2 V and a gate potential close to the threshold potential. We find that all the intervalley couplings are small, with the coupling constants less than 3 meV. As a result, the system eigenstates derived from different bulk valleys can be calculated separately. This will significantly reduce the simulation time because the diagonalization of the Hamiltonian matrix scales as the third power of the total number of basis functions. (C) 2008 American Institute of Physics.

The bipolar doping of ZnS via native defects and external dopants

By employing first-principle total-energy calculations, a systematic study of the dopability of ZnS to be both n- and p-types compared with that of ZnO is carried out. We find that all the attempted acceptor dopants, group V substituting on the S lattice site and group I and IB on the Zn sites in ZnS, have lower ionization energies than the corresponding ones in ZnO. This can be accounted for by the fact that ZnS has relative higher valence band maximum than ZnO. Native ZnS is weak p-type under S-rich condition, as the abundant acceptor V-Zn has rather large ionization energy. Self-compensations by the formation of interstitial donors in group I and IB-doped p-type ZnS can be avoided when sample is prepared under S-rich condition. In terms of ionization energies, Li-Zn and N-S are the preferred acceptors in ZnS. Native n- type doping of ZnS is limited by the spontaneous formation of intrinsic V-Zn(2-); high efficient n-type doping with dopants is harder to achieve than in ZnO because of the readiness of forming native compensating centers and higher ionization energy of donors in ZnS. (C) 2009 American Institute of Physics. [DOI 10.1063/1.3103585]

Analog-digital and digital-analog converters using single-electron and MOS transistors

This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and metal-oxide-semiconductor (MOS) transistors. The SET/MOS hybrid ADC and DAC circuits possess the merits of the SET circuit and the MOS circuit. We obtain the SPICE macro-modeling code of the SET transistor by studying and fitting the characteristics of the SET with SPICE simulation and Monte Carlo simulation methods. The SPICE macro-modeling code is used for the simulation of the SET/MOS hybrid ADC and DAC circuits. We simulate the performances of the SET/MOS hybrid 3-b ADC and 2-b DAC circuits by using the H-SPICE simulator. The simulation results demonstrate that the hybrid circuits can perform analog-digital and digital-analog data conversion well at room temperature. The hybrid ADC and DAC circuits have advantages as-follows: 1) compared with conventional circuits, the architectures of the circuits are simpler; 2) compared with single electron transistor circuits, the circuits have much larger load capability; 3) the power dissipation of the circuits are lower than uW; 4) the data conversion rate of the circuits can exceed 100 MHz; and 5) the resolution of the ADC and DAC circuits can be increased by the pipeline architectures.

In situ doping control for growth of n-p-n Si/SiGe/Si heterojunction bipolar transistor by gas source molecular beam epitaxy

N-p-n Si/SiGe/Si heterostructures have been grown by a disilane (Si2H6) gas and Ge solid sources molecular beam epitaxy system using phosphine (PH3) and diborane (B2H6) as n- and p-type in situ doping sources, respectively. Adopting an in situ doping control technology, the influence of background B dopant on the growth of n-Si emitter layer was reduced, and an abrupt B dopant distribution from SiGe base to Si emitter layer was obtained. Besides, higher n-type doping in the surface region of emitter to reduce the emitter resist can be realized, and it did not result in the drop of growth rate of Si emitter layer in this technology. (C) 2004 Elsevier B.V. All rights reserved.

A novel hybrid phase-locked-loop frequency synthesizer using single-electron devices and CMOS transistors

This paper proposes a novel phase-locked loop (PLL) frequency synthesizer using single-electron devices (SEDs) and metal-oxide-semiconductor (MOS) field-effect transistors. The PLL frequency synthesizer mainly consists of a single-electron transistor (SET)/MOS hybrid voltage-controlled oscillator circuit, a single-electron (SE) turnstile/MOS hybrid phase-frequency detector (PFD) circuit and a SE turnstile/MOS hybrid frequency divider. The phase-frequency detection and frequency-division functions are realized by manipulating the single electrons. We propose a SPICE model to describe the behavior of the MOSFET-based SE turnstile. The authors simulate the performance of the PILL block circuits and the whole PLL synthesizer. Simulation results indicated that the circuit can well perform the operation of the PLL frequency synthesizer at room temperature. The PILL synthesizer is very compact. The total number of the transistors is less than 50. The power dissipation of the proposed PLL circuit is less than 3 uW. The authors discuss the effect of fabrication tolerance, the effect of background charge and the SE transfer accuracy on the performance of the PLL circuit. A technique to compensate parameter dispersions of SEDs is proposed.

Subband electron properties of InGaAs/InAlAs high-electron-mobility transistors with different channel chickness

Magnetotransport properties of In-0.53 GaAs/In-0.52 AlAs high electron mobility transistor (HEMT) structures with different channel thickness of 10-35 nm have been investigated in magnetic fields up to 13 T at 1.4 K. Fast Fourier transform has been employed to obtain the subband density and mobility of the two-dimensional electron gas in these HEMT structures. We found that the thickness of channel does not significantly enhance the electron density of the two-dimensional electron gas, however, it has strong effect on the proportion of electrons inhabited in different subbands. When the size of channel is 20 nm, the number of electrons occupying the excited subband, which have higher mobility, reaches the maximum. The experimental values obtained in this work are useful for the design and optimization of InGaAs/InAlAs HEMT devices.