258 resultados para La_(2-x)Sr_xCuO_4


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Two type II superlattices (SLs) InAs(2ML)/GaSb(8ML) and InAs(8ML)/GaSb(8ML) were grown on GaAs substrates by molecular-beam epitaxy. High resolution X-ray diffraction showed the periods of the two SLs were 31.2 angstrom and 57.3 angstrom, respectively. Room-temperature optical transmittance spectra showed that there were clear absorption edges at 2.1 mu m and 5 mu m for the two SLs. The SWIR and MWIR photoconductor devices were fabricated by standard lithography and etched by tartaric acid solution. The spectral response and blackbody tests were carried out at low and room temperatues. The results show that the 50% cutoff wavelengths of the two photoconductors are 2.1 mu m and 5.0 mu m respectively and D-bb* is above 2 x 10(8) cmHz(1/2)/W for two kinds of photoconductors at 77K. D-bb* is above 10(8) cmHz(1/2)/W for SWIR photoconductor at room temperature.

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InN thin films with different thicknesses are grown by metal organic chemical vapor deposition, and the dislocations, electrical and optical properties are investigated. Based on the model of mosaic crystal, by means of X-ray diffraction skew geometry scan, the edge dislocation densities of 4.2 x 10(10) cm(-2) and 6.3 x 10(10) cm(-2) are fitted, and the decrease of twist angle and dislocation density in thicker films are observed. The carrier concentrations of 9 x 10(18) cm(-3) and 1.2 x 10(18) cm(-3) are obtained by room temperature Hall effect measurement. V-N is shown to be the origin of background carriers, and the dependence of concentration and mobility on film thickness is explained. By the analysis of S-shape temperature dependence of photoluminescence peak, the defects induced carrier localization is suggested be involved in the photoluminescence. Taking both the localization and energy band shrinkage effect into account, the localization energies of 5.05 meV and 5.58 meV for samples of different thicknesses are calculated, and the decrease of the carrier localization effect in the thicker sample can be attributed to the reduction of defects.

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AlGaN/GaN heterostructure using unintentionally doped AlN/GaN superlattices (SLs) as barrier layer is grown on C-plane sapphire by metal organic vapor deposition (MOCVD). Compared with the conventional Si-doped structure, electrical property is improved. An average sheet resistance of 287.1 Omega/square and high resistance uniformity of 0.82% are obtained across the 2-inch epilayer wafer with an equivalent Al composition of 38%. Hall measurement shows that the mobility of two-dimensional electron gas (2DEG) is 1852 cm(2)/V s with a sheet carrier density of 1.2 x 10(13) cm(-2) at room temperature. The root mean square roughness (RMS) value is 0.159 nm with 5 x 5 mu m(2) scan area and the monolayer steps are clearly observed. The reason for the property improvement is discussed. (c) 2008 Elsevier Ltd. All rights reserved.

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InAs/GaSb superlattice (SL) short wavelength infrared photoconduction detectors are grown by molecular beam epitaxy on GaAs(001) semi-insulating substrates. An interfacial misfit mode AlSb quantum dot layer and a thick GaSb layer are grown as buffer layers. The detectors containing a 200-period 2ML/8ML InAs/GaSb SL active layer are fabricated with a pixel area of 800 x 800 mu m(2) without using passivation or antireflection coatings. Corresponding to the 50% cutoff wavelengths of 2.05 mu m at 77K and 2.25 mu m at 300 K, the peak detectivities of the detectors are 4 x 10(9) cm.Hz(1/2)/W at 77K and 2 x 10(8) cm.Hz(1/2)/W at 300 K, respectively.

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Effects of V/III ratio on heavily Si doped InGaAs and InP were studied using low pressure metalorganic chemical vapor deposition (LP-MOCVD) at a growth temperature of 550degreesC. In InGaAs, as the V/III ratio decreases from 256 to 64, the carrier concentration increases from 3.0 x 10(18) to 5.8 x 10(18) cm(-3), and the lattice mismatch of InGaAs to InP was observed to vary from -5.70 x10(-4) to 1.49 x 10(-3). In InP, when the V/III ratio decreases from 230 to 92, the same trend as that in Si doped InGaAs was observed that the carrier concentration increases from 9.2 x 10(18) to 1.3 x 10(19) cm(-3). The change of AsH3 was found to have stronger effect on Si incorporation in InGaAs at lower growth temperature than at higher growth temperature. (C) 2003 Elsevier B.V. All rights reserved.

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Based on free carrier plasma dispersion effect, a 2 x 2 optical switch is fabricated in a silicon-on-insulator substrate by inductively coupled-plasma technology and ion implantation. The device has a Mach-Zehnder interferometer structure, in which two directional couplers serve as the power splitter and combiner. The switch presents an insertion loss of 3.04 dB and a response time of 496 ns.

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A folding nonblocking 4 X 4 optical matrix switch in simplified-tree architecture was designed and fabricated on a silicon-on-insulator wafer. To compress chip size, switch elements (SEs) were connected by total internal reflection mirrors instead of conventional S-bends. For obtaining smooth interfaces, potassium hydroxide (KOH) anisotropic chemical etching of silicon was employed. The device has a compact size of 20 X 3.2 mm(2) and a fast response of 8 +/- 1 mu s. Power consumption of 2 x 2 SE and excess loss per mirror were 145 mW and -1.1 dB, respectively. (c) 2005 Society of Photo-Optical Instrumentation Engineers.

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To investigate the effect of radiation damage on the stability and the compressive stress of cubic boron nitride (c-BN) thin films, c-BN films with various crystalline qualities prepared by dual beam ion assisted deposition were irradiated at room temperature with 300 keV Ar+ ions over a large fluence range up to 2 x 10(16) cm(-2). Fourier transform infrared spectroscopy (FTIR) data were taken before and after each irradiation step. The results show that the c-BN films with high crystallinity are significantly more resistant against medium-energy bombardment than those of lower crystalline quality. However, even for pure c-BN films without any sp(2)-bonded BN, there is a mechanism present, which causes the transformation from pure c-BN to h-BN or to an amorphous BN phase. Additional high resolution transmission electron microscopy (HRTEM) results support the conclusion from the FTIR data. For c-BN films with thickness smaller than the projected range of the bombarding Ar ions, complete stress relaxation was found for ion fluences approaching 4 x 10(15) cm(-2). This relaxation is accompanied, however, by a significant increase of the width of c-BN FTIR TO-line. This observation points to a build-up of disorder and/or a decreasing average grain size due to the bombardment. (c) 2005 Elsevier B.V. All rights reserved.

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A folding rearrangeable nonblocking 4 x 4 optical matrix switch was designed and fabricated on silicon-on-insulator wafer. To compress chip size, switch elements (SEs) were interconnected by total internal reflection (TIR) mirrors instead of conventional S-bends. For obtaining smooth interfaces, potassium hydroxide anisotropic chemical etching of silicon was utilized to make the matrix switch for the first time. The device has a compact size of 20 x 1.6 mm(2) and a fast response of 7.5 mu s. The power consumption of each 2 x 2 SE and the average excess loss per mirror were 145 mW and -1.1 dB, respectively. Low path dependence of +/- 0.7 dB in total excess loss was obtained because of the symmetry of propagation paths in this novel matrix switch.

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A 4 x 4 strictly nonblocking thermo-optic switch matrix implemented with a 2 x 2 Mach-Zehnder switch unit was fabricated in silicon-on-insulator wafer. Insertion losses of the shortest and the longest path in the device are about 14.8 dB and 19.2 dB, respectively. The device presents a very low loss dependent on wavelength. For one switch unit, the power consumption needed for operation is measured to be 0.270 W-0.288 W and the switching time is about 13 +/- 1 mu s.

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Effects of techniques of implanting nitrogen into buried oxide on the characteristics of the partially depleted silicon-on-insulator (SOI) p-channel metal-oxide-semiconductor field-effect transistors (PMOSFETs) have been studied with three different nitrogen implantation doses, 8 x 10(15), 2 x 10(16), and 1 x 10(17) cm(-2). The experimental results show that this technology can affect the threshold voltage, channel hole mobility and output characteristics of the partially depleted SOI PMOSFETs fabricated with the given material and process. For each type of the partially depleted SOI PMOSFET with nitrided buried oxide, the absolute value of the average threshold voltage increases due to the nitrogen implantation. At the same time, the average channel hole mobility decreases because of the nitrogen implantation. In particular, with the high nitrogen implantation doses, the output characteristic curves of the tested transistors present a distinct kink effect, which normally exists in the characteristic output curves of only partially depleted SOI NMOSFETs.

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The effect of implanting nitrogen into buried oxide on the top gate oxide hardness against total irradiation does has been investigated with three nitrogen implantation doses (8 x 10(15), 2 x 10(16) and 1 x 10(17) cm(-2)) for partially depleted SOI PMOSFET. The experimental results reveal the trend of negative shift of the threshold voltages of the studied transistors with the increase of nitrogen implantation dose before irradiation. After the irradiation with a total dose of 5 x 10(5) rad(Si) under a positive gate voltage of 2V, the threshold voltage shift of the transistors corresponding to the nitrogen implantation dose 8 x 10(15) cm(-2) is smaller than that of the transistors without implantation. However, when the implantation dose reaches 2 x 10(16) and 1 x 10(17) cm(-2), for the majority of the tested transistors, their top gate oxide was badly damaged due to irradiation. In addition, the radiation also causes damage to the body-drain junctions of the transistors with the gate oxide damaged. All the results can be interpreted by tracing back to the nitrogen implantation damage to the crystal lattices in the top silicon.

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A low power consumption 2 x 2 thermo-optic switch with fast response was fabricated on silicon-on-insulator by anisotropy chemical etching. Blocking trenches were etched on both sides of the phase-shifting arms to shorten device length and reduce power consumption. Thin top cladding layer was grown to reduce power consumption and switching time. The device showed good characteristics, including a low switching power of 145 mW and a fast switching speed of 8 +/- 1 mus, respectively. Two-dimensional finite element method was applied to simulate temperature field in the phase-shifting arm instead of conventional one-dimensional method. According to the simulated result, a new two-dimensional index distribution of phase-shifting arm was determined. Consequently finite-difference beam propagation method was employed to simulate the light propagation in the switch, and calculate the power consumption as well as the switching speed. The experimental results were in good agreement with the theoretical estimations. (C) 2004 Elsevier B.V. All rights reserved.

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Based on thermo-optical effect of silicon, a 2 x 2 switch is fabricated in silicon-on-insulator by chemical etching. The switch presents an extinction ratio of 26 dB and a power consumption of 169 mW. The response time F similar to 10.5 mus.

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A compact optical switch matrix was designed, in which light circuits were folded by total internal reflective (TIR) mirrors. Two key elements, 2 x 2 switch and TIR mirror, have been fabricated on silicon-on-insulator wafer by anisotropy chemical etching. The 2 x 2 switch showed very low power consumption of 140 mW and a very high speed of 8 +/- 1 mus. An improved design for the TIR mirror was developed, and the fabricated mirror with smooth and vertical reflective facet showed low excess loss of 0.7 +/- 0.3 dB at 1.55 mum.