Performing Fast Addition and Multiplication by Transferring Single Electrons

This paper proposes novel fast addition and multiplication circuits that are based on non-binary redundant number systems and single electron (SE) devices. The circuits consist of MOSFET-based single-electron (SE) turnstiles. We use the number of electrons to represent discrete multiple-valued logic states and we finish arithmetic operations by controlling the number of electrons transferred. We construct a compact PD2,3 adder and a 12x12bit multiplier using the PD2,3 adder. The speed of the adder can be as high as 600MHz with 400nW power dissipation. The speed of the adder is regardless of its operand length. The proposed circuits have much smaller transistors than conventional circuits.

Nanoelectronic Circuit Architectures Based on Single-Electron Turnstiles

Single-electron devices (SEDs) have ultra-low power dissipation and high integration density, which make them promising candidates as basic circuit elements of the next generation VLSI circuits. In this paper, we propose two novel circuit single-electron architectures: the single-electron simulated annealing algorithm (SAA) circuit and the single-electron cellular neural network (CNN). We used the MOSFET-based single-electron turnstile [1] as the basic circuit element. The SAA circuit consists of the voltage-controlled single-electron random number generator [2] and the single-electron multiple-valued memories (SEMVs) [3]. The random-number generation and variable variations in SAA are easily achieved by transferring electrons using the single-electron turnstile. The CNN circuit used the floating-gate single-electron turnstile as the neural synapses, and the number of electrons is used to represent the cells states. These novel circuits are promising in future nanoscale integrated circuits.

Hydrogen sensors based on Pt-AlGN/AIN/GaN Schottky diode - art. no. 68291R

Pt/AlGaN/AlN/GaN Schottky diodes have been fabricated and characterized for H-2 sensing. Platinum (Pt) with a thickness of 20nm was evaporated on the sample to form the Schottky contact. The ohmic contact, formed by evaporated Ti/Al/Ni/Au metals, was subsequently annealed by a rapid thermal treatment at 860 degrees C for 30 s in N-2 ambience. Both the forward and reverse current of the device increased greatly when exposed to H-2 gas. The sensor's responses under different hydrogen concentrations from 500ppm to 10% H-2 in N-2 at 300K were investigated. A shift of 0.45V at 297K is obtained at a fixed forward current for switching from N-2 to 10% H-2 in N-2. Time response of the sensor at a fixed bias of 0.5 V was also measured. The turn-on response of the device was rapid, while the recovery of the sensor at N-2 atmosphere was rather slow. But it recovered quickly when the device was exposed to the air. The decrease in the barrier height of the diode was calculated to be about 160meV upon introduction of 10% H-2 into the ambient. The sensitivity of the sensor is also calculated. Some thermodynamics analyses have been done according to the Langmuir isotherm equation.

The effect of interposing nanocrystalline Si(B) P plus layer on the photovoltaic properties of a-Si: H tandem solar cells

Tandem amorphous silicon solar cells have attracted extensive interest because of better performance than single junction counterpart. As n/p junctions play an important role in the current transportation of tandem solar cells, it is important to design and fabricate good n/p junctions.The properties of the n/p junction of amorphous silicon (a-Si) were studied. We investigate the effect of interposing a nanocrystalline p(+) layer between n (top cell) and p (bottom cell) layers of a tandem solar cell. The crystalline volume fraction, the band gap, the conductivity and the grain size of the nanocrystalline silicon (nc-Si) p(+) layer could be modulated by changing the deposition parameters.Current transport in a-Si based n/p ("tunnel") junctions was investigated by current-voltage measurements. The voltage dependence on the resistance (V/J) of the tandem cells was examined to see if n/p junction was ohmic contact. To study the affection of different doping concentration to the properties of the nc-Si p(+) layers which varied the properties of the tunnel junctions, three nc-Si p(+) film samples were grown, measured and analyzed.

A direct-conversion mixer with a DC-offset cancellation for WLAN

This paper presents a 5GHz double-balanced mixer with DC-offset cancellation circuit for direct-conversion receiver compliant with IEEE 802.11a wireless LAN standard. The analog feedback loop is used, to eliminate the DC-offset at the output of the double-balanced mixer. The test results show that the mixer with DC-offset cancellation circuit has voltage conversion gain of 9.5dB at 5.15GHz, noise figure of 13.5dB, IIP3 of 7.6 dBm, 1.73mV DC-offset voltage and 67mW power with 3.3-V power supply. The DC-offset cancellation circuit has less than 0.1mm(2) additional area and 0.3mW added power dissipation. The direct conversion WLAN receiver has been implemented in a 0.35 mu m SiGe BiCMOS technology.

Low Power Integrated Circuits for Wireless Neural Recording Applications

A group of prototype integrated circuits are presented for a wireless neural recording micro-system. An inductive link was built for transcutaneous wireless power transfer and data transmission. Power and data were transmitted by a pair of coils on a same carrier frequency. The integrated receiver circuitry was composed of a full-wave bridge rectifier, a voltage regulator, a date recovery circuit, a clock recovery circuit and a power detector. The amplifiers were designed with a limited bandwidth for neural signals acquisition. An integrated FM transmitter was used to transmit the extracted neural signals to external equipments. 16.5 mW power and 50 bps - 2.5 Kbps command data can be received over 1 MHz carrier within 10 mm. The total gain of 60 dB was obtained by the preamplifier and a main amplifier at 0.95Hz - 13.41 KHz with 0.215 mW power dissipation. The power consumption of the 100 MHz ASK transmitter is 0.374 mW. All the integrated circuits operated under a 3.3 V power supply except the voltage regulator.

Design of Low Power Multi-Standard Active-RC Filter for WLAN and DVB-H

In this paper, a low-power, highly linear, integrated, active-RC filter exhibiting a multi-standard (IEEE 802.11a/b/g and DVB-H) application and bandwidth (3MHz, 4MHz, 9.5MHz) is present. The filter exploits digitally-controlled polysilicon resister banks and an accurate automatic tuning scheme to account for process and temperature variations. The automatic frequency calibration scheme provides better than 3% corner frequency accuracy. The Butterworth filter is design for receiver (WLAN and DVB-H mode) and transmitter (WLAN mode). The filter dissipation is 3.4 mA in RX mode and 2.3 mA (only for one path) in TX mode from 2.85-V supply. The dissipation of calibration consumes 2mA. The circuit has been fabricated in a 0.35um 47-GHz SiGe BiCMOS technology, the receiver and transmitter occupy 0.28-mm(2) and 0.16-mm(2) (calibration circuit excluded), respectively.

A 5GHz low power WLAN transceiver SiGe RFIC for personal communication terminal applications

A low-cost low-power single chip WLAN 802.11a transceiver is designed for personal communication terminal and local multimedia data transmission. It has less than 130mA current dissipation, maximal 67dB gain and can be programmed to be 20dB minimal gain. The receiver system noise figure is 6.4dB in hige-gain mode.

An 8-b 1-GSmaples/s CMOS cascaded folding and interpolating ADC

This paper presents an 8-bit low power cascaded folding and interpolating analog-to-digital converter (ADC). A reduction in the number of comparators, equal to the number of times the signal is folded, is obtained. The interleaved architecture is used to improve the sampling rate of the ADC. The circuit including a bandgap is implemented in a 0.18-mu m CMOS technology, and measures 1.47 mm X 1.47 mm (including pads). The simulation results illustrate a conversion rate of 1-GSamples/s and a power dissipation of less than 290mW.

A low power integrated CMOS transmitter for BCI system

The prototype wafer of a low power integrated CMOS Transmitter for short-range biotelemetry application has been designed and fabricated, which is prospective to be implanted in the human brain to transfer the extracted neural information to the external computer. The transmitter consists of five parts, a bandgap current regulator, a ring oscillator, a buffer, a modulator and a power transistor. High integration and low power are the most distinct criteria for such an implantable integrated circuit. The post-simulation results show that under a 3.3 V power supply the transmitter provides 100.1 MHz half-wave sinusoid current signal to drive the off-chip antenna, the output peak current range is -0.155 mA similar to 1.250 mA, and on-chip static power dissipation is low to 0.374 mW. All the performances of the transmitter satisfy the demands of wireless real-time BCI system for neural signals recording and processing.

A novel DC-DC charge pump circuit for passive RFID transponder

This paper presents a low-voltage, high performance charge pump circuit suitable for implementation in standard CMOS technologies. The proposed charge pump has been used as a part of the power supply section of fully integrated passive radio frequency identification(RFID) transponder IC, which has been implemented in a 0.35-um CMOS technology with embedded EEPROM offered by Chartered Semiconductor. The proposed DC/DC charge pump can generate stable output for RFID applications with low power dissipation and high pumping efficiency. The analytical model of the voltage multiplier, the comparison with other charge pumps, the simulation results, and the chip testing results are presented.

A direct-conversion mixer with DC-offset cancellation for IEEE 802.11a WLAN receiver

A DC-offset cancellation scheme in the 5GHz direct-conversion receiver compliant with IEEE 802.11a wireless LAN standard is described in this paper. It uses the analog feedback loop to eliminate the DC-offset at the output of the double-balanced mixer. The mixer has a simulation voltage conversion gain of IMB at 5.2GHz, noise figure of 9.67dB, IIP3 of 7.6dBm. The solution provides 39.1dB reduction according to the leakage value at LO and mixer load resistors, the additional noise figure added to mixer is less than 0.9dB, the added power dissipation is 0.1mW and was fabricated in 60GHz 0.35 mu m SiGe BiCMOS technology.

A novel low-power input-independent MOS AC/DC charge pump

This paper presents a novel fully integrated MOS AC to DC charge pump with low power dissipation and stable output for RFID applications. To improve the input sensitivity, we replaced Schottky-diodes in conventional charge pumps with MOS diodes with zero threshold, which has less process defects and is thus more compatible with other circuits. The charge pump in a RFID transponder is implemented in a 0.35um CMOS technology with 0.24 sq mm die size. The analytical model of the charge pump and the simulation results are presented.

Quantum well infrared photodetector simultaneously working in two atmospheric windows

We have demonstrated a two-contact quantum well infrared photodetector (QWIP) exhibiting simultaneous photoresponse in both the mid- and the long-wavelength atmospheric windows of 3-5 mu m and of 8-12 mu m. The structure of the device was achieved by sequentially growing a mid-wavelength QWIP part followed by a long-wavelength QWIP part separated by an n-doped layer. Compared with the conventional dual-band QWIP device utilizing three ohmic contacts, our QWIP is promising to greatly facilitate two-color focal plane array (FPA) fabrication by reducing the number of the indium bumps per pixel from three to one just like a monochromatic FPA fabrication and to increase the FPA fill factor by reducing one contact per pixel; another advantage may be that this QWIP FPA boasts broadband detection capability in the two atmospheric windows while using only a monochromatic readout integrated circuit. We attributed this simultaneous broadband detection to the different distributions of the total bias voltage between the mid- and long-wavelength QWIP parts.

Room temperature operation of photonic-crystal distributed-feedback quantum cascade lasers with single longitudinal and lateral mode performance

We demonstrate room temperature operation of photonic-crystal distributed-feedback quantum cascade lasers emitting at 4.7 mu m. A rectangular photonic crystal lattice perpendicular to the cleaved facet was defined using holographic lithography. The anticrossing of the index- and Bragg-guided dispersions of rectangular lattice forms the band-edge mode with extended mode volume and reduced group velocity. Utilizing this coupling mechanism, single mode operation with a near-diffractive-limited divergence angle of 12 degrees is obtained for 33 mu m wide devices in a temperature range of 85-300 K. The reduced threshold current densities and improved heat dissipation management contribute to the realization of devices' room temperature operation.