123 resultados para Memory -- Testing


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A simple method of testing deep aspheric surfaces is presented. The apparatus consists of a Twyman-Green interferometer and a liquid compensatory container. Two lenses, one with spherical surfaces and the other with a spherical surface and an aspheric surface, were tested by using this method. The device is very simple and easy to assemble. (C) 1998 Society of Photo-Optical Instrumentation Engineers.

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A novel design of 100GHz-spaced 16channel arrayed-waveguide grating (AWG) based on silica-on-silicon chip is reported.AWG is achieved by adding a Y-branch to the AWG and arranging the input/output channel in a neat row,so the whole configuration can be aligned and packaged using only one fiber-array.This configuration can decrease the device's size,enlarge the minimum radius of curvature,save time on polishing and alignment,and reduce the chip's fabrication cost.

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It is well known that the storage capacity may be large if all memory patterns are orthogonal to each other. In this paper, a clear description is given about the relation between the dimension N and the maximal number of orthogonal vectors with components +/-1, and also the conception of attractive index is proposed to estimate the basin of attraction. Theoretic analysis and computer simulation show that each memory pattern's basin of attraction contains at least one Hamming ball when the storage capacity is less than 0.33N which is better than usual 0.15 N.

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Large area (25 mm(2)) silicon drift detectors and detector arrays (5x5) have been designed, simulated, and fabricated for X-ray spectroscopy. On the anode side, the hexagonal drift detector was designed with self-biasing spiral cathode rings (p(+)) of fixed resistance between rings and with a grounded guard anode to separate surface current from the anode current. Two designs have been used for the P-side: symmetric self-biasing spiral cathode rings (p(+)) and a uniform backside p(+) implant. Only 3 to 5 electrodes are needed to bias the detector plus an anode for signal collection. With graded electrical potential, a sub-nanoamper anode current, and a very small anode capacitance, an initial FWHM of 1.3 keV, without optimization of all parameters, has been obtained for 5.9 keV Fe-55 X-ray at RT using a uniform backside detector.

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IEECAS SKLLQG

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A nonvolatile write-once-read-many-time (WORM-time) memory device based on poly(N-vinylcarbazole) (PVK) films was realized by thermally annealing. The device can be fabricated using a simple spin coat method. It was found that the control of PVK film surface morphology by thermally annealing plays an important role in achieving the WORM memory properties. The memory device showed an ON/OFF current ratio as high as 10(4) and the retention time was over 2000 s without degradation.

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We realized write-once-read-many-times (WORM) memory devices based on pentacene and demonstrated that the morphology control of the vacuum deposited pentacene thin film is greatly important for achieving the unique nonvolatile memory properties. The resulted memory devices show a high ON/OFF current ratio (10(4)), long retention time (over 12 h), and good storage stability (over 240 h). The reduction of the barrier height caused by a large interface dipole and the damage of the interface dipole under a critical bias voltage have been used to explain the transition processes.

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Negative differential resistance (NDR) and memory phenomenon have been realized in current-voltage (I-V) characteristics of indium tin oxide/tris(8-hydroxyquinoline) aluminum/aluminum devices. The I-V curves have been divided into three operational regions that are associated with different working regimes of the devices: (i) bistable region, (ii) NDR region, and (iii) monotonic region. The bistable region disappeared after a couple of voltage sweeps from zero to a positive voltage. The bistable nature can be reinstated by applying a suitable negative voltage.

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Organic thin-film transistor memory devices were realized by inserting a layer of nanoparticles (such as Ag or CaF2) between two Nylon 6 gate dielectrics as the floating gate. The transistor memories were fabricated on glass substrates by full thermal deposition. The transistors exhibit significant hysteresis behavior in current-voltage characteristics, due to the separated Ag or CaF2 nanoparticle islands that act as charge trap centers. The mechanism of the transistor memory operation was discussed.