A Complex BPF with On Chip Auto-tuning Architecture for Low-IF Receivers

A 3(rd) order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18 mu m standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3(rd) order harmonic input intercept point (IIP3) is larger than 19dBm, with 50 Omega as the source impedance. The input referred noise is about 80 mu V-rms. The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28x0.22mm(2), less than 1/8 of that of the main-filter which is 0.92x0.59mm(2). After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.

An adaptive frequency synthesizer architecture reducing reference sidebands

An adaptive phase-locked loop (PLL) frequency synthesizer architecture for reducing reference sidebands at the output of the frequency synthesizer is described. The architecture combines two tuning loops: one is the main loop for locking the PLL frequency synthesizer and operating all the time, the other one is auxiliary loop for reducing reference sidebands and operating only when the main loop is closely locked. A 1.8V 1GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a 0.18um CMOS process. The suppression of the reference sidebands of the proposed frequency synthesizer is 13.8dB more than that of the general frequency synthesizer.

A Novel Architecture of Vision Chip for Fast Traffic Lane Detection and FPGA Implementation

This paper presents a novel architecture of vision chip for fast traffic lane detection (FTLD). The architecture consists of a 32*32 SIMD processing element (PE) array processor and a dual-core RISC processor. The PE array processor performs low-level pixel-parallel image processing at high speed and outputs image features for high-level image processing without I/O bottleneck. The dual-core processor carries out high-level image processing. A parallel fast lane detection algorithm for this architecture is developed. The FPGA system with a CMOS image sensor is used to implement the architecture. Experiment results show that the system can perform the fast traffic lane detection at 50fps rate. It is much faster than previous works and has good robustness that can operate in various intensity of light. The novel architecture of vision chip is able to meet the demand of real-time lane departure warning system.

Performance of an embedded optical vector matrix multiplication processor architecture

An embedded architecture of optical vector matrix multiplier (OVMM) is presented. The embedded architecture is aimed at optimising the data flow of vector matrix multiplier (VMM) to promote its performance. Data dependence is discussed when the OVMM is connected to a cluster system. A simulator is built to analyse the performance according to the architecture. According to the simulation, Amdahl's law is used to analyse the hybrid opto-electronic system. It is found that the electronic part and its interaction with optical part form the bottleneck of system.

Superconductivity in Iron Telluride Thin Films under Tensile Stress

By realizing in thin films a tensile stress state, superconductivity of 13 K was introduced into FeTe, a nonsuperconducting parent compound of the iron pnictides and chalcogenides, with a transition temperature higher than that of its superconducting isostructural counterpart FeSe. For these tensile stressed films, superconductivity is accompanied by a softening of the first-order magnetic and structural phase transition, and also, the in-plane extension and out-of-plane contraction are universal in all FeTe films independent of the sign of the lattice mismatch, either positive or negative. Moreover, the correlations were found to exist between the transition temperatures and the tetrahedra bond angles in these thin films.

Pipeline Architecture and Parallel Computation-Based Real-Time Stereovision Tracking System for Surgical Navigation

This paper studies the development of a real-time stereovision system to track multiple infrared markers attached to a surgical instrument. Multiple stages of pipeline in field-programmable gate array (FPGA) are developed to recognize the targets in both left and right image planes and to give each target a unique label. The pipeline architecture includes a smoothing filter, an adaptive threshold module, a connected component labeling operation, and a centroid extraction process. A parallel distortion correction method is proposed and implemented in a dual-core DSP. A suitable kinematic model is established for the moving targets, and a novel set of parallel and interactive computation mechanisms is proposed to position and track the targets, which are carried out by a cross-computation method in a dual-core DSP. The proposed tracking system can track the 3-D coordinate, velocity, and acceleration of four infrared markers with a delay of 9.18 ms. Furthermore, it is capable of tracking a maximum of 110 infrared markers without frame dropping at a frame rate of 60 f/s. The accuracy of the proposed system can reach the scale of 0.37 mm RMS along the x- and y-directions and 0.45 mm RMS along the depth direction (the depth is from 0.8 to 0.45 m). The performance of the proposed system can meet the requirements of applications such as surgical navigation, which needs high real time and accuracy capability.

Pipeline Architecture and Parallel Computation-Based Real-Time Stereovision Tracking System for Surgical Navigation

This paper studies the development of a real-time stereovision system to track multiple infrared markers attached to a surgical instrument. Multiple stages of pipeline in field-programmable gate array (FPGA) are developed to recognize the targets in both left and right image planes and to give each target a unique label. The pipeline architecture includes a smoothing filter, an adaptive threshold module, a connected component labeling operation, and a centroid extraction process. A parallel distortion correction method is proposed and implemented in a dual-core DSP. A suitable kinematic model is established for the moving targets, and a novel set of parallel and interactive computation mechanisms is proposed to position and track the targets, which are carried out by a cross-computation method in a dual-core DSP. The proposed tracking system can track the 3-D coordinate, velocity, and acceleration of four infrared markers with a delay of 9.18 ms. Furthermore, it is capable of tracking a maximum of 110 infrared markers without frame dropping at a frame rate of 60 f/s. The accuracy of the proposed system can reach the scale of 0.37 mm RMS along the x- and y-directions and 0.45 mm RMS along the depth direction (the depth is from 0.8 to 0.45 m). The performance of the proposed system can meet the requirements of applications such as surgical navigation, which needs high real time and accuracy capability.

Layered Architecture for Secure E-Commerce Applications

We present a layered architecture for secure e-commerce applications and protocols with fully automated dispute-resolution process, robust to communication failures and malicious faults. Our design is modular, with precise yet general-purpose interfaces and functionalities, and allows usage as an underlying secure service to different e-commerce, e-banking and other distributed systems. The interfaces support diverse, flexible and extensible payment scenarios and instruments, including direct buyer-seller payments as well as (the more common) indirect payments via payment service providers (e.g. banks). Our design is practical, efficient, and ensures reliability and security under realistic failure and delay conditions.

CALCULATED ELECTRONIC AND MAGNETIC-STRUCTURES OF THE NEW TERNARY RARE-EARTH IRON NITRIDE ND2FE17N3

The electronic and magnetic structures of Nd2Fe17 and Nd2Fe17N3 have been calculated using the first-principle, spin-polarized orthogonalized linear combination of atomic orbitals method. Comparative studies of the two materials reveal important effects of the nitrogen atoms (at 9e site) on the electronic and magnetic structures. Results are presented for the total density of states, site-projected partial density of states and the spin magnetic moments on four nonequivalent Fe sites. The highest magnetic moments are found to be located on the 6c site for Nd2Fe17 and on the 9d site for Nd2Fe17N3, in agreement with the neutron and Mossbauer experiments. The variation trends of the magnetic moments on different Fe sites are discussed in terms of the separation between Fe and N atoms. Compared with Nd2Fe17, an increase in the exchange splitting of the Fe d band is found in Nd2Fe17N3, which accounts for its higher Curie temperature as observed in experiments. The calculated results show that the nitrogen atoms are charge acceptors in these compounds.

THE STUDY OF MICROSTRUCTURE IN IRON-DOPED AND SULFUR-DOPED INP CRYSTALS BY MEANS OF HREM AND COMPUTER-SIMULATION

The microstructures in iron- and sulphur-doped InP crystals were studied using both electron microscopy and electron diffraction. A modulated structure has been found in S-doped InP crystal, where the commensurate modulations corresponded to periodicities of 0.68 nm and 0.7 nm in real space and were related to the reflections of the cubic lattice in [111] and [113BAR] directions; they were indexed as q111* = 1/2(a* + b* + c*) and q113BAR* = 1/4(-a* - b* + 3c*), respectively. Single atomic layers of iron precipitate were observed, with preferred orientations along which precipitates are formed. Simulated calculations by means of the dynamical theory of electron diffraction using models for the precipitate structure were in good agreement with our experimental results. The relation between the modulated structure and the precipitates is also discussed.

PHOTOINDUCED CHANGES OF HYDROGEN-BONDING IN SEMIINSULATING IRON-DOPED INDIUM-PHOSPHIDE

After illumination with 1-1.3 eV photons during cooling-down, metastable PH modes are observed by IR absorption at 5 K in semi-insulating InP:Fe. They correlate with the photo-injection of holes, but not with a change of the charge state of the K-related centres present at equilibrium. They are explained by a change of the bonding of H, induced by hole trapping, from IR-inactive centres to PH-containing centres, stable only below 80 K. One metastable centre has well-defined geometrical parameters and the other one could be located in a region near from the interface with (Fe,P) precipitates.

VLSI architecture of a K-best detector for MIMO--OFDM wireless communication systems

The K-best detector is considered as a promising technique in the MIMO-OFDM detection because of its good performance and low complexity. In this paper, a new K-best VLSI architecture is presented. In the proposed architecture, the metric computation units (MCUs) expand each surviving path only to its partial branches, based on the novel expansion scheme, which can predetermine the branches' ascending order by their local distances. Then a distributed sorter sorts out the new K surviving paths from the expanded branches in pipelines. Compared to the conventional K-best scheme, the proposed architecture can approximately reduce fundamental operations by 50% and 75% for the 16-QAM and the 64-QAM cases, respectively, and, consequently, lower the demand on the hardware resource significantly. Simulation results prove that the proposed architecture can achieve a performance very similar to conventional K-best detectors. Hence, it is an efficient solution to the K-best detector's VLSI implementation for high-throughput MIMO-OFDM systems.