Analysis of expression of the binary toxin genes from Bacillus sphaericus in Anabaena and the potential in mosquito control

Anabaena strains expressing the binary toxin genes of Bacillus sphaericus produce high larvicidal activity with living cells. Western blot analysis showed that the 51-kDa and 42-kDa toxin proteins were stable in Anabaena. When a DNA fragment upstream of the 51-kDa protein gene was deleted, the toxicity was reduced by over a hundred-fold, whereas deletions at the coding regions showed that the cooperation of the two proteins expressed in Anabaena is essential for the larvicidal activity. Outdoor tests showed that the genetically altered Anabaena could keep containers with natural water from being inhabited by Culex larvae for over 2 months.

Compact Reconfigurable Binary-Decision-Diagram Logic Circuit on a GaAs Nanowire Network

We describe a reconfigurable binary-decision-diagram logic circuit based on Shannon's expansion of Boolean logic function and its graphical representation on a semiconductor nanowire network. The circuit is reconfigured by using programmable switches that electrically connect and disconnect a small number of branches. This circuit has a compact structure with a small number of devices compared with the conventional look-up table architecture. A variable Boolean logic circuit was fabricated on an etched GaAs nanowire network having hexagonal topology with Schottky wrap gates and SiN-based programmable switches, and its correct logic operation together with dynamic reconfiguration was demonstrated.

Compact non-binary fast adders using single-electron devices

This paper proposes compact adders that are based on non-binary redundant number systems and single-electron (SE) devices. The adders use the number of single electrons to represent discrete multiple-valued logic state and manipulate single electrons to perform arithmetic operations. These adders have fast speed and are referred as fast adders. We develop a family of SE transfer circuits based on MOSFET-based SE turnstile. The fast adder circuit can be easily designed by directly mapping the graphical counter tree diagram (CTD) representation of the addition algorithm to SE devices and circuits. We propose two design approaches to implement fast adders using SE transfer circuits the threshold approach and the periodic approach. The periodic approach uses the voltage-controlled single-electron transfer characteristics to efficiently achieve periodic arithmetic functions. We use HSPICE simulator to verify fast adders operations. The speeds of the proposed adders are fast. The numbers of transistors of the adders are much smaller than conventional approaches. The power dissipations are much lower than CMOS and multiple-valued current-mode fast adders. (C) 2009 Elsevier Ltd. All rights reserved.

incomplete exponential sums over galois rings with applications to some binary sequences derived from z(2l)

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