Effects of indium ion implantation on the total dose hardness of fully depleted SOI NMOSFET

In this work, we investigate the effects of the indium ion implantation towards the back-channel interface on the total dose hardness of the n-channel SOI MOSFET. The results show that the indium implant has slight impact on the normal threshold voltage while preserving low leakage current after irradiation. The advantage is attributed to the narrow as-implanted and postanneal profile of the indium implantation. Two-dimensional simulations have been used to understand the physical mechanisms of the effects.

Modelling and analysis of modal behaviour in SOI slot waveguides

Mode behaviour for SOI slot waveguides is modelled and analysed using a numerical full vectorial method based on the film mode matching method (MMM). Only the quasi-TE mode is investigated. Waveguide heights and slot widths, as well as silicon widths are properly chosen with respect to the single mode behaviour in the slot region. Comparison between the effective index method and our side loss method shows that our single mode condition is creditable. The optical power confinement in slot region for the quasi-TE mode is also studied and presented. We demonstrate that the maximum achievable optical power confinement P-slot and the maximum normalized average optical intensity I-slot are 42% and 26 mu m(-2), respectively.

Fabrication of triplexers based on flattop SOI AWG

A triplexer is fabricated based on SOI arrayed waveguide gratings (AWGs). Three wavelengths of the triplexer operate at different diffraction orders of an arrayed waveguide grating. The signals of 1490 nm and 1550 nm, which are input from central input waveguide of an AWG, are demultiplexed and the signal of 1310 nm, which is input from central output waveguide of an AWG, is uploaded. The tested results show that the downloaded and uploaded signals have flat-top response. The insertion loss is 9 dB on chip, the nonadjacent crosstalk is less than -30 dB for 1490 nm and 1301 nm, and is less than -25 dB for 1550 nm, the 3 dB bandwidth equates that of the input light source.

A photonic wire-based directional coupler based on SOI

A photonic wire-based directional coupler based on SOI was fabricated by e-beam lithography (EBL) and the inductively coupled plasma (ICP) etching method. The size of the sub-micron waveguide is 0.34 mu m x 0.34 mu m, and the length in the coupling region and the separation between the two parallel waveguides are 410 and 0.8 mu m, respectively. The measurement results are in good agreement with the results simulated by 3D finite-difference time-domain method. The transmission power from two output ports changed reciprocally with about 23 nm wavelength spacing between the coupled and direct ports. The extinction ratio of the device was between 5 and 10 dB, and the insertion loss of the device in the wavelength range 1520-1610 nm was between 22 and 24 dB, which included an about 18.4 +/- 0.4 dB coupling loss between the taper fibers and the polished sides of the device. (c) 2008 Elsevier B.V. All rights reserved.

Paired interference 3-dB coupler based on SOI rib waveguides with anisotropic chemical wet etching

A 3-dB paired interference (PI) optical coupler in silicon-on-insulator (SOI) based on rib waveguides with trapezoidal cross section was designed with simulation by a modified finite-difference beam propagation method (FD-BPM) and fabricated by potassium hydroxide (KOH) anisotropic chemical wet etching. Theoretically, tolerances of width, length, and port distance are more than 1, 100, and 1 mu m, respectively. Smooth interface was obtained with the propagation loss of 1.1 dB/cm at the wavelength of 1.55 mu m. The coupler has a good uniformity of 0.2 dB and low excess loss of less than 2 dB.

Multi-channel micro neural probe fabricated with SOI

Silicon-on-insulator (SOI) substrate is widely used in micro-electro-mechanical systems (MEMS). With the buried oxide layer of SOI acting as an etching stop, silicon based micro neural probe can be fabricated with improved uniformity and manufacturability. A seven-record-site neural probe was formed by inductive-coupled plasma (ICP) dry etching of an SOI substrate. The thickness of the probe is 15 mu m. The shaft of the probe has dimensions of 3 mmx100 mu mx15 mu m with typical area of the record site of 78.5 mu m(2). The impedance of the record site was measured in-vitro. The typical impedance characteristics of the record sites are around 2 M Omega at 1 kHz. The performance of the neural probe in-vivo was tested on anesthetic rat. The recorded neural spike was typically around 140 mu V. Spike from individual site could exceed 700 mu V. The average signal noise ratio was 7 or more.

An investigation of the mode characteristics of SOI submicron rib waveguides using the film mode matching method

The mode characteristics of SOI (silicon-on-insulator) submicron rib waveguides are very different from those of micrometer-sized ones. Using the full-vector film mode matching method, we propose a simple criterion to determine whether a waveguide mode is guided or not. The single-mode condition for deep-etched waveguides is obtained using this criterion. We also obtain the inherent TM mode leakage and sharp cancelation effects due to TE-TM mode coupling in shallow-etched rib waveguides from numerical simulations, which agree well with the analytical results based on total internal reflection and interference theories.

1 x 4 Ge-on-SOI PIN Photodetector Array for Parallel Optical Interconnects

High-quality Ge film was epitaxially grown on silicon on insulator using the ultrahigh vacuum chemical vapor deposition. In this paper, we demonstrated that the efficient 1 4 germanium-on-silicon p-i-n photodetector arrays with 1.0 mu m Ge film had a responsivity as high as 0.65 A/W at 1.31 mu m and 0.32 A/W at 1.55 mu m, respectively. The dark current density was about 0.75 mA/cm(2) at 0 V and 13.9 mA/cm(2) at 1.0 V reverse bias. The detectors with a diameter of 25 mu m were measured at 1550 nm incident light under 0 V bias, and the result showed that the 3-dB bandwidth is 2.48 GHz. At a reverse bias of 3 V, the bandwidth is about 13.3 GHz. The four devices showed a good consistency.

Low power 2 x 2 thermo-optic SOI waveguide switch fabricated by anisotropy chemical etching

A 2 x 2 thermo-optic (TO) Mach-Zehnder (MZ) switch based on silicon waveguides with large cross section was designed and fabricated on silicon-on-insulator (SOI) wafer. The multi-mode interferometers (MMI) were used as power splitter and combiner in MZ structure. In order to get smooth interface, anisotropy chemical wet-etching of silicon was used to fabricate the waveguides instead of dry-etching. Additional grooves were introduced to reduce power consumption. The device has a low switching power of 235 mW and a switching speed of 60 mus. (C) 2004 Elsevier B.V. All rights reserved.

Rearrangeable nonblocking SOI waveguide thermooptic 4x4 switch matrix with low insertion loss and fast response

A rearrangeable nonblocking 4 x 4 thermooptic silicon-on-insulator waveguide switch matrix at 1.55-mu m integrated spot size converters is designed and fabricated for the first time. The insertion losses and polarization-dependent losses of the four channels are less than 10 and 0.8 dB, respectively. The extinction ratios are larger than 20 dB. The response times are 4.6 mu s for rising edge and 1.9 mu s for failing edge.

Integrated folding 4x4 optical matrix switch with total internal reflection mirrors on SOI by anisotropic chemical etching

A folding rearrangeable nonblocking 4 x 4 optical matrix switch was designed and fabricated on silicon-on-insulator wafer. To compress chip size, switch elements (SEs) were interconnected by total internal reflection (TIR) mirrors instead of conventional S-bends. For obtaining smooth interfaces, potassium hydroxide anisotropic chemical etching of silicon was utilized to make the matrix switch for the first time. The device has a compact size of 20 x 1.6 mm(2) and a fast response of 7.5 mu s. The power consumption of each 2 x 2 SE and the average excess loss per mirror were 145 mW and -1.1 dB, respectively. Low path dependence of +/- 0.7 dB in total excess loss was obtained because of the symmetry of propagation paths in this novel matrix switch.

Fabrication of a 4x4 strictly nonblocking SOI switch matrix

A 4 x 4 strictly nonblocking thermo-optical switch matrix based on Mach-Zehnder (MZ) switching unit was designed and fabricated in silicon-on-insulator (SOI) wafer. The paired multi-mode interferometers (MMI) were used as power splitters and combiners in MZ structures. The device presents an average insertion loss of 17 dB and an average crosstalk of 16.5 dB. The power consumption needed for operation is reduced to 0.288 W by adding isolating trenches. The switching time of the device is about 15 mu s, which is much faster than that of silica-based switches. (C) 2005 Elsevier B.V. All rights reserved.

Research progresses of SOI optical waveguide devices and integrated optical switch matrix

SOI (silicon-on-insulator) is a new material with a lot of important performances such as large index difference, low transmission loss. Fabrication processes for SOI based optoelectronic devices are compatible with conventional IC processes. Having the potential of OEIC monolithic integration, SOI based optoelectronic devices have shown many good characteristics and become more and more attractive recently. In this paper, the recent progresses of SOI waveguide devices in our research group are presented. By highly effective numerical simulation, the single mode conditions for SOI rib waveguides with rectangular and trapezoidal cross-section were accurately investigated. Using both chemical anisotropic wet etching and plasma dry etching techniques, SOI single mode rib waveguide, MMI coupler, VOA (variable optical attenuator), 2X2 thermal-optical switch were successfully designed and fabricated. Based on these, 4X4 and 8X8 SOI optical waveguide integrated switch matrixes are demonstrated for the first time.

Fabrication of arrayed waveguide grating based on SOI material

An arrayed waveguide grating based on SOI material was fabricated by inductive coupled plasma (ICP) etching technology. The central wavelength of the device was designed at 1.5509 mu m and the channel spacing was 200 GHz. Comparing with the values of the design, the differences of the central wavelength and the channel spacing in the test were 0.28 nm and 0.02 nm, respectively. The adjacent channel crosstalk was about 10 dB, and the uniformity of the five channels' insertion loss was only 0.7 dB. The results show that the device can be used as a demultiplexer.

Fabrication and analysis of 2x2 thermo-optic SOI waveguide switch with low power consumption and fast response by anisotropy chemical etching

A low power consumption 2 x 2 thermo-optic switch with fast response was fabricated on silicon-on-insulator by anisotropy chemical etching. Blocking trenches were etched on both sides of the phase-shifting arms to shorten device length and reduce power consumption. Thin top cladding layer was grown to reduce power consumption and switching time. The device showed good characteristics, including a low switching power of 145 mW and a fast switching speed of 8 +/- 1 mus, respectively. Two-dimensional finite element method was applied to simulate temperature field in the phase-shifting arm instead of conventional one-dimensional method. According to the simulated result, a new two-dimensional index distribution of phase-shifting arm was determined. Consequently finite-difference beam propagation method was employed to simulate the light propagation in the switch, and calculate the power consumption as well as the switching speed. The experimental results were in good agreement with the theoretical estimations. (C) 2004 Elsevier B.V. All rights reserved.