Analog-digital and digital-analog converters using single-electron and MOS transistors

This paper proposes two kinds of novel single-electron analog-digital conversion (ADC) and digital-analog conversion (DAC) circuits that consist of single-electron transistors (SETs) and metal-oxide-semiconductor (MOS) transistors. The SET/MOS hybrid ADC and DAC circuits possess the merits of the SET circuit and the MOS circuit. We obtain the SPICE macro-modeling code of the SET transistor by studying and fitting the characteristics of the SET with SPICE simulation and Monte Carlo simulation methods. The SPICE macro-modeling code is used for the simulation of the SET/MOS hybrid ADC and DAC circuits. We simulate the performances of the SET/MOS hybrid 3-b ADC and 2-b DAC circuits by using the H-SPICE simulator. The simulation results demonstrate that the hybrid circuits can perform analog-digital and digital-analog data conversion well at room temperature. The hybrid ADC and DAC circuits have advantages as-follows: 1) compared with conventional circuits, the architectures of the circuits are simpler; 2) compared with single electron transistor circuits, the circuits have much larger load capability; 3) the power dissipation of the circuits are lower than uW; 4) the data conversion rate of the circuits can exceed 100 MHz; and 5) the resolution of the ADC and DAC circuits can be increased by the pipeline architectures.

A nanowire magnetic memory cell based on a periodic magnetic superlattice

We analyse the operation of a semiconductor nanowire-based memory cell. Large changes in the nanowire conductance result when the magnetization of a periodic array of nanoscale magnetic gates, which comprise the other key component of the memory cell, is switched between distinct configurations by an external magnetic field. The resulting conductance change provides the basis for a robust memory effect, which can be implemented in a semiconductor structure compatible with conventional semiconductor integrated circuits.

A 10-GHz bandwidth electroabsorption modulated laser by ultra-low-pressure selective area growth

A novel integration technique has been developed using band-gap energy control of InGaAsP/InGaAsP multi-quantum-well (MQW) structures during simultaneous ultra-low-pressure (22 mbar) selective-area-growth (SAG) process in metal-organic chemical vapour deposition. A fundamental study of the controllability of band gap energy by the SAG method is performed. A large band-gap photoluminescence wavelength shift of 83nm is obtained with a small mask width variation (0-30 mu m). The method is then applied to fabricate an MQW distributed-feedback laser monolithically integrated with an electroabsorption modulator. The experimental results exhibit superior device characteristics with low threshold of 19 mA, over 24 dB extinction ratio when coupled into a single mode fibre. More than 10GHz modulation bandwidth is also achieved, which demonstrates that the ultra-low-pressure SAG technique is a promising approach for high-speed transmission photonic integrated circuits.

Novel folding large-scale optical switch matrix with total internal reflection mirrors on silicon-on-insulator by anisotropy chemical etching

A compact optical switch matrix was designed, in which light circuits were folded by total internal reflective (TIR) mirrors. Two key elements, 2 x 2 switch and TIR mirror, have been fabricated on silicon-on-insulator wafer by anisotropy chemical etching. The 2 x 2 switch showed very low power consumption of 140 mW and a very high speed of 8 +/- 1 mus. An improved design for the TIR mirror was developed, and the fabricated mirror with smooth and vertical reflective facet showed low excess loss of 0.7 +/- 0.3 dB at 1.55 mum.

A novel hybrid phase-locked-loop frequency synthesizer using single-electron devices and CMOS transistors

This paper proposes a novel phase-locked loop (PLL) frequency synthesizer using single-electron devices (SEDs) and metal-oxide-semiconductor (MOS) field-effect transistors. The PLL frequency synthesizer mainly consists of a single-electron transistor (SET)/MOS hybrid voltage-controlled oscillator circuit, a single-electron (SE) turnstile/MOS hybrid phase-frequency detector (PFD) circuit and a SE turnstile/MOS hybrid frequency divider. The phase-frequency detection and frequency-division functions are realized by manipulating the single electrons. We propose a SPICE model to describe the behavior of the MOSFET-based SE turnstile. The authors simulate the performance of the PILL block circuits and the whole PLL synthesizer. Simulation results indicated that the circuit can well perform the operation of the PLL frequency synthesizer at room temperature. The PILL synthesizer is very compact. The total number of the transistors is less than 50. The power dissipation of the proposed PLL circuit is less than 3 uW. The authors discuss the effect of fabrication tolerance, the effect of background charge and the SE transfer accuracy on the performance of the PLL circuit. A technique to compensate parameter dispersions of SEDs is proposed.

Room-temperature continuous-wave electrically injected InP-GaInAsP equilateral-triangle-resonator lasers

Equilateral-triangle-resonator (ETR) microlasers with an output waveguide connected to one of the vertices of the ETR are suitable to be a light source for photonic integrated circuits. InP-GaInAsP ETR lasers with side length from 10 to 30 pm and the output-waveguide width of 1 or 2 pm are fabricated using standard photolithography and inductively coupled-plasma etching techniques. Continuous-wave electrically injected 1520-nm ETR laser with 20-mu m sides is realized with the maximum output power 0.17 and 0.067 mW and the threshold current 34 and 43 mA at 290 K and 295 K, respectively.

Frequency mixing and phase detection functionalities of three-terminal ballistic junctions

Three-terminal ballistic junctions (TBJs) are fabricated from a high-mobility InP/In0.75Ga0.25As heterostructure by electron-beam lithography. The voltage output from the central branch is measured as a function of the voltages applied to the left and right branches of the TBJs. The measurements show that the TBJs possess an intrinsic nonlinearity. Based on this nonlinearity, a novel room-temperature functional frequency mixer and phase detector are realized. The TBJ frequency mixer and phase detector are expected to have advantages over traditional circuits in terms of simple structure, small size and high speed, and can be used as a new type of building block in nanoelectronics.

A proposal for low cross-talk square-lattice photonic crystal waveguide intersection utilizing the symmetry of waveguide modes

We propose an approach to construct waveguide intersections with broad bandwidth and low cross-talk for square-lattice photonic crystals. by utilizing a vanishing overlap of the propagation modes in the waveguides created by defects which support dipole-like defect modes. The finite-difference time-domain method is used to simulate the waveguide intersection created in the two-dimensional square-lattice photonic crystals. Over a bandwidth of 30 nm with the center wavelength at 1300 nm, transmission efficiency above 90% is obtained with cross-talk below -30 dB. Especially, we demonstrate the transmission of a 500-fs pulse at 1.3 Am through the intersection, and the pulse after transmission shows very little distortion while the cross-talk remains at low level meantime. (c) 2006 Elsevier B.V. All rights reserved.

Novel hybrid voltage controlled ring oscillators using single electron and MOS transistors

This paper proposes two kinds of novel hybrid voltage controlled ring oscillators (VCO) using a single electron transistor (SET) and metal-oxide-semiconductor (MOS) transistor. The novel SET/MOS hybrid VCO circuits possess the merits of both the SET circuit and the MOS circuit. The novel VCO circuits have several advantages: wide frequency tuning range, low power dissipation, and large load capability. We use the SPICE compact macro model to describe the SET and simulate the performances of the SET/MOS hybrid VCO circuits by HSPICE simulator. Simulation results demonstrate that the hybrid circuits can operate well as a VCO at room temperature. The oscillation frequency of the VCO circuits could be as high as 1 GHz, with a -71 dBc/Hz phase noise at 1 MHz offset frequency. The power dissipations are lower than 2 uW. We studied the effect of fabrication tolerance, background charge, and operating temperature on the performances of the circuits.

Characterization of parasitics in TO-packaged high-speed laser modules

An elaborate analysis of the parasitic network of high-speed through-hole packaging (TO)-type laser modules is presented using a small-signal equivalent circuit model. The intrinsic laser diode is obtained using the optical modulation technique, and is embedded into the model as a separate component. Three step-by-step measurements are made for determining the packaging parasitic network, including the test fixture, TO header, submount, bonding wire, and parasitics of the laser chip. A good agreement between simulated and measured results confirms the validation and accuracy of the characterization procedures. Furthermore, several key parasitic elements are found based on the simulation of the high-frequency responses of the packaged devices. It is expected that the 3-dB bandwidth of 12 GHz or more of the low-cost TO packaged laser module may be achieved using the proposed optimization method.

Micro-mould method for self-assembling three-dimensional opal photonic crystals

By vertical sedimentation, silica micro-spheres were grown in different shapes of concave micro-zones which were etched on a (100) p-silicon substrate. The following were found: this method can effectively raise the quality of films by avoiding cracks; the geometry of the micro-zones affects the sediment of the film; regular hexagons and triangles best facilitate the growth of photonic crystals. This method is practical for its ability to fabricate self-assembly photonic crystals in previously designed small areas.

A direct digital frequency synthesizer with fourth-order phase domain Delta Sigma noise shaper and 12-bit current-steering DAC

This paper presents a direct digital frequency synthesizer (DDFS) with a 16-bit accumulator, a fourth-order phase domain single-stage Delta Sigma interpolator, and a 300-MS/s 12-bit current-steering DAC based on the Q(2) Random Walk switching scheme. The Delta Sigma interpolator is used to reduce the phase truncation error and the ROM size. The implemented fourth-order single-stage Delta Sigma noise shaper reduces the effective phase bits by four and reduces the ROM size by 16 times. The DDFS prototype is fabricated in a 0.35-mu m CMOS technology with active area of 1.11 mm(2) including a 12-bit DAC. The measured DDFS spurious-free dynamic range (SFDR) is greater than 78 dB using a reduced ROM with 8-bit phase, 12-bit amplitude resolution and a size of 0.09 mm(2). The total power consumption of the DDFS is 200)mW with a 3.3-V power supply.

Nano-layer structure of silicon-on-insulator materials

Silicon-on-insulator (SOI) has been recognized as a promising semiconductor starting material for ICs where high speed and low power consumption are desirable, in addition to its unique applications in radiation-hardened circuits. In the present paper, three novel SOI nano-layer structures have been demonstrated. ULTRA-THIN SOI has been fabricated by separation by implantation of oxygen (SIMOX) technique at low oxygen ion energy of 45 keV and implantation dosage of 1.81017/cm2. The formed SOI layer is uniform with thickness of only 60 nm. This layer is of crystalline quality. and the interface between this layer and the buried oxide layer is very sharp, PATTERNED SOI nanostructure is illustrated by source and drain on insulator (DSOI) MOSFETs. The DSOI structure has been formed by selective oxygen ion implantation in SIMOX process. With the patterned SOI technology, the floating-body effect and self-heating effect, which occur in the conventional SOI devices, are significantly suppressed. In order to improve the total-dose irradiation hardness of SOI devices, SILICON ON INSULATING MULTILAYERS (SOIM) nano-structure is proposed. The buried insulating multilayers, which are composed of SiOx and SiNy layers, have been realized by implantation of nitride and oxygen ions into silicon in turn at different ion energies, followed by two steps of high temperature annealing process, respectively, Electric property investigation shows that the hardness to the total-dose irradiation of SOIM is remarkably superior to those of the conventional SIMOX SOI and the Bond-and-Etch-Back SOI.

Space grown semi-insulating gallium arsenide single crystal and its application

Low noise field effect transistors and analogue switch integrated circuits (ICs) have been fabricated in semi-insulating gallium arsenide (SI-GaAs) wafers grown in space by direct ion-implantation. The electrical behaviors of the devices and the ICs have surpassed those fabricated in the terrestrially grown SI-GaAs wafers. The highest gain and the lowest noise of the transistors made from space-grown SI-GaAs wafers are 22.8 dB and 0.78 dB, respectively. The threshold back-gating voltage of the ICs made from space-grown SI-GaAs wafers is better than 8.5 V The con-elation between the characterizations of materials and devices is studied systematically. (C) 2002 COSPAR. Published by Elsevier Science Ltd. All rights reserved.

Quantum fluctuation of dissipative mesoscopic capacitance coupling circuit

The quantum wave function and the corresponding energy levels of the dissipative mesoscopic capacitance coupling circuits are obtained by using unitary and linear transformations. The quantum fluctuation of charge and current in an arbitrary eigenstate of the system have been also given. The results show that the fluctuation of charge and current depends on not only the eigenstate but also the electronic device parameters.