53 resultados para Compact Sets


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A compact direct digital frequency synthesizer (DDFS) for system-on-chip (SoC) is developed in this paper. For smaller chip size and lower power consumption, the phase to sine mapping data is compressed by using sine symmetry technique, sine-phase difference technique, quad line approximation (QLA) technique and quantization and error read only memory (QE-ROM) technique. The ROM size is reduced by 98 % using the techniques mentioned above. A compact DDFS chip with 32-bit phase storage depth and a 10-bit on-chip digital to analog converter(DAC) has been successfully implemented using standard 0.35um CMOS process. The core area of the DDFS is 1.6mm(2). It consumes 167 mW at 3.3V, and its spurious free dynamic range (SFDR) is 61dB.

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An ultra-compact silicon-on-insulator based photonic crystal corner mirror is designed and optimized. A sample is then successfully fabricated with extra losses 1.1 +/- 0.4dB for transverse-electronic (M) polarization for wavelength range of 1510-1630nm.

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Novel compact design for 4-channel SOI-based reconfigurable optical add/drop multiplexer using microring resonators is presented and analyzed. Microring resonators have two important attributes as a key new technology for future optical communications, namely functionality and compactness. Functionality refers to the fact that a wide range of desirable filter characteristics can be synthesized by coupling multiple rings. Compactness refers the fact that ring resonators with radii about 30 mu m can lead to large scale integration of devices with densities on the order of 10(4) similar to 10(5) devices per square centimeter. A 4-channel reconfigurable optical add/drop multiplexer comprises a grid-like array of ridge waveguides which perpendicularly cross through each other. SOI-based resonators consisted of multiple rings at each of the cross-grid nodes serve as the wavelength selective switch, and they can switch an optical signal between two ports by means of tuning refractive index of one of the rings. The thermo-optic coefficient of silicon is 1.86x 10(-4) /K. Thus a temperature rise of 27K will increase the refractive index by 5 x 10(-3), which is enough to cause the switching of our designed microring resonators. The thermo-optic effect is used to suppress the resonator power transfer, rather than to promote loss. Thus, the input signal only suffers small attenuation and simultaneously low crosstalk can be achieved by using multiple rings.

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A compact polarization-insensitive 8x8 arrayed waveguide grating with 100GHz channel spacing at 1.55 mu m is presented on the material of silicon on insulator (SOI). Increasing the epitaxial layer thickness can reduce the birefringence of the waveguide, but the wvaeguide's bend radius also increases at the same time. We choose the SOI wafer with 3.0 mu m epitaxial layer to reduce the device's size and designed the appropriate structure of rib wave-guides to eliminate the polarization dependant wavelength shift. Compared to the other methods of eliminating the polarization dependant wavelength shift, the method is convenient and easy to control the polarization without additional etching process. The index differences between TE0 and TM0 of straight and bend waveguides are 1.4x10(-5) and 3.9x10(-5), respectively. The results showed that the polarization dependant wavelength shift is 0.1nm, and the device size is 1.5x1.0 cm(2).

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Submitted by 阎军 (yanj@red.semi.ac.cn) on 2010-04-04T06:57:43Z No. of bitstreams: 1 71.pdf: 92858 bytes, checksum: 2a0a4972af8e56b0fced818042dd6dbd (MD5)

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Compact and efficient triple-pass optical parametric chirped pulse amplification in a single crystal has been demonstrated. The signal was triple-pass amplified in a single nonlinear crystal by a nanosecond pump pulse. The first-pass optical parametric amplification is completely phase matched in the plane of the maximum effective nonlinearity, and the other two passes work symmetrically near to the first-pass optical parametric amplification plane. This architecture efficiently increases the overall gain, overcomes the optical parametric fluorescence, and clearly simplifies the amplification scheme.

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A compact direct digital frequency synthesizer (DDFS) for system-on-chip implementation of the high precision rubidium atomic frequency standard is developed. For small chip size and low power consumption, the phase to sine mapping data is compressed using sine symmetry technique, sine-phase difference technique, quad line approximation technique,and quantization and error read only memory (QE-ROM) technique. The ROM size is reduced by 98% using these techniques. A compact DDFS chip with 32bit phase storage depth and a 10bit on-chip digital to analog converter has been successfully implemented using a standard 0.35μm CMOS process. The core area of the DDFS is 1.6mm^2. It consumes 167mW at 3.3V,and its spurious free dynamic range is 61dB.

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介绍了基于ARM920T内核的AT91RM9200处理器与Compact Flash卡的接口电路以及Compact Flash卡驱动程序的编写、调试.提出了一种适合数据流量大、实时性能要求高的现场实时数据采集、事后PC机做分析处理的实时数据采集系统。

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A compact proton beam source for space simulation has been developed. A compact structure was designed in order to meet the special requirements of miniaturization. Some particular means have been adopted for improving the proton portion and beam transmission at a long distance. The experimental results showed that 8mA/80keV proton beam can be successfully obtained from this source at about 700W input microwave power.