Y-chromosome haplotype distribution in Han Chinese populations and modern human origin in East Asians

We investigated the distribution of Y-chromosome haplotype using 19 Y-SNPs in Han Chinese populations from 22 provinces of China. Our data indicate distinctive patterns of Y chromosome between southern and northern Han Chinese populations. The southern po

Y-chromosome evidence for no independent origin of modern human in China

East Asia is one of the few regions in the world where a large number of human fossils have been unearthed. The continuity of hominid fossils in East Asia, particularly in China has been presented as strong evidence supporting an independent origin of mod

African origin of modern humans in East Asia: A tale of 12,000 Y chromosomes

To test the hypotheses of modern human origin in East Asia, we sampled 12,127 male individuals from 163 populations and typed for three Y chromosome biallelic markers (YAP, M89, and M130). All the individuals carried a mutation at one of the three sites.

Y chromosome evidence of earliest modern human settlement in East Asia and multiple origins of Tibetan and Japanese populations

Background: The phylogeography of the Y chromosome in Asia previously suggested that modern humans of African origin initially settled in mainland southern East Asia, and about 25,000 30,000 years ago, migrated northward, spreading throughout East Asia. H

Positive selection drives population differentiation in the skeletal genes in modern humans

During the course of evolution, the human skeletal system has evolved rapidly leading to an incredible array of phenotypic diversity, including variations in height and bone mineral density. However, the genetic basis of this phenotypic diversity and the relatively rapid tempo of evolution have remained largely undocumented. Here, we discover that skeletal genes exhibit a significantly greater level of population differentiation among humans compared with other genes in the genome. The pattern is exceptionally evident at amino acid-altering sites within these genes. Divergence is greater between Africans and both Europeans and East Asians. In contrast, relatively weak differentiation is observed between Europeans and East Asians. SNPs with higher levels of differentiation have correspondingly higher derived allele frequencies in Europeans and East Asians. Thus, it appears that positive selection has operated on skeletal genes in the non-African populations and this may have been initiated with the human colonization of Eurasia. In conclusion, we provide genetic evidence supporting the rapid evolution of the human skeletal system and the associated diversity of phenotypes.

Characterization of the sleep architecture in two species of fruit bat

Bats (Chiroptera) are the second-most abundant mammalian order in the world, occupying a diverse range of habitats and exhibiting many different life history traits. In order to contribute to this highly underrepresented group we describe the sleep architecture of two species of frugivorous bat, the greater short-nosed fruit bat (Cynopterus sphinx) and the lesser dawn fruit bat (Eonycteris spelaea). Electroencephalogram (EEG) and electromyogram (EMG) data were recorded from multiple individuals (>= 5) by telemetry over a 72-h period in a laboratory setting with light/dark cycles equivalent to those found in the wild. Our results show that over a 24-h period both species spent more time asleep than awake (mean 15 h), less than previous reported for Chiroptera (20 h). C sphinx spent significantly more of its non-rapid eye movement sleep (NREM) and rapid eye movement sleep (REM) quotas during the light phase, while E. spelaea divided its sleep-wake architecture equally between both light and dark phases. Comparing the sleep patterns of the two species found that C. sphinx had significantly fewer NREM and REM episodes than E. spelaea but each episode lasted for a significantly longer period of time. Potential hypotheses to explain the differences in the sleep architecture of C. sphinx with E. spelaea, including risk of predation and social interaction are discussed. (C) 2010 Published by Elsevier B.V.

Effect of plant architecture on the structure of epiphytic macro invertebrate communities in a Chinese lake

We examined the effect of different plant architecture types on epiphytic macroinvertebrates of a shallow macrophyte-dominated lake in China. Macroinvertebrates were sampled from four dominant submersed macrophytes in the lake - two dissected plants (Myriophyllum spicatum L. and Ceratophyllum demersum L.) and two undissected plants (Potamogeton maackianus A. Benn. and Vallisneria spiralis L.). Macro invertebrate richness showed significant differences among four submersed macrophyte habitats, and higher density per g of dry plant were associated with dissected plants than undissected plants. The average abundance in dissected plants was as three-six times as in undissected plants. The biodiversity of epiphytic macroinvertebrates was higher in dissected plants than undissected plants. Our results suggest that dissected plants provide different habitat for macroinvertebrates than dissected plant, and this concurs with the hypothesis that the former could support more epiphytic macroinvertebrates than the latter.

A Complex BPF with On Chip Auto-tuning Architecture for Wireless Receivers

A 3(rd) order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18um standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3(rd) order harmonic input intercept point (IIP3) is larger than 16.2dBm, with 50 Omega as the source impedance. The input referred noise is about 80uV(rms). The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28 x 0.22 mm(2), less than 1/8 of that of the main-filter which is 0.92 x 0.59 mm(2). After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.

A Complex BPF with On Chip Auto-tuning Architecture for Low-IF Receivers

A 3(rd) order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18 mu m standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3(rd) order harmonic input intercept point (IIP3) is larger than 19dBm, with 50 Omega as the source impedance. The input referred noise is about 80 mu V-rms. The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28x0.22mm(2), less than 1/8 of that of the main-filter which is 0.92x0.59mm(2). After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.

An adaptive frequency synthesizer architecture reducing reference sidebands

An adaptive phase-locked loop (PLL) frequency synthesizer architecture for reducing reference sidebands at the output of the frequency synthesizer is described. The architecture combines two tuning loops: one is the main loop for locking the PLL frequency synthesizer and operating all the time, the other one is auxiliary loop for reducing reference sidebands and operating only when the main loop is closely locked. A 1.8V 1GHz fully integrated CMOS dual-loop frequency synthesizer is designed in a 0.18um CMOS process. The suppression of the reference sidebands of the proposed frequency synthesizer is 13.8dB more than that of the general frequency synthesizer.

A Novel Architecture of Vision Chip for Fast Traffic Lane Detection and FPGA Implementation

This paper presents a novel architecture of vision chip for fast traffic lane detection (FTLD). The architecture consists of a 32*32 SIMD processing element (PE) array processor and a dual-core RISC processor. The PE array processor performs low-level pixel-parallel image processing at high speed and outputs image features for high-level image processing without I/O bottleneck. The dual-core processor carries out high-level image processing. A parallel fast lane detection algorithm for this architecture is developed. The FPGA system with a CMOS image sensor is used to implement the architecture. Experiment results show that the system can perform the fast traffic lane detection at 50fps rate. It is much faster than previous works and has good robustness that can operate in various intensity of light. The novel architecture of vision chip is able to meet the demand of real-time lane departure warning system.

Performance of an embedded optical vector matrix multiplication processor architecture

An embedded architecture of optical vector matrix multiplier (OVMM) is presented. The embedded architecture is aimed at optimising the data flow of vector matrix multiplier (VMM) to promote its performance. Data dependence is discussed when the OVMM is connected to a cluster system. A simulator is built to analyse the performance according to the architecture. According to the simulation, Amdahl's law is used to analyse the hybrid opto-electronic system. It is found that the electronic part and its interaction with optical part form the bottleneck of system.

Pipeline Architecture and Parallel Computation-Based Real-Time Stereovision Tracking System for Surgical Navigation

This paper studies the development of a real-time stereovision system to track multiple infrared markers attached to a surgical instrument. Multiple stages of pipeline in field-programmable gate array (FPGA) are developed to recognize the targets in both left and right image planes and to give each target a unique label. The pipeline architecture includes a smoothing filter, an adaptive threshold module, a connected component labeling operation, and a centroid extraction process. A parallel distortion correction method is proposed and implemented in a dual-core DSP. A suitable kinematic model is established for the moving targets, and a novel set of parallel and interactive computation mechanisms is proposed to position and track the targets, which are carried out by a cross-computation method in a dual-core DSP. The proposed tracking system can track the 3-D coordinate, velocity, and acceleration of four infrared markers with a delay of 9.18 ms. Furthermore, it is capable of tracking a maximum of 110 infrared markers without frame dropping at a frame rate of 60 f/s. The accuracy of the proposed system can reach the scale of 0.37 mm RMS along the x- and y-directions and 0.45 mm RMS along the depth direction (the depth is from 0.8 to 0.45 m). The performance of the proposed system can meet the requirements of applications such as surgical navigation, which needs high real time and accuracy capability.