2 resultados para semiconductor films

em CaltechTHESIS


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Films of Ti-Si-N obtained by reactively sputtering a TiSi_2, a Ti_5Si_3, or a Ti_3Si target are either amorphous or nanocrystalline in structure. The atomic density of some films exceeds 10^23 at./cm^3. The room-temperature resistivity of the films increases with the Si and the N content. A thermal treatment in vacuum at 700 °C for 1 hour decreases the resistivity of the Ti-rich films deposited from the Ti_5Si_3 or the Ti_3Si target, but increases that of the Si-rich films deposited from the TiSi_2 target when the nitrogen content exceeds about 30 at. %.

Ti_(34)Si_(23)N_(43) deposited from the Ti_5Si_3 target is an excellent diffusion barrier between Si and Cu. This film is a mixture of nanocrystalline TiN and amorphous SiN_x. Resistivity measurement from 80 K to 1073 K reveals that this film is electrically semiconductor-like as-deposited, and that it becomes metal-like after an hour annealing at 1000 °C in vacuum. A film of about 100 nm thick, with a resistivity of 660 µΩcm, maintains the stability of Si n+p shallow junction diodes with a 400 nm Cu overlayer up to 850 °C upon 30 min vacuum annealing. When used between Si and Al, the maximum temperature of stability is 550 °C for 30 min. This film can be etched in a CF_4/O_2 plasma.

The amorphous ternary metallic alloy Zr_(60)Al_(15)Ni_(25) was oxidized in dry oxygen in the temperature range 310 °C to 410 °C. Rutherford backscattering and cross-sectional transmission electron microscopy studies suggest that during this treatment an amorphous layer of zirconium-aluminum-oxide is formed at the surface. Nickel is depleted from the oxide and enriched in the amorphous alloy below the oxide/alloy interface. The oxide layer thickness grows parabolically with the annealing duration, with a transport constant of 2.8x10^(-5) m^2/s x exp(-1.7 eV/kT). The oxidation rate is most likely controlled by the Ni diffusion in the amorphous alloy.

At later stages of the oxidation process, precipitates of nanocrystalline ZrO_2 appear in the oxide near the interface. Finally, two intermetallic phases nucleate and grow simultaneously in the alloy, one at the interface and one within the alloy.

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Photovoltaic energy conversion represents a economically viable technology for realizing collection of the largest energy resource known to the Earth -- the sun. Energy conversion efficiency is the most leveraging factor in the price of energy derived from this process. This thesis focuses on two routes for high efficiency, low cost devices: first, to use Group IV semiconductor alloy wire array bottom cells and epitaxially grown Group III-V compound semiconductor alloy top cells in a tandem configuration, and second, GaP growth on planar Si for heterojunction and tandem cell applications.

Metal catalyzed vapor-liquid-solid grown microwire arrays are an intriguing alternative for wafer-free Si and SiGe materials which can be removed as flexible membranes. Selected area Cu-catalyzed vapor-liquid solid growth of SiGe microwires is achieved using chlorosilane and chlorogermane precursors. The composition can be tuned up to 12% Ge with a simultaneous decrease in the growth rate from 7 to 1 μm/min-1. Significant changes to the morphology were observed, including tapering and faceting on the sidewalls and along the lengths of the wires. Characterization of axial and radial cross sections with transmission electron microscopy revealed no evidence of defects at facet corners and edges, and the tapering is shown to be due to in-situ removal of catalyst material during growth. X-ray diffraction and transmission electron microscopy reveal a Ge-rich crystal at the tip of the wires, strongly suggesting that the Ge incorporation is limited by the crystallization rate.

Tandem Ga1-xInxP/Si microwire array solar cells are a route towards a high efficiency, low cost, flexible, wafer-free solar technology. Realizing tandem Group III-V compound semiconductor/Si wire array devices requires optimization of materials growth and device performance. GaP and Ga1-xInxP layers were grown heteroepitaxially with metalorganic chemical vapor deposition on Si microwire array substrates. The layer morphology and crystalline quality have been studied with scanning electron microscopy and transmission electron microscopy, and they provide a baseline for the growth and characterization of a full device stack. Ultimately, the complexity of the substrates and the prevalence of defects resulted in material without detectable photoluminescence, unsuitable for optoelectronic applications.

Coupled full-field optical and device physics simulations of a Ga0.51In0.49P/Si wire array tandem are used to predict device performance. A 500 nm thick, highly doped "buffer" layer between the bottom cell and tunnel junction is assumed to harbor a high density of lattice mismatch and heteroepitaxial defects. Under simulated AM1.5G illumination, the device structure explored in this work has a simulated efficiency of 23.84% with realistic top cell SRH lifetimes and surface recombination velocities. The relative insensitivity to surface recombination is likely due to optical generation further away from the free surfaces and interfaces of the device structure.

Finally, GaP has been grown free of antiphase domains on Si (112) oriented substrates using metalorganic chemical vapor deposition. Low temperature pulsed nucleation is followed by high temperature continuous growth, yielding smooth, specular thin films. Atomic force microscopy topography mapping showed very smooth surfaces (4-6 Å RMS roughness) with small depressions in the surface. Thin films (~ 50 nm) were pseudomorphic, as confirmed by high resolution x-ray diffraction reciprocal space mapping, and 200 nm thick films showed full relaxation. Transmission electron microscopy showed no evidence of antiphase domain formation, but there is a population of microtwin and stacking fault defects.