Synthetic regulation of eukaryotic gene expression by noncoding RNA

Synthetic biological systems promise to combine the spectacular diversity of biological functionality with engineering principles to design new life to address many pressing needs. As these engineered systems advance in sophistication, there is ever-greater need for customizable, situation-specific expression of desired genes. However, existing gene control platforms are generally not modular, or do not display performance requirements required for robust phenotypic responses to input signals. This work expands the capabilities of eukaryotic gene control in two important directions.

For development of greater modularity, we extend the use of synthetic self-cleaving ribozyme switches to detect changes in input protein levels and convey that information into programmed gene expression in eukaryotic cells. We demonstrate both up- and down-regulation of levels of an output transgene by more than 4-fold in response to rising input protein levels, with maximal output gene expression approaching the highest levels observed in yeast. In vitro experiments demonstrate protein-dependent ribozyme activity modulation. We further demonstrate the platform in mammalian cells. Our switch devices do not depend on special input protein activity, and can be tailored to respond to any input protein to which a suitable RNA aptamer can be developed. This platform can potentially be employed to regulate the expression of any transgene or any endogenous gene by 3’ UTR replacement, allowing for more complex cell state-specific reprogramming.

We also address an important concern with ribozyme switches, and riboswitch performance in general, their dynamic range. While riboswitches have generally allowed for versatile and modular regulation, so far their dynamic ranges of output gene modulation have been modest, generally at most 10-fold. We address this shortcoming by developing a modular genetic amplifier for near-digital control of eukaryotic gene expression. We combine ribozyme switch-mediated regulation of a synthetic TF with TF-mediated regulation of an output gene. The amplifier platform allows for as much as 20-fold regulation of output gene expression in response to input signal, with maximal expression approaching the highest levels observed in yeast, yet being tunable to intermediate and lower expression levels. EC50 values are more than 4 times lower than in previously best-performing non-amplifier ribozyme switches. The system design retains the modular-input architecture of the ribozyme switch platform, and the near-digital dynamic ranges of TF-based gene control.

Together, these developments suggest great potential for the wide applicability of these platforms for better-performing eukaryotic gene regulation, and more sophisticated, customizable reprogramming of cellular activity.

Holistic Design In High-Speed Optical Interconnects

Integrated circuit scaling has enabled a huge growth in processing capability, which necessitates a corresponding increase in inter-chip communication bandwidth. As bandwidth requirements for chip-to-chip interconnection scale, deficiencies of electrical channels become more apparent. Optical links present a viable alternative due to their low frequency-dependent loss and higher bandwidth density in the form of wavelength division multiplexing. As integrated photonics and bonding technologies are maturing, commercialization of hybrid-integrated optical links are becoming a reality. Increasing silicon integration leads to better performance in optical links but necessitates a corresponding co-design strategy in both electronics and photonics. In this light, holistic design of high-speed optical links with an in-depth understanding of photonics and state-of-the-art electronics brings their performance to unprecedented levels. This thesis presents developments in high-speed optical links by co-designing and co-integrating the primary elements of an optical link: receiver, transmitter, and clocking.

In the first part of this thesis a 3D-integrated CMOS/Silicon-photonic receiver will be presented. The electronic chip features a novel design that employs a low-bandwidth TIA front-end, double-sampling and equalization through dynamic offset modulation. Measured results show -14.9dBm of sensitivity and energy efficiency of 170fJ/b at 25Gb/s. The same receiver front-end is also used to implement source-synchronous 4-channel WDM-based parallel optical receiver. Quadrature ILO-based clocking is employed for synchronization and a novel frequency-tracking method that exploits the dynamics of IL in a quadrature ring oscillator to increase the effective locking range. An adaptive body-biasing circuit is designed to maintain the per-bit-energy consumption constant across wide data-rates. The prototype measurements indicate a record-low power consumption of 153fJ/b at 32Gb/s. The receiver sensitivity is measured to be -8.8dBm at 32Gb/s.

Next, on the optical transmitter side, three new techniques will be presented. First one is a differential ring modulator that breaks the optical bandwidth/quality factor trade-off known to limit the speed of high-Q ring modulators. This structure maintains a constant energy in the ring to avoid pattern-dependent power droop. As a first proof of concept, a prototype has been fabricated and measured up to 10Gb/s. The second technique is thermal stabilization of micro-ring resonator modulators through direct measurement of temperature using a monolithic PTAT temperature sensor. The measured temperature is used in a feedback loop to adjust the thermal tuner of the ring. A prototype is fabricated and a closed-loop feedback system is demonstrated to operate at 20Gb/s in the presence of temperature fluctuations. The third technique is a switched-capacitor based pre-emphasis technique designed to extend the inherently low bandwidth of carrier injection micro-ring modulators. A measured prototype of the optical transmitter achieves energy efficiency of 342fJ/bit at 10Gb/s and the wavelength stabilization circuit based on the monolithic PTAT sensor consumes 0.29mW.

Lastly, a first-order frequency synthesizer that is suitable for high-speed on-chip clock generation will be discussed. The proposed design features an architecture combining an LC quadrature VCO, two sample-and-holds, a PI, digital coarse-tuning, and rotational frequency detection for fine-tuning. In addition to an electrical reference clock, as an extra feature, the prototype chip is capable of receiving a low jitter optical reference clock generated by a high-repetition-rate mode-locked laser. The output clock at 8GHz has an integrated RMS jitter of 490fs, peak-to-peak periodic jitter of 2.06ps, and total RMS jitter of 680fs. The reference spurs are measured to be –64.3dB below the carrier frequency. At 8GHz the system consumes 2.49mW from a 1V supply.