Fabrication process of Mo/Au TES at RT

We report on the fabrication details of TES based on Mo/Au bilayers. The Mo layer is deposited by radio frequency (RF) sputtering and capped with a sputter deposited thin Au protection layer. Afterwards, a second Au layer of suitable (lower) resistivity is deposited ex‐situ by e‐beam evaporation, until completion of the total desired Au thickness. The deposition was performed at room temperature (RT) on LPCVD Si3 N4 membranes. Such a deposition procedure is very reproducible and allow controlling the critical temperature (Tc) and normal electrical resistance (RN ) of the Mo/Au bilayer. The process is optimized to achieve low stress bilayers, thus avoiding the undesirable curvature of the membranes. Bilayers are patterned using photolithographic techniques and wet etching procedures. Mo superconducting paths are used to contact the Mo/Au bilayers, thus ensuring good electrical conductivity and thermal isolation. The entire fabrication process let to stable and reproducible sensors with required and tunable functional properties

Thermal effects in Ni/Au and Mo/Au gate metallization AlGaN/GaN HEMT's reliability

AlGaN/GaN high electron mobility transistors (HEMT) are key devices for the next generation of high-power, high-frequency and high-temperature electronics applications. Although significant progress has been recently achieved [1], stability and reliability are still some of the main issues under investigation, particularly at high temperatures [2-3]. Taking into account that the gate contact metallization is one of the weakest points in AlGaN/GaN HEMTs, the reliability of Ni, Mo, Pt and refractory metal gates is crucial [4-6]. This work has been focused on the thermal stress and reliability assessment of AlGaN/GaN HEMTs. After an unbiased storage at 350 o C for 2000 hours, devices with Ni/Au gates exhibited detrimental IDS-VDS degradation in pulsed mode. In contrast, devices with Mo/Au gates showed no degradation after similar storage conditions. Further capacitance-voltage characterization as a function of temperature and frequency revealed two distinct trap-related effects in both kinds of devices. At low frequency (< 1MHz), increased capacitance near the threshold voltage was present at high temperatures and more pronounced for the Ni/Au gate HEMT and as the frequency is lower. Such an anomalous “bump” has been previously related to H-related surface polar charges [7]. This anomalous behavior in the C-V characteristics was also observed in Mo/Au gate HEMTs after 1000 h at a calculated channel temperatures of around from 250 o C (T2) up to 320 ºC (T4), under a DC bias (VDS= 25 V, IDS= 420 mA/mm) (DC-life test). The devices showed a higher “bump” as the channel temperature is higher (Fig. 1). At 1 MHz, the higher C-V curve slope of the Ni/Au gated HEMTs indicated higher trap density than Mo/Au metallization (Fig. 2). These results highlight that temperature is an acceleration factor in the device degradation, in good agreement with [3]. Interface state density analysis is being performed in order to estimate the trap density and activation energy.

Characterization of a Mo/Au thermometer for ATHENA

The first dark characterization of a thermometer fabricated with our Mo/Au bilayers to be used as a transition edge sensor is presented. High-quality, stress-free Mo layers, whose thickness is used to tune the critical temperature (TC ) down to 100 mK, are deposited by sputtering at room temperature (RT ) on Si3N4 bulk and membranes, and protected from degradation with a 15-nm sputtered Au layer. An extra layer of high-quality Au is deposited by ex situ e-beam to ensure low residual resistance. The thermometer is patterned on a membrane using standard photolithographic techniques and wet etching processes, and is contacted through Mo paths, displaying a sharp superconducting transition (α ≈ 600). Results show a good coupling between Mo and Au layers and excellent TC reproducibility, allowing to accurately correlate dM o and TC . Since dAu is bigger than ξM for all analyzed samples, bilayer residual resistance can be modified without affecting TC . Finally, first current to voltage measurements at different temperatures are measured and analyzed, obtaining the corresponding characterization parameters.