5 resultados para EPE
em Universidad Politécnica de Madrid
Resumo:
Early propagation effect (EPE) is a critical problem in conventional dual-rail logic implementations against Side Channel Attacks (SCAs). Among previous EPE-resistant architectures, PA-DPL logic offers EPE-free capability at relatively low cost. However, its separate dual core structure is a weakness when facing concentrated EM attacks where a tiny EM probe can be precisely positioned closer to one of the two cores. In this paper, we present an PA-DPL dual-core interleaved structure to strengthen resistance against sophisticated EM attacks on Xilinx FPGA implementations. The main merit of the proposed structure is that every two routing in each signal pair are kept identical even the dual cores are interleaved together. By minimizing the distance between the complementary routings and instances of both cores, even the concentrated EM measurement cannot easily distinguish the minor EM field unbalance. In PA- DPL, EPE is avoided by compressing the evaluation phase to a small portion of the clock period, therefore, the speed is inevitably limited. Regarding this, we made an improvement to extend the duty cycle of evaluation phase to more than 40 percent, yielding a larger maximum working frequency. The detailed design flow is also presented. We validate the security improvement against EM attack by implementing a simplified AES co-processor in Virtex-5 FPGA.
Resumo:
In this paper, a new countermeasure against power and electromagnetic (EM) Side Channel Attacks (SCA) on FPGA implemented cryptographic algorithms is proposed. This structure mainly focuses on a critical vulnerability, Early Evaluation, also known as Early Propagation Effect (EPE), which exists in most conventional SCA-hardened DPL (Dual-rail with Precharge Logic) solutions. The main merit of this proposal is that the EPE can be effectively prevented by using a synchronized non regular precharge network, which maintains identical routing between the original and mirror parts, where costs and design complexity compared with previous EPE-resistant countermeasures are reduced, while security level is not sacrificed. Another advantage for our Precharge Absorbed(PA) - DPL method is that its Dual-Core style (independent architecture for true and false parts) could be generated using partial reconfiguration. This helps to get a dynamic security protection with better energy planning. That means system only keeps the true part which fulfills the normal en/decryption task in low security level, and reconfigures the false parts once high security level is required. A relatively limited clock speed is a compromise, since signal propagation is restricted to a portion of the clock period. In this paper, we explain the principles of PA-DPL and provide the guidelines to design this structure. We experimentally validate our methods in a minimized AES co-processor on Xilinx Virtex-5 board using electromagnetic (EM) attacks.
Resumo:
This paper describes a practical activity, part of the renewable energy course where the students have to build their own complete wind generation system, including blades, PM-generator, power electronics and control. After connecting the system to the electric grid the system has been tested during real wind scenarios. The paper will describe the electric part of the work surface-mounted permanent magnet machine design criteria as well as the power electronics part for the power control and the grid connection. A Kalman filter is used for the voltage phase estimation and current commands obtained in order to control active and reactive power. The connection to the grid has been done and active and reactive power has been measured in the system.
Resumo:
In the last years, RF power amplifiers are taking advantage of the switched dc-dc converters to use them in several architectures that may improve the efficiency of the amplifier, keeping a good linearity. The use of linearization techniques such as Envelope Elimination and Restoration(EER) and Envelope Tracking (ET) requires a very fast dc-dc power converter to provide variable voltage supply to the power amplifier but theoretically the efficiency can be much higher than using the classical amplifiers belonging to classes A, B or AB. The purpose of this paper is to analyze the state of the art of the power converters used as envelope amplifiers in this application. The power topologies will be explored and several important parameters such as efficiency, bandwidth will be discussed.
Resumo:
A Wearable Power System (WPS) is a portable power source utilized primarily to power the modern soldier’s electronic equipment. Such a system has to satisfy output power demands in the range of 20 W...200 W, specified as a 4-day mission profile and has a weight limit of 4 kg. To meet these demands, an optimization of a WPS, comprising an internal combustion (IC) engine, permanent magnetic three-phase electrical motor/generator, inverter, Li-batteries, DC-DC converters, and controller, is performed in this paper. The mechanical energy extracted from the fuel by IC engine is transferred to the generator that is used to recharge the battery and provide the power to the electrical output load. The main objectives are to select the engine, fuel and battery type, to match the weight of fuel and the number of battery cells, to find the optimal working point of engine and to minimize the system weight. To provide the second output voltage level of 14 VDC, a separate DC-DC converter is connected between the battery and the load, and optimized for the specified mission profile. A prototype of the WPS based on the optimization presented in the paper results in a total system weight of 3.9 kg and fulfils the mission profile.