Using bifurcations in the determination of lock-in ranges for third-order phase-locked loops
| Contribuinte(s) |
UNIVERSIDADE DE SÃO PAULO |
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| Data(s) |
18/10/2012
18/10/2012
2009
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| Resumo |
Transmission and switching in digital telecommunication networks require distribution of precise time signals among the nodes. Commercial systems usually adopt a master-slave (MS) clock distribution strategy building slave nodes with phase-locked loop (PLL) circuits. PLLs are responsible for synchronizing their local oscillations with signals from master nodes, providing reliable clocks in all nodes. The dynamics of a PLL is described by an ordinary nonlinear differential equation, with order one plus the order of its internal linear low-pass filter. Second-order loops are commonly used because their synchronous state is asymptotically stable and the lock-in range and design parameters are expressed by a linear equivalent system [Gardner FM. Phaselock techniques. New York: John Wiley & Sons: 1979]. In spite of being simple and robust, second-order PLLs frequently present double-frequency terms in PD output and it is very difficult to adapt a first-order filter in order to cut off these components [Piqueira JRC, Monteiro LHA. Considering second-harmonic terms in the operation of the phase detector for second order phase-locked loop. IEEE Trans Circuits Syst [2003;50(6):805-9; Piqueira JRC, Monteiro LHA. All-pole phase-locked loops: calculating lock-in range by using Evan`s root-locus. Int J Control 2006;79(7):822-9]. Consequently, higher-order filters are used, resulting in nonlinear loops with order greater than 2. Such systems, due to high order and nonlinear terms, depending on parameters combinations, can present some undesirable behaviors, resulting from bifurcations, as error oscillation and chaos, decreasing synchronization ranges. In this work, we consider a second-order Sallen-Key loop filter [van Valkenburg ME. Analog filter design. New York: Holt, Rinehart & Winston; 1982] implying a third order PLL The resulting lock-in range of the third-order PLL is determined by two bifurcation conditions: a saddle-node and a Hopf. (C) 2008 Elsevier B.V. All rights reserved. |
| Identificador |
COMMUNICATIONS IN NONLINEAR SCIENCE AND NUMERICAL SIMULATION, v.14, n.5, p.2328-2335, 2009 1007-5704 http://producao.usp.br/handle/BDPI/18706 10.1016/j.cnsns.2008.06.012 |
| Idioma(s) |
eng |
| Publicador |
ELSEVIER SCIENCE BV |
| Relação |
Communications in Nonlinear Science and Numerical Simulation |
| Direitos |
closedAccess Copyright ELSEVIER SCIENCE BV |
| Palavras-Chave | #Bifurcation #Lock-in range #Phase-error #Phase-locked loop #Synchronous state #Stability #NETWORK SYNCHRONIZATION #OPERATION #JITTER #Literature, British Isles #Mathematics, Applied #Mathematics, Interdisciplinary Applications #Mechanics #Physics, Fluids & Plasmas #Physics, Mathematical |
| Tipo |
article original article publishedVersion |