HDL subspecies : association with low HDL-C, obesity, and metabolic syndrome

AIMS An independent, powerful coronary heart disease (CHD) predictor is a low level of high-density lipoprotein cholesterol (HDL-C). Discoidal preβ-HDL particles and large HDL2 particles are the primary cholesterol acceptors in reverse cholesterol transport, a key anti-atherogenic HDL mechanism. The quality of HDL subspecies may provide better markers of HDL functionality than does HDL-C alone. We aimed I) to study whether alterations in the HDL subspecies profile exist in low-HDL-C subjects II) to explore the relationship of any changes in HDL subspecies profile in relation to atherosclerosis and metabolic syndrome; III) to elucidate the impact of genetics and acquired obesity on HDL subspecies distribution. SUBJECTS The study consisted of 3 cohorts: A) Finnish families with low HDL-C and premature CHD (Study I: 67 subjects with familial low HDL-C and 64 controls; Study II: 83 subjects with familial low HDL-C, 65 family members with normal HDL-C, and 133 controls); B) a cohort of 113 low- and 133 high-HDL-C subjects from the Health 2000 Health Examination Survey carried out in Finland (Study III); and C) a Finnish cohort of healthy young adult twins (52 monozygotic and 89 dizygotic pairs) (Study IV). RESULTS AND CONCLUSIONS The subjects with familial low HDL-C had a lower preβ-HDL concentration than did controls, and the low-HDL-C subjects displayed a dramatic reduction (50-70%) in the proportion of large HDL2b particles. The subjects with familial low HDL-C had increased carotid atherosclerosis measured as intima-media-thickness (IMT), and HDL2b particles correlated negatively with IMT. The reduction in both key cholesterol acceptors, preβ-HDL and HDL2 particles, supports the concept of impaired reverse cholesterol transport contributing to the higher CHD risk in low-HDL-C subjects. The family members with normal HDL-C and the young adult twins with acquired obesity showed a reduction in large HDL2 particles and an increase in small HDL3 particles, which may be the first changes leading to the lowering of HDL-C. The low-HDL-C subjects had a higher serum apolipoprotein E (apoE) concentration, which correlated positively with the metabolic syndrome components (waist circumference, TG, and glucose), highlighting the need for a better understanding of apoE metabolism in human atherosclerosis. In the twin study, the increase in small HDL3b particles was associated with obesity independent of genetic effects. The heritability estimate, of 73% for HDL-C and 46 to 63% for HDL subspecies, however, demonstrated a strong genetic influence. These results suggest that the relationship between obesity and lipoproteins depends on different elements in each subject. Finally, instead of merely elevating HDL-C, large HDL2 particles and discoidal preβ-HDL particles may provide beneficial targets for HDL-targeted therapy.

Generación automática de VHDL mediante Simulink HDL coder y aplicación al procesado de señales

Gordon E. Moore, co-fundador de Intel, predijo en una publicación del año 1965 que aproximadamente cada dos años se duplicaría el número de transistores presentes en un circuito integrado, debido a las cada vez mejores tecnologías presentes en el proceso de elaboración. A esta ley se la conoce como Ley de Moore y su cumplimiento se ha podido constatar hasta hoy en día. Gracias a ello, con el paso del tiempo cada vez se presentan en el mercado circuitos integrados más potentes, con mayores prestaciones para realizar tareas cada vez más complejas. Un tipo de circuitos integrados que han podido evolucionar de forma importante por dicho motivo, son los dispositivos de lógica programable, circuitos integrados que permiten implementar sobre ellos las funciones lógicas que desee implementar el usuario. Hasta hace no muchos años, dichos dispositivos eran capaces de implementar circuitos compuestos por unas pocas funciones lógicas, pero gracias al proceso de miniaturización predicho por la Ley de Moore, hoy en día son capaces de implementar circuitos tan complejos como puede ser un microprocesador; dichos dispositivos reciben el nombre de FPGA, siglas de Field Programmable Gate Array. Debido a la mayor capacidad y por lo tanto a diseños más complejos implementados sobre las FPGA, en los últimos años han aparecido herramientas cuyo objetivo es hacer más fácil el proceso de ingeniería dentro de un desarrollo en este tipo de dispositivos, como es la herramienta HDL Coder de la compañía MathWorks, creadores también Matlab y Simulink, unas potentes herramientas usadas ampliamente en diferentes ramas de la ingeniería. El presente proyecto tiene como objetivo evaluar el uso de dicha herramienta para el procesado digital de señales, usando para ello una FPGA Cyclone II de la casa Altera. Para ello, se empezará analizando la herramienta escogida comparándola con herramientas de la misma índole, para a continuación seleccionar una aplicación de procesado digital de señal a implementar. Tras diseñar e implementar la aplicación escogida, se deberá simular en PC para finalmente integrarla en la placa de evaluación seleccionada y comprobar su correcto funcionamiento. Tras analizar los resultados de la aplicación de implementada, concretamente un analizador de la frecuencia fundamental de una señal de audio, se ha comprobado que la herramienta HDL Coder, es adecuada para este tipo de desarrollos, facilitando enormemente los procesos tanto de implementación como de validación gracias al mayor nivel de abstracción que aporta.

Proposed scheme for parallel 10Gb/s VSR system and its Verilog HDL realization

This paper proposes a novel and innovative scheme for 10Gb/s parallel Very Short Reach (VSR) optical communication system. The optimized scheme properly manages the SDH/SONET redundant bytes and adjusts the position of error detecting bytes and error correction bytes. Compared with the OIF-VSR4-01.0 proposal, the scheme has a coding process module. The SDH/SONET frames in transmission direction are disposed as follows: (1) The Framer-Serdes Interface (FSI) gets 16x622.08Mb/s STM-64 frame. (2) The STM-64 frame is byte-wise stripped across 12 channels, all channels are data channels. During this process, the parity bytes and CRC bytes are generated in the similar way as OIF-VSR4-01.0 and stored in the code process module. (3) The code process module will regularly convey the additional parity bytes and CRC bytes to all 12 data channels. (4) After the 8B/10B coding, the 12 channels is transmitted to the parallel VCSEL array. The receive process approximately in reverse order of transmission process. By applying this scheme to 10Gb/s VSR system, the frame size in VSR system is reduced from 15552x12 bytes to 14040x12 bytes, the system redundancy is reduced obviously.

CSR数字高频分析系统的同步采样器HDL设计

本文主要阐述了CSR数字高频分析系统的同步采样器的研究、设计和实现，该分析系统是基于软件无线电技术构建的。 本文的创新点主要在于提出了一种很好的正交同步欠采样方法，这种基于软件无线电原理的I、Q两路正交同步的采样方法，主要利用了平方律部件、一阶环路滤波器和NCO来对I、Q两路采样触发脉冲上升沿的时间差进行闭环控制，从而实现对高频信号的数据采集和处理。这种方法降低了对AD芯片采样速率要求，同时也为后续的基带信号处理提供了方便。 在整个同步采样系统的实现过程中我采用了功能强大的Matlab7.0作为通信算法的仿真平台，选用了AD6645、StratixIIEP2S60和DSP6416作为主要的硬件平台，并在SynaptiCAD和ModelSim中做出了FPGA的HDL程序设计及波形实现

Comparison of a reduced carbohydrate and reduced fat diet for LDL, HDL, and VLDL subclasses during 9-months of weight maintenance subsequent to weight loss.

OBJECTIVES: This study compared LDL, HDL, and VLDL subclasses in overweight or obese adults consuming either a reduced carbohydrate (RC) or reduced fat (RF) weight maintenance diet for 9 months following significant weight loss. METHODS: Thirty-five (21 RC; 14 RF) overweight or obese middle-aged adults completed a 1-year weight management clinic. Participants met weekly for the first six months and bi-weekly thereafter. Meetings included instruction for diet, physical activity, and behavior change related to weight management. Additionally, participants followed a liquid very low-energy diet of approximately 2092 kJ per day for the first three months of the study. Subsequently, participants followed a dietary plan for nine months that targeted a reduced percentage of carbohydrate (approximately 20%) or fat (approximately 30%) intake and an energy intake level calculated to maintain weight loss. Lipid subclasses using NMR spectroscopy were analyzed prior to weight loss and at multiple intervals during weight maintenance. RESULTS: Body weight change was not significantly different within or between groups during weight maintenance (p>0.05). The RC group showed significant increases in mean LDL size, large LDL, total HDL, large and small HDL, mean VLDL size, and large VLDL during weight maintenance while the RF group showed increases in total HDL, large and small HDL, total VLDL, and large, medium, and small VLDL (p<0.05). Group*time interactions were significant for large and medium VLDL (p>0.05). CONCLUSION: Some individual lipid subclasses improved in both dietary groups. Large and medium VLDL subclasses increased to a greater extent across weight maintenance in the RF group.

HDL composition and HDL antioxidant capacity in patients on regular haemodialysis

Recent evidence suggests that HDL can directly inhibit LDL oxidation, a key early stage in atherogenesis. Patients with chronic renal failure are at increased cardiovascular risk, have reduced HDL levels and altered HDL composition. We have therefore investigated whether compositional changes in HDL lead to decreased HDL antioxidant capacity in these patients. In comparison to control subject HDL, patient HDL contained less total cholesterol, cholesterol esters, phospholipids and alpha-tocopherol. LDL, HDL and LDL + HDL were standardised for protein and oxidised in the presence of Cu2+. The rate of propagation during HDL oxidation was reduced in the patient group (3.28 +/- 0.65 x 10(-5) vs. 4.60 +/- 0.97 x 10(-5) abs. U/min, P