998 resultados para voltage response


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A theoretical model for a contactor, collecting electrons from an ambient, unmagnetized plasma and emitting a current Iiis discussed. The relation between Ii and the potential bias of the contactor is found to be crucial for the formation of a quasineutral core around the anode and, consequently, for the current colleted. Approximate analytical laws and charts for the current-voltage response are provided.

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Real-time battery impedance spectrum is acquired using a one-time record. Fast Summation Transformation (FST) is a parallel method of acquiring a real-time battery impedance spectrum using a one-time record that enables battery diagnostics. An excitation current to a battery is a sum of equal amplitude sine waves of frequencies that are octave harmonics spread over a range of interest. A sample frequency is also octave and harmonically related to all frequencies in the sum. The time profile of this signal has a duration that is a few periods of the lowest frequency. The voltage response of the battery, average deleted, is the impedance of the battery in the time domain. Since the excitation frequencies are known and octave and harmonically related, a simple algorithm, FST, processes the time record by rectifying relative to the sine and cosine of each frequency. Another algorithm yields real and imaginary components for each frequency.

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Real time battery impedance spectrum is acquired using one time record, Compensated Synchronous Detection (CSD). This parallel method enables battery diagnostics. The excitation current to a test battery is a sum of equal amplitude sin waves of a few frequencies spread over range of interest. The time profile of this signal has duration that is a few periods of the lowest frequency. The voltage response of the battery, average deleted, is the impedance of the battery in the time domain. Since the excitation frequencies are known, synchronous detection processes the time record and each component, both magnitude and phase, is obtained. For compensation, the components, except the one of interest, are reassembled in the time domain. The resulting signal is subtracted from the original signal and the component of interest is synchronously detected. This process is repeated for each component.

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El desarrollo da las nuevas tecnologías permite a los ingenieros llevar al límite el funcionamiento de los circuitos integrados (Integrated Circuits, IC). Las nuevas generaciones de procesadores, DSPs o FPGAs son capaces de procesar la información a una alta velocidad, con un alto consumo de energía, o esperar en modo de baja potencia con el mínimo consumo posible. Esta gran variación en el consumo de potencia y el corto tiempo necesario para cambiar de un nivel al otro, afecta a las especificaciones del Módulo de Regulador de Tensión (Voltage Regulated Module, VRM) que alimenta al IC. Además, las características adicionales obligatorias, tales como adaptación del nivel de tensión (Adaptive Voltage Positioning, AVP) y escalado dinámico de la tensión (Dynamic Voltage Scaling, DVS), imponen requisitos opuestas en el diseño de la etapa de potencia del VRM. Para poder soportar las altas variaciones de los escalones de carga, el condensador de filtro de salida del VRM se ha de sobredimensionar, penalizando la densidad de energía y el rendimiento durante la operación de DVS. Por tanto, las actuales tendencias de investigación se centran en mejorar la respuesta dinámica del VRM, mientras se reduce el tamaño del condensador de salida. La reducción del condensador de salida lleva a menor coste y una prolongación de la vida del sistema ya que se podría evitar el uso de condensadores voluminosos, normalmente implementados con condensadores OSCON. Una ventaja adicional es que reduciendo el condensador de salida, el DVS se puede realizar más rápido y con menor estrés de la etapa de potencia, ya que la cantidad de carga necesaria para cambiar la tensión de salida es menor. El comportamiento dinámico del sistema con un control lineal (Control Modo Tensión, VMC, o Control Corriente de Pico, Peak Current Mode Control, PCMC,…) está limitado por la frecuencia de conmutación del convertidor y por el tamaño del filtro de salida. La reducción del condensador de salida se puede lograr incrementando la frecuencia de conmutación, así como incrementando el ancho de banda del sistema, y/o aplicando controles avanzados no-lineales. Usando esos controles, las variables del estado se saturan para conseguir el nuevo régimen permanente en un tiempo mínimo, así como el filtro de salida, más específicamente la pendiente de la corriente de la bobina, define la respuesta de la tensión de salida. Por tanto, reduciendo la inductancia de la bobina de salida, la corriente de bobina llega más rápido al nuevo régimen permanente, por lo que una menor cantidad de carga es tomada del condensador de salida durante el tránsito. El inconveniente de esa propuesta es que el rendimiento del sistema es penalizado debido al incremento de pérdidas de conmutación y las corrientes RMS. Para conseguir tanto la reducción del condensador de salida como el alto rendimiento del sistema, mientras se satisfacen las estrictas especificaciones dinámicas, un convertidor multifase es adoptado como estándar para aplicaciones VRM. Para asegurar el reparto de las corrientes entre fases, el convertidor multifase se suele implementar con control de modo de corriente. Para superar la limitación impuesta por el filtro de salida, la segunda posibilidad para reducir el condensador de salida es aplicar alguna modificación topológica (Topologic modifications) de la etapa básica de potencia para incrementar la pendiente de la corriente de bobina y así reducir la duración de tránsito. Como el transitorio se ha reducido, una menor cantidad de carga es tomada del condensador de salida bajo el mismo escalón de la corriente de salida, con lo cual, el condensador de salida se puede reducir para lograr la misma desviación de la tensión de salida. La tercera posibilidad para reducir el condensador de salida del convertidor es introducir un camino auxiliar de energía (additional energy path, AEP) para compensar el desequilibrio de la carga del condensador de salida reduciendo consecuentemente la duración del transitorio y la desviación de la tensión de salida. De esta manera, durante el régimen permanente, el sistema tiene un alto rendimiento debido a que el convertidor principal con bajo ancho de banda es diseñado para trabajar con una frecuencia de conmutación moderada para conseguir requisitos estáticos. Por otro lado, el comportamiento dinámico durante los transitorios es determinado por el AEP con un alto ancho de banda. El AEP puede ser implementado como un camino resistivo, como regulador lineal (Linear regulator, LR) o como un convertidor conmutado. Las dos primeras implementaciones proveen un mayor ancho de banda, acosta del incremento de pérdidas durante el transitorio. Por otro lado, la implementación del convertidor computado presenta menor ancho de banda, limitado por la frecuencia de conmutación, aunque produce menores pérdidas comparado con las dos anteriores implementaciones. Dependiendo de la aplicación, la implementación y la estrategia de control del sistema, hay una variedad de soluciones propuestas en el Estado del Arte (State-of-the-Art, SoA), teniendo diferentes propiedades donde una solución ofrece más ventajas que las otras, pero también unas desventajas. En general, un sistema con AEP ideal debería tener las siguientes propiedades: 1. El impacto del AEP a las pérdidas del sistema debería ser mínimo. A lo largo de la operación, el AEP genera pérdidas adicionales, con lo cual, en el caso ideal, el AEP debería trabajar por un pequeño intervalo de tiempo, solo durante los tránsitos; la otra opción es tener el AEP constantemente activo pero, por la compensación del rizado de la corriente de bobina, se generan pérdidas innecesarias. 2. El AEP debería ser activado inmediatamente para minimizar la desviación de la tensión de salida. Para conseguir una activación casi instantánea, el sistema puede ser informado por la carga antes del escalón o el sistema puede observar la corriente del condensador de salida, debido a que es la primera variable del estado que actúa a la perturbación de la corriente de salida. De esa manera, el AEP es activado con casi cero error de la tensión de salida, logrando una menor desviación de la tensión de salida. 3. El AEP debería ser desactivado una vez que el nuevo régimen permanente es detectado para evitar los transitorios adicionales de establecimiento. La mayoría de las soluciones de SoA estiman la duración del transitorio, que puede provocar un transitorio adicional si la estimación no se ha hecho correctamente (por ejemplo, si la corriente de bobina del convertidor principal tiene un nivel superior o inferior al necesitado, el regulador lento del convertidor principal tiene que compensar esa diferencia una vez que el AEP es desactivado). Otras soluciones de SoA observan las variables de estado, asegurando que el sistema llegue al nuevo régimen permanente, o pueden ser informadas por la carga. 4. Durante el transitorio, como mínimo un subsistema, o bien el convertidor principal o el AEP, debería operar en el lazo cerrado. Implementando un sistema en el lazo cerrado, preferiblemente el subsistema AEP por su ancho de banda elevado, se incrementa la robustez del sistema a los parásitos. Además, el AEP puede operar con cualquier tipo de corriente de carga. Las soluciones que funcionan en el lazo abierto suelen preformar el control de balance de carga con mínimo tiempo, así reducen la duración del transitorio y tienen un impacto menor a las pérdidas del sistema. Por otro lado, esas soluciones demuestran una alta sensibilidad a las tolerancias y parásitos de los componentes. 5. El AEP debería inyectar la corriente a la salida en una manera controlada, así se reduce el riesgo de unas corrientes elevadas y potencialmente peligrosas y se incrementa la robustez del sistema bajo las perturbaciones de la tensión de entrada. Ese problema suele ser relacionado con los sistemas donde el AEP es implementado como un convertidor auxiliar. El convertidor auxiliar es diseñado para una potencia baja, con lo cual, los dispositivos elegidos son de baja corriente/potencia. Si la corriente no es controlada, bajo un pico de tensión de entrada provocada por otro parte del sistema (por ejemplo, otro convertidor conectado al mismo bus), se puede llegar a un pico en la corriente auxiliar que puede causar la perturbación de tensión de salida e incluso el fallo de los dispositivos del convertidor auxiliar. Sin embargo, cuando la corriente es controlada, usando control del pico de corriente o control con histéresis, la corriente auxiliar tiene el control con prealimentación (feed-forward) de tensión de entrada y la corriente es definida y limitada. Por otro lado, si la solución utiliza el control de balance de carga, el sistema puede actuar de forma deficiente si la tensión de entrada tiene un valor diferente del nominal, provocando que el AEP inyecta/toma más/menos carga que necesitada. 6. Escalabilidad del sistema a convertidores multifase. Como ya ha sido comentado anteriormente, para las aplicaciones VRM por la corriente de carga elevada, el convertidor principal suele ser implementado como multifase para distribuir las perdidas entre las fases y bajar el estrés térmico de los dispositivos. Para asegurar el reparto de las corrientes, normalmente un control de modo corriente es usado. Las soluciones de SoA que usan VMC son limitadas a la implementación con solo una fase. Esta tesis propone un nuevo método de control del flujo de energía por el AEP y el convertidor principal. El concepto propuesto se basa en la inyección controlada de la corriente auxiliar al nodo de salida donde la amplitud de la corriente es n-1 veces mayor que la corriente del condensador de salida con las direcciones apropiadas. De esta manera, el AEP genera un condensador virtual cuya capacidad es n veces mayor que el condensador físico y reduce la impedancia de salida. Como el concepto propuesto reduce la impedancia de salida usando el AEP, el concepto es llamado Output Impedance Correction Circuit (OICC) concept. El concepto se desarrolla para un convertidor tipo reductor síncrono multifase con control modo de corriente CMC (incluyendo e implementación con una fase) y puede operar con la tensión de salida constante o con AVP. Además, el concepto es extendido a un convertidor de una fase con control modo de tensión VMC. Durante la operación, el control de tensión de salida de convertidor principal y control de corriente del subsistema OICC están siempre cerrados, incrementando la robustez a las tolerancias de componentes y a los parásitos del cirquito y permitiendo que el sistema se pueda enfrentar a cualquier tipo de la corriente de carga. Según el método de control propuesto, el sistema se puede encontrar en dos estados: durante el régimen permanente, el sistema se encuentra en el estado Idle y el subsistema OICC esta desactivado. Por otro lado, durante el transitorio, el sistema se encuentra en estado Activo y el subsistema OICC está activado para reducir la impedancia de salida. El cambio entre los estados se hace de forma autónoma: el sistema entra en el estado Activo observando la corriente de condensador de salida y vuelve al estado Idle cunado el nuevo régimen permanente es detectado, observando las variables del estado. La validación del concepto OICC es hecha aplicándolo a un convertidor tipo reductor síncrono con dos fases y de 30W cuyo condensador de salida tiene capacidad de 140μF, mientras el factor de multiplicación n es 15, generando en el estado Activo el condensador virtual de 2.1mF. El subsistema OICC es implementado como un convertidor tipo reductor síncrono con PCMC. Comparando el funcionamiento del convertidor con y sin el OICC, los resultados demuestran que se ha logrado una reducción de la desviación de tensión de salida con factor 12, tanto con funcionamiento básico como con funcionamiento AVP. Además, los resultados son comparados con un prototipo de referencia que tiene la misma etapa de potencia y un condensador de salida físico de 2.1mF. Los resultados demuestran que los dos sistemas tienen el mismo comportamiento dinámico. Más aun, se ha cuantificado el impacto en las pérdidas del sistema operando bajo una corriente de carga pulsante y bajo DVS. Se demuestra que el sistema con OICC mejora el rendimiento del sistema, considerando las pérdidas cuando el sistema trabaja con la carga pulsante y con DVS. Por lo último, el condensador de salida de sistema con OICC es mucho más pequeño que el condensador de salida del convertidor de referencia, con lo cual, por usar el concepto OICC, la densidad de energía se incrementa. En resumen, las contribuciones principales de la tesis son: • El concepto propuesto de Output Impedance Correction Circuit (OICC), • El control a nivel de sistema basado en el método usado para cambiar los estados de operación, • La implementación del subsistema OICC en lazo cerrado conjunto con la implementación del convertidor principal, • La cuantificación de las perdidas dinámicas bajo la carga pulsante y bajo la operación DVS, y • La robustez del sistema bajo la variación del condensador de salida y bajo los escalones de carga consecutiva. ABSTRACT Development of new technologies allows engineers to push the performance of the integrated circuits to its limits. New generations of processors, DSPs or FPGAs are able to process information with high speed and high consumption or to wait in low power mode with minimum possible consumption. This huge variation in power consumption and the short time needed to change from one level to another, affect the specifications of the Voltage Regulated Module (VRM) that supplies the IC. Furthermore, additional mandatory features, such as Adaptive Voltage Positioning (AVP) and Dynamic Voltage Scaling (DVS), impose opposite trends on the design of the VRM power stage. In order to cope with high load-step amplitudes, the output capacitor of the VRM power stage output filter is drastically oversized, penalizing power density and the efficiency during the DVS operation. Therefore, the ongoing research trend is directed to improve the dynamic response of the VRM while reducing the size of the output capacitor. The output capacitor reduction leads to a smaller cost and longer life-time of the system since the big bulk capacitors, usually implemented with OSCON capacitors, may not be needed to achieve the desired dynamic behavior. An additional advantage is that, by reducing the output capacitance, dynamic voltage scaling (DVS) can be performed faster and with smaller stress on the power stage, since the needed amount of charge to change the output voltage is smaller. The dynamic behavior of the system with a linear control (Voltage mode control, VMC, Peak Current Mode Control, PCMC,…) is limited by the converter switching frequency and filter size. The reduction of the output capacitor can be achieved by increasing the switching frequency of the converter, thus increasing the bandwidth of the system, and/or by applying advanced non-linear controls. Applying nonlinear control, the system variables get saturated in order to reach the new steady-state in a minimum time, thus the output filter, more specifically the output inductor current slew-rate, determines the output voltage response. Therefore, by reducing the output inductor value, the inductor current reaches faster the new steady state, so a smaller amount of charge is taken from the output capacitor during the transient. The drawback of this approach is that the system efficiency is penalized due to increased switching losses and RMS currents. In order to achieve both the output capacitor reduction and high system efficiency, while satisfying strict dynamic specifications, a Multiphase converter system is adopted as a standard for VRM applications. In order to ensure the current sharing among the phases, the multiphase converter is usually implemented with current mode control. In order to overcome the limitation imposed by the output filter, the second possibility to reduce the output capacitor is to apply Topologic modifications of the basic power stage topology in order to increase the slew-rate of the inductor current and, therefore, reduce the transient duration. Since the transient is reduced, smaller amount of charge is taken from the output capacitor under the same load current, thus, the output capacitor can be reduced to achieve the same output voltage deviation. The third possibility to reduce the output capacitor of the converter is to introduce an additional energy path (AEP) to compensate the charge unbalance of the output capacitor, consequently reducing the transient time and output voltage deviation. Doing so, during the steady-state operation the system has high efficiency because the main low-bandwidth converter is designed to operate at moderate switching frequency, to meet the static requirements, whereas the dynamic behavior during the transients is determined by the high-bandwidth auxiliary energy path. The auxiliary energy path can be implemented as a resistive path, as a Linear regulator, LR, or as a switching converter. The first two implementations provide higher bandwidth, at the expense of increasing losses during the transient. On the other hand, the switching converter implementation presents lower bandwidth, limited by the auxiliary converter switching frequency, though it produces smaller losses compared to the two previous implementations. Depending on the application, the implementation and the control strategy of the system, there is a variety of proposed solutions in the State-of-the-Art (SoA), having different features where one solution offers some advantages over the others, but also some disadvantages. In general, an ideal additional energy path system should have the following features: 1. The impact on the system losses should be minimal. During its operation, the AEP generates additional losses, thus ideally, the AEP should operate for a short period of time, only when the transient is occurring; the other option is to have the AEP constantly on, but due to the inductor current ripple compensation at the output, unnecessary losses are generated. 2. The AEP should be activated nearly instantaneously to prevent bigger output voltage deviation. To achieve near instantaneous activation, the converter system can be informed by the load prior to the load-step or the system can observe the output capacitor current, which is the first system state variable that reacts on the load current perturbation. In this manner, the AEP is turned on with near zero output voltage error, providing smaller output voltage deviation. 3. The AEP should be deactivated once the new steady state is reached to avoid additional settling transients. Most of the SoA solutions estimate duration of the transient which may cause additional transient if the estimation is not performed correctly (e.g. if the main converter inductor current has higher or lower value than needed, the slow regulator of the main converter needs to compensate the difference after the AEP is deactivated). Other SoA solutions are observing state variables, ensuring that the system reaches the new steady state or they are informed by the load. 4. During the transient, at least one subsystem, either the main converter or the AEP, should be in closed-loop. Implementing a closed loop system, preferably the AEP subsystem, due its higher bandwidth, increases the robustness under system tolerances and circuit parasitic. In addition, the AEP can operate with any type of load. The solutions that operate in open loop usually perform minimum time charge balance control, thus reducing the transient length and minimizing the impact on the losses, however they are very sensitive to tolerances and parasitics. 5. The AEP should inject current at the output in a controlled manner, thus reducing the risk of high and potentially damaging currents and increasing robustness on the input voltage deviation. This issue is mainly related to the systems where AEP is implemented as auxiliary converter. The auxiliary converter is designed for small power and, as such, the MOSFETs are rated for small power/currents. If the current is not controlled, due to the some unpredicted spike in input voltage caused by some other part of the system (e.g. different converter), it may lead to a current spike in auxiliary current which will cause the perturbation of the output voltage and even failure of the switching components of auxiliary converter. In the case when the current is controlled, using peak CMC or Hysteretic Window CMC, the auxiliary converter has inherent feed-forwarding of the input voltage in current control and the current is defined and limited. Furthermore, if the solution employs charge balance control, the system may perform poorly if the input voltage has different value than the nominal, causing that AEP injects/extracts more/less charge than needed. 6. Scalability of the system to multiphase converters. As commented previously, in VRM applications, due to the high load currents, the main converters are implemented as multiphase to redistribute losses among the modules, lowering temperature stress of the components. To ensure the current sharing, usually a Current Mode Control (CMC) is employed. The SoA solutions that are implemented with VMC are limited to a single stage implementation. This thesis proposes a novel control method of the energy flow through the AEP and the main converter system. The proposed concept relays on a controlled injection of the auxiliary current at the output node where the instantaneous current value is n-1 times bigger than the output capacitor current with appropriate directions. Doing so, the AEP creates an equivalent n times bigger virtual capacitor at the output, thus reducing the output impedance. Due to the fact that the proposed concept reduces the output impedance using the AEP, it has been named the Output Impedance Correction Circuit (OICC) concept. The concept is developed for a multiphase CMC synchronous buck converter (including a single phase implementation), operating with a constant output voltage and with AVP feature. Further, it is extended to a single phase VMC synchronous buck converter. During the operation, the main converter voltage loop and the OICC subsystem capacitor current loop is constantly closed, increasing the robustness under system tolerances and circuit parasitic and allowing the system to operate with any load-current shape or pattern. According to the proposed control method, the system operates in two states: during the steady-state the system is in the Idle state and the OICC subsystem is deactivated, while during the load-step transient the system is in the Active state and the OICC subsystem is activated in order to reduce the output impedance. The state changes are performed autonomously: the system enters in the Active state by observing the output capacitor current and it returns back to the Idle state when the steady-state operation is detected by observing the state variables. The validation of the OICC concept has been done by applying it to a 30W two phase synchronous buck converter with 140μF output capacitor and with the multiplication factor n equal to 15, generating during the Active state equivalent output capacitor of 2.1mF. The OICC subsystem is implemented as single phase PCMC synchronous buck converter. Comparing the converter operation with and without the OICC the results demonstrate that the 12 times reduction of the output voltage deviation is achieved, for both basic operation and for the AVP operation. Furthermore, the results have been compared to a reference prototype which has the same power stage and a fiscal output capacitor of 2.1mF. The results show that the two systems have the same dynamic behavior. Moreover, an impact on the system losses under the pulsating load and DVS operation has been quantified and it has been demonstrated that the OICC system has improved the system efficiency, considering the losses when the system operates with the pulsating load and the DVS operation. Lastly, the output capacitor of the OICC system is much smaller than the reference design output capacitor, therefore, by applying the OICC concept the power density can be increased. In summary, the main contributions of the thesis are: • The proposed Output Impedance Correction Circuit (OICC) concept, • The system level control based on the used approach to change the states of operation, • The OICC subsystem closed-loop implementation, together with the main converter implementation, • The dynamic losses under the pulsating load and the DVS operation quantification, and • The system robustness on the capacitor impedance variation and consecutive load-steps.

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Background: In view of conflicting neuroimaging results regarding autonomic-specific activity within the anterior cingulate cortex (ACC), we investigated autonomic responses to direct brain stimulation during sterecitactic limbic surgery. Methods: Skin conductance activity and accelerative heart rate responses to multi-voltage stimulation of the ACC (n = 7) and paralimbic subcauclate (n = 5) regions were recorded during bilateral anterior cingulotomy and bilateral subcauclate tractotomy (in patients that had previously received an adequate lesion in the ACC), respectively. Results: Stimulations in both groups were accompanied by increased autonomic arousal. Skin conductance activity was significantly increased during ACC stimulations compared with paralimbic targets at 2 V (2.34 +/- .68 [score in microSiemens +/- SE] vs. .34 +/- .09, p = .013) and 3 V (3.52 +/- .86 vs. 1.12 +/- .37, p = .036), exhibiting a strong ""voltage-response"" relationship between stimulus magnitude and response amplitude (difference from 1 to 3 V = 1.15 +/- .90 vs. 3.52 +/- .86, p = .041). Heart rate response was less indicative of between-group differences. Conclusions: This is the first study of its kind aiming at seeking novel insights into the mechanisms responsible for central autonomic modulation. It supports a concept that interregional interactions account for the coordination of autonomic arousal.

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In this work the flux line dynamics in High-Temperature Superconductor (HTSC) thin films in the presence of columnar defects was studied using electronic transport measurements. The columnar defects which are correlated pinning centers for vortices were generated by irradiation with swift heavy ions at the Gesellschaft für Schwerionenforschung (GSI) in Darmstadt. In the first part, the vortex dynamics is discussed within the framework of the Bose-glass model. This approach describes the continuous transition from a vortex liquid to a Bose-glass phase which is characterized by the localization of the flux lines at the columnar defects. The critical behavior of the characteristic length and time scales for temperatures in the vicinity of this phase transition were probed by scaling properties of experimentally obtained current-voltage characteristics. In contrast to the predicted universal properties of the critical behavior the scaling analysis shows a strong dependence of the dynamic critical exponent on the experimentally accessible electric field range. In addition, the predicted divergence of the activation energy in the limit of low current densities was experimentally not confirmed.The dynamic behavior of flux lines in spatially resolved irradiation geometries is reported in the second part. Weak pinning channels with widths between 10 µm and 100 µm were generated in a strong pinning environment with the use of metal masks and the GSI microprobe, respectively. Measurements of the anisotropic transport properties of these structures show a striking resemblance to the results in YBCO single crystals with unidirected twin boundaries which were interpreted as a guided vortex motion effect. The use of two additional test bridges allowed to determine in parallel the resistivities of the irradiated and unirradiated parts as well as the respective current-voltage characteristics. These measurements provided the input parameters for a numerical simulation of the potential distribution in the spatially resolved irradiation geometry. The results are interpreted within a model that describes the hydrodynamic interaction between a Bose-glass phase and a vortex liquid. The interface between weakly pinned flux lines in the unirradiated channels and strongly pinned vortices leads to a nonuniform vortex velocity profile and therefore a variation of the local electric field. The length scale of these interactions was estimated for the first time in measuring the local variation of the electric field profile in a Bose-glass contact.Finally, a method for the determination of the true temperature in HTSC thin films at high dissipation levels is described. In this regime of electronic transport the occurrence of a flux flow instability is accompanied by heating effects in the vortex system. The heat propagation properties of the film/substrate system are deduced from the time dependent voltage response to a short high current density pulse of rectangular shape. The influence of heavy ion irradiation on the heat resistance at the film/substrate interface is studied.

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One way to achieve amplification of distal synaptic inputs on a dendritic tree is to scale the amplitude and/or duration of the synaptic conductance with its distance from the soma. This is an example of what is often referred to as “dendritic democracy”. Although well studied experimentally, to date this phenomenon has not been thoroughly explored from a mathematical perspective. In this paper we adopt a passive model of a dendritic tree with distributed excitatory synaptic conductances and analyze a number of key measures of democracy. In particular, via moment methods we derive laws for the transport, from synapse to soma, of strength, characteristic time, and dispersion. These laws lead immediately to synaptic scalings that overcome attenuation with distance. We follow this with a Neumann approximation of Green’s representation that readily produces the synaptic scaling that democratizes the peak somatic voltage response. Results are obtained for both idealized geometries and for the more realistic geometry of a rat CA1 pyramidal cell. For each measure of democratization we produce and contrast the synaptic scaling associated with treating the synapse as either a conductance change or a current injection. We find that our respective scalings agree up to a critical distance from the soma and we reveal how this critical distance decreases with decreasing branch radius.

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This study describes a technical analysis of a four-phase line as a transmission system alternative. An analysis in the frequency and the time domains is performed to evaluate the electrical characteristics and the transient response of a generic four-phase system compared with those of a conventional three-phase transmission system. The technical features of this non-conventional system are discussed and reviewed based on the current literature. Thus, a new analysis of the four-phase system is presented that emphasises several technical characteristics that have not been discussed in previous studies.

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The current design life of nuclear power plant (NPP) could potentially be extended to 80 years. During this extended plant life, all safety and operationally relevant Instrumentation & Control (I&C) systems are required to meet their designed performance requirements to ensure safe and reliable operation of the NPP, both during normal operation and subsequent to design base events. This in turn requires an adequate and documented qualification and aging management program. It is known that electrical insulation of I&C cables used in safety related circuits can degrade during their life, due to the aging effect of environmental stresses, such as temperature, radiation, vibration, etc., particularly if located in the containment area of the NPP. Thus several condition monitoring techniques are required to assess the state of the insulation. Such techniques can be used to establish a residual lifetime, based on the relationship between condition indicators and ageing stresses, hence, to support a preventive and effective maintenance program. The object of this thesis is to investigate potential electrical aging indicators (diagnostic markers) testing various I&C cable insulations subjected to an accelerated multi-stress (thermal and radiation) aging.

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High switching frequencies (several MHz) allow the integration of low power DC/DC converters. Although, in theory, a high switching frequency would make possible to implement a conventional Voltage Mode control (VMC) or Peak Current Mode control (PCMC) with very high bandwidth, in practice, parasitic effects and robustness limits the applicability of these control techniques. This paper compares VMC and CMC techniques with the V2IC control. This control is based on two loops. The fast internal loop has information of the output capacitor current and the error voltage, providing fast dynamic response under load and voltage reference steps, while the slow external voltage loop provides accurate steady state regulation. This paper shows the fast dynamic response of the V2IC control under load and output voltage reference steps and its robustness operating with additional output capacitors added by the customer.

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Background: Ruthenium (Ru) tetraamines are being increasingly used as nitric oxide (NO) carriers. In this context, pharmacological studies have become highly relevant to better understand the mechanism of action involved. Objective: To evaluate the vascular response of the tetraamines trans-[RuII(NH3)4(Py)(NO)]3+, trans-[RuII(Cl)(NO) (cyclan)](PF6)2, and trans-[RuII(NH3)4(4-acPy)(NO)]3+. Methods: Aortic rings were contracted with noradrenaline (10-6 M). After voltage stabilization, a single concentration (10-6 M) of the compounds was added to the assay medium. The responses were recorded during 120 min. Vascular integrity was assessed functionally using acetylcholine at 10-6 M and sodium nitroprusside at 10-6 M as well as by histological examination. Results: Histological analysis confirmed the presence or absence of endothelial cells in those tissues. All tetraamine complexes altered the contractile response induced by norepinephrine, resulting in increased tone followed by relaxation. In rings with endothelium, the inhibition of endothelial NO caused a reduction of the contractile effect caused by pyridine NO. No significant responses were observed in rings with endothelium after treatment with cyclan NO. In contrast, in rings without endothelium, the inhibition of guanylate cyclase significantly reduced the contractile response caused by the pyridine NO and cyclan NO complexes, and both complexes caused a relaxing effect. Conclusion: The results indicate that the vascular effect of the evaluated complexes involved a decrease in the vascular tone induced by norepinephrine (10-6 M) at the end of the incubation period in aortic rings with and without endothelium, indicating the slow release of NO from these complexes and suggesting that the ligands promoted chemical stability to the molecule. Moreover, we demonstrated that the association of Ru with NO is more stable when the ligands pyridine and cyclan are used in the formulation of the compound.Fundamento: As tetra-aminas de rutênio cada vez mais se destacam como carreadoras da molécula de óxido nítrico. Desse modo, estudos farmacológicos tornam-se altamente relevantes, afim de melhor compreender o mecanismo de ação envolvido. Objetivo: Avaliar a resposta vascular das tetra-aminas trans-[RuII(NH3)4(Py)(NO)]3+, trans-[RuII(Cl)(NO)(Cyclan)](PF6)2 e trans-[RuII(NH3)4(4-acPy)(NO)]3+. Métodos: Anéis de aorta foram pré-contraídos com noradrenalina (10-6M). Após estabilização da tensão, concentração única (10-6M) dos compostos foi adicionada ao banho de incubação. As respostas foram registradas ao longo de 120 minutos. A integridade vascular foi avaliada funcionalmente (acetilcolina 10-6M; nitroprussiato de sódio 10-6M) e histologicamente Resultados: A análise histológica confirmou a presença ou não de células endoteliais nos tecidos analisados. Todos os complexos alteraram a resposta contrátil induzida pela noradrenalina, resultando em aumento de tônus seguido de efeito relaxante. Em anéis com endotélio, a inibição do óxido nítrico endotelial causou redução do efeito contrátil da piridina óxido nítrico. Não foram observadas respostas significativas em anéis com endotélio referente ao composto cyclan óxido nítrico. Por outro lado, em anéis sem endotélio, a inibição da guanilato ciclase reduziu significativamente a resposta contrátil dos complexos piridina óxido nítrico e cyclan óxido nítrico, levando ambos os compostos a um efeito relaxante. Conclusão: Os resultados obtidos demonstram que o efeito vascular dos complexos avaliados apresentaram diminuição no tônus vascular induzido pela noradrenalina (10-6M) ao final do tempo de incubação, em anéis com e sem endotélio, indicando liberação lenta da molécula de óxido nítrico do composto estudado e sugerindo que os ligantes causaram estabilidade química à molécula. Demonstramos que a ligação rutênio óxido nítrico é mais estável quando utilizamos os ligantes piridina e cyclan para a formulação do composto.

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1. Classical L-type voltage-operated calcium channel (VOCC) antagonists dilate blood vessels, depress myocardial contractility and slow cardiac conduction. 2. We compared four L-type VOCC antagonists and a novel tetralol derivative, mibefradil, reportedly 10-fold more selective for T- (transient) over L-type VOCC in two in vitro assays of human tissue, namely isolated small arteries from the aortic vasa vasorum in a myograph and right atrial trabeculae muscle under isometric force conditions. 3. In arteries contracted with K+ (62 mmol/L), the relaxation pIC(50) values for the VOCC antagonists felodipine, nifedipine, amlodipine, verapamil and mibefradil were 8.30, 7.78, 6.64, 6.26 and 6.22, respectively. In atrial trabeculae, the pIC(50) values to inhibit the inotropic response to a submaximal concentration of isoprenaline (6 nmol/L) for felodipine, nifedipine, verapamil, amlodipine and mibefradil were 7.21, 6.95, 6.91, 5.94 and 4.61, respectively. 4. Taking the anti-log (pIC(50) vessel - pIC(50) atrium) the vascular relaxation to cardiac depression potency ratios for mibefradil, felodipine, nifedipine, amlodipine and verapamil were 41, 12, 7, 5 and 0.22, respectively. 5. We conclude that, in human tissue assays, perhaps T- over L-type VOCC selectivity confers the most favourable vascular selectivity on mibefradil. Alternatively, splice variants of L-type VOCC in the vasculature (CaV1.2b) may be more sensitive to mibefradil than the splice variants in the heart (CaV1.2a).

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This study compared the effects of zinc and odorants on the voltage-gated K+ channel of rat olfactory neurons. Zinc reduced current magnitude, depolarized the voltage activation curve and slowed activation kinetics without affecting inactivation or deactivation kinetics. Zinc inhibition was potentiated by the NO compound, S-nitroso-cysteine. The pH- and diethylpyrocarbonate-dependence of zinc inhibition suggested that zinc acted by binding to histidine residues. Cysteine residues were eliminated as contributing to the zinc-binding site. The odorants, acetophenone and amyl acetate, also reduced current magnitude, depolarized the voltage activation curve and selectively slowed activation kinetics. Furthermore, the diethylpyrocarbonate- and pH-dependence of odorant inhibition implied that the odorants also bind to histidine residues. Zinc inhibitory potency was dramatically diminished in the presence of odorants, implying competition for a common binding site. These observations indicate that the odorants and zinc share a common inhibitory binding site on the external surface of the voltage-gated K+ channel.

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Toxic amides, such as acrylamide, are potentially harmful to Human health, so there is great interest in the fabrication of compact and economical devices to measure their concentration in food products and effluents. The CHEmically Modified Field Effect Transistor (CHEMFET) based onamorphous silicon technology is a candidate for this type of application due to its low fabrication cost. In this article we have used a semi-empirical modelof the device to predict its performance in a solution of interfering ions. The actual semiconductor unit of the sensor was fabricated by the PECVD technique in the top gate configuration. The CHEMFET simulation was performed based on the experimental current voltage curves of the semiconductor unit and on an empirical model of the polymeric membrane. Results presented here are useful for selection and design of CHEMFET membranes and provide an idea of the limitations of the amorphous CHEMFET device. In addition to the economical advantage, the small size of this prototype means it is appropriate for in situ operation and integration in a sensor array.

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In competitive electricity markets with deep concerns at the efficiency level, demand response programs gain considerable significance. In the same way, distributed generation has gained increasing importance in the operation and planning of power systems. Grid operators and utilities are taking new initiatives, recognizing the value of demand response and of distributed generation for grid reliability and for the enhancement of organized spot market´s efficiency. Grid operators and utilities become able to act in both energy and reserve components of electricity markets. This paper proposes a methodology for a joint dispatch of demand response and distributed generation to provide energy and reserve by a virtual power player that operates a distribution network. The proposed method has been computationally implemented and its application is illustrated in this paper using a 32 bus distribution network with 32 medium voltage consumers.