Two-stage photoquenching in semi-insulating GaAs:EL2

The photoquenching of EL2 in semi‐insulating gallium arsenide is seen to be a complex process, where at low temperatures the initial slow quenching is followed by a switch to fast quenching. A possible explanation involving lattice strain mediated cooperative structural relaxation arising out of transition to the metastable state is proposed.

Semi-insulating layer for novel high voltage polysilicon thin film transistors

This work describes the deposition and characterisation of semi-insulating oxygen-doped silicon films for the development of high voltage polycrystalline silicon (poly-Si) circuitry on glass. The performance of a novel poly-Si High Voltage Thin Film Transistor (HVTFT) structure, incorporating a layer of semi-insulating material, has been investigated using a two dimensional device simulator. The semi-insulating layer increases the operating voltage of the HVTFT structure by linearising the potential distribution in the device offset region. A glass compatible semi-insulating layer, suitable for HVTFT applications, has been deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The as-deposited films are furnace annealed at 600°C which is the maximum process temperature. By varying the N2O/SiH4 ratio the conductivity of the annealed films can be accurately controlled up to a maximum of around 10-7 Ω-1cm-1. Helium dilution of the reactant gases improves both film uniformity and reproducibility. Raman analysis shows the as-deposited and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-Doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties.

Low-temperature (≤600 °C) semi-insulating oxygen-doped silicon films by the PECVD technique for large-area power applications

This work describes the deposition, annealing and characterisation of semi-insulating oxygen-doped silicon films at temperatures compatible with polysilicon circuitry on glass. The semi-insulating layers are deposited by the plasma enhanced chemical vapour deposition technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures at a temperature of 350 °C. The as-deposited films are then furnace annealed at 600 °C which is the maximum process temperature. Raman analysis shows the as-deposited and annealed films to be completely amorphous. The most important deposition variable is the N2O SiH4 gas ratio. By varying the N2O SiH4 ratio the conductivity of the annealed films can be accurately controlled, for the first time, down to a minimum of ≈10-7Ω-1cm-1 where they exhibit a T -1 4 temperature dependence indicative of a hopping conduction mechanism. Helium dilution of the reactant gases is shown to improve both film uniformity and reproducibility. A model for the microstructure of these semi-insulating amorphous oxygen-doped silicon films is proposed to explain the observed physical and electrical properties. © 1995.

Low temperature (≤ 600°C) semi-insulating oxygen-doped silicon films by the PECVD technique for large area power applications

This work describes the annealing and characterisation of semi-insulating oxygen-doped silicon films deposited by the Plasma Enhanced Chemical Vapour Deposition (PECVD) technique from silane (SiH4), nitrous oxide (N2O) and helium (He) gas mixtures. The maximum process temperature is chosen to be compatible with large area polycrystalline silicon (poly-Si) circuitry on glass. The most important deposition variable is shown to be the N2O SiH4 gas ratio. Helium dilution results in improved film uniformity and reproducibility. Raman analysis shows the 'as-deposited' and annealed films to be completely amorphous. A model for the microstructure of these Semi-Insulating Amorphous Oxygen-doped Silicon (SIAOS) films is proposed to explain the observed physical and electrical properties. © 1995.

Integratable and High Speed Complex-Coupled MQW-DFB Lasers Fabricated on Semi-Insulating Substrates

A novel integratable and high speed InGaAsP multi-quantum well (MQW) complex-coupled distributed feedback (DFB) laser is successfully fabricated on a semi-insulating substrate. The fabricated ridge DFB laser exhibits a threshold current of 26 mA, a slope efficiency of 0.14 W.A(-1) and a side mode suppression ratio of 40 dB together with a 3 dB bandwidth of more than 8 GHz. The device is suitable for 10 Gbit/s optical fiber communication.

Influence of deep level defects on electrical compensation in semi-insulating InP materials

In this paper, we analyze and compare electrical compensation and deep level defects in semi-insulating ( SI) materials prepared by Fe-doping and high temperature annealing of undoped InP. Influence of deep level defects in the SI-InP materials on the electrical compensation has been studied thermally stimulated current spectroscopy (TSC). Electrical property of the Fe-doped SI-InP is deteriorated due to involvement of a high concentration of deep level defects in the compensation. In contrast, the concentration of deep defects is very low in high temperature annealed undoped SI-InP in which Fe acceptors formed by diffusion act as the only compensation centre to pin the Fermi level, resulting in excellent electrical performance. A more comprehensive electrical compensation model of SI-InP has been given based on the research results.

A comparison between contactless electroreflectance and photoreflectance spectra from n-doped GaAs on a semi-insulating GaAs substrate

Contactless electroreflectance (CER) and photoreflectance (PR) measurements have been performed on samples with the structure of an n-doped GaAs epitaxial layer on a semi- insulating GaAs substrate. Modulated reflectance signals from the n-GaAs surface and those from the n-GaAs/SI-GaAs interface are superposed in PR spectra. For the case of CER measurement, however, Franz-Keldysh oscillations (FKOs) from the interface, which are observed in PR spectra, cannot be detected. This discrepancy is attributed to different modulation mechanisms of CER and PR. In CER experiments, the electric field modulation cannot be added to the interfacial electric field because of the effective screening by the fast response of carriers across the interface. FKOs from the interface without any perturbation by the surface signals are extracted by subtracting CER spectra from PR spectra.

Growth and characterization of semi-insulating GaN films grown by MOCVD

High resistivity unintentionally doped GaN films were grown on (0001) sapphire substrates by metalorganic chemical vapor deposition. The surface morphology of the layer was measured by both atomic force microscopy and scanning electron microscopy. The results show that the films have mirror-like surface morphology with root mean square of 0.3 nm. The full width at half maximum of double crystal X-ray diffraction rocking curve for (0002) GaN is about 5.22 arc-min, indicative of high crystal quality. The resistivity of the GaN epilayers at room temperature and at 250 degrees C was measured to be approximate 10(9) and 10(6) Omega(.)cm respectively, by variable temperature Hall measurement. Deep level traps in the GaN epilayers were investigated by thermally stimulated current and resistivity measurements.

Growth of high quality semi-insulating InP single crystal by suppression of compensation defects

Deep level defects in as-grown and annealed SI-InP samples were investigated by thermally stimulated current spectroscopy. Correlations between electrical property, compensation ratio, thermal stability and deep defect concentration in SI-InP were revealed. An optimized crystal growth condition for high quality SI-InP was demonstrated based on the experimental results.

Annealing and activation of silicon implanted in semi-insulating InP substrates

We have investigated the annealing and activation of silicon implanted in both as-grown Fe-doped semi-insulating (SI) InP substrate and undoped SI InP substrate obtained by annealing high purity conductive InP wafer (wafer-annealed). Si implantations were performed at an energy of 500 keV and a dose of 1 X 10(15) cm(-2). Following the implantations, rapid thermal annealing (RTA) cycles were carried out for 30 s at different temperatures. The results of Raman measurements show that for 700degreesC/30s RTA, the two Si-implanted SI InP substrates have acquired a high degree of lattice recovery and electrical activation. However, further Hall measurements indicate that the carrier concentration of the wafer-annealed SI InP substrate is about three times higher than that of the as-grown Fe-doped SI InP substrate. The difference can be ascribed to the low Fe concentration of the wafer-annealed SI InP substrate.These experimental data imply that the use of the wafer-annealed SI InP substrate can be conducive to the improvement of InP-based device performances. (C) 2003 Elsevier Ltd. All rights reserved.