Compact holographic optical interconnections using nematic liquid crystal spatial light modulators

In a fibre-optic communication network, the wavelength-division multiplexing (WDM) technique enables an expansion of the data-carrying capacity of optical fibres. This can be achieved by transmitting different channels on a single optical fibre, with each channel modulating a different wavelength. In order to access and manipulate these channels at a node of the network, a compact holographic optical switch is designed, modelled, and constructed. The structure of such a switch consists of a series of optical components which are used to collimate the beam from the input, de-multiplex each individual wavelength into separated channels, manipulate the separated channels, and reshape the beam to the output. A spatial light modulator (SLM) is crucial in this system, offering control and flexibility at the channel manipulation stage, and providing the ability to redirect light into the desired output fibre. This is achieved by the use of a 2-D analogue phase computer generated hologram (CGH) based on liquid crystal on silicon (LCOS) technology. © 2011 Copyright Society of Photo-Optical Instrumentation Engineers (SPIE).

A polymeric regenerative optical bus for board-level optical interconnections

A scalable polymer waveguide-based regenerative optical bus architecture for use in board-level communications is presented. As a proof-of-principle demonstration, a 4-channel polymer bus formed on a FR4 substrate providing 10 Gb/s/channel data transmission is reported. © 2012 OSA.

4-Channel polymeric optical bus module for board-level optical interconnections

A 4-channel polymeric optical bus module suitable for use in board-level interconnections is presented. Low-loss and low-crosstalk module performance is achieved, while -1 dB alignment tolerances better than ± 8 μm are demonstrated. © 2012 OSA.

4-channel polymeric optical bus module for board-level optical interconnections

A 4-channel polymeric optical bus module suitable for use in board-levelinterconnections is presented. Low-loss and low-crosstalk module performance is achieved, while-1 dB alignment tolerances better than ± 8 μm are demonstrated. © OSA 2012.

A polymeric regenerative optical bus for board-level optical interconnections

A scalable polymer waveguide-based regenerative optical bus architecture for use in board-level communications is presented. As a proof-of-principle demonstration, a 4-channel polymer bus formed on a FR4 substrate providing 10 Gb/s/channel data transmission is reported. © 2012 OSA.

Investigation of the Effect of Array Geometry on the Performance of Free-Space Optical Interconnects

The effect of transmitter and receiver array configurations on the stray-light and diffraction-caused crosstalk in free-space optical interconnects was investigated. The optical system simulation software (Code V) is used to simulate both the stray-light and diffraction-caused crosstalk. Experimentally measured, spectrally-resolved, near-field images of VCSEL higher order modes were used as extended sources in our simulation model. In addition, we have included the electrical and optical noise in our analysis to give more accurate overall performance of the FSOI system. Our results show that by changing the square lattice geometry to a hexagonal configuration, we obtain an overall signal-to-noise ratio improvement of 3 dB. Furthermore, system density is increased by up to 4 channels/mm2.

Optically active photoresponsive multifunctional polymeric materials

In the last year [1], Angiolini and co-workers have synthesized and investigated methacrylic polymers bearing in the side chain the chiral cyclic (S)-3-hydroxypyrrolidine moiety interposed between the main chain and the trans-azoaromatic chromophore, substituted or not in the 4’ position by an electron-withdrawing group. In these materials, the presence of a rigid chiral moiety of one prevailing absolute configuration favours the establishment of a chiral conformation of one prevailing helical handedness, at least within chain segments of the macromolecules, which can be observed by circular dichroism (CD). The simultaneous presence of the azoaromatic and chiral functionalities allows the polymers to display both the properties typical of dissymmetric systems (optical activity, exciton splitting of dichroic absorptions), as well as the features typical of photochromic materials (photorefractivity, photoresponsiveness, NLO properties). The first part of this research was to synthesize analogue homopolymers and copolymers based on bisazoaromatic moiety and compare their properties to those of the above mentioned analogue derivatives bearing only one azoaromatic chromophore in the side chain. We focused also the attention on the effects induced on the thermal and chiroptical behaviours by the insertion of particulars achiral comonomers characterized by different side-chain mobility and grown hindrance (MMA, tert-BMA and TrMA). On the other hand carbazole containing polymers [2] have attracted much attention because of their unique features. The use of these materials in advanced micro- and nanotechnologies spreads in many different applications such as photoconductive and photorefractive polymers, electroluminescent devices, programmable optical interconnections, data storage, chemical photoreceptors, NLO, surface relief gratings, blue emitting materials and holographic memory. The second part of the work was focused on the synthesis and the characterization polymeric derivatives bearing in the side chain carbazole or phenylcarbazole moieties linked to the (S)- 2-hydroxy succinimide or the (S)-3-hydroxy pyrrolidinyl ring as chiral groups covalently linked to the main chain through ester bonds. The last objective of this research was to design, synthesize, and characterize multifunctional methacrylic homopolymers and copolymers bearing three distinct functional groups (i.e. azoaromatic, carbazole and chiral group of one single configuration) directly linked in the side chain. This polymeric derivatives could be of potential interest for several advanced application fields, such as optical storage, waveguides, chiroptical switches, chemical photoreceptors, NLO, surface relief gratings, photoconductive materials, etc.

A 40 Gb/s optical bus for optical backplane interconnections

Optical technologies have received large interest in recent years for use in board-level interconnects. Polymer multimode waveguides in particular, constitute a promising technology for high-capacity optical backplanes as they can be cost-effectively integrated onto conventional printed circuit boards (PCBs). This paper presents the first optical backplane demonstrator based on the use of PCB-integrated polymer multimode waveguides and a regenerative shared bus architecture. The backplane demonstrator is formed with commercially-available low-cost electronic and photonic components onto conventional FR4 substrates and comprises two opto-electronic (OE) bus modules interconnected via a prototype regenerator unit. The system enables interconnection between the connected cards over four optical channels, each operating at 10 Gb/s. Bus extension is achieved by cascading OE bus modules via 3R regenerator units, overcoming therefore the inherent limitation of optical bus topologies in the maximum number of cards that can be connected to the bus. Details of the design, fabrication, and assembly of the different parts of this optical bus backplane are presented and related optical and data transmission characterisation studies are reported. The optical layer of the OE bus modules comprises a four-channel three-card waveguide layout that is compatible with VCSEL/PD arrays and ribbon fibres. All on-board optical paths exhibit insertion losses below 13 dB and intra-channel crosstalk lower than -29 dB. The robustness of the signal distribution from the bus inputs to all respective bus output ports in the presence of input misalignment is demonstrated, while 1 dB input alignment tolerances of approximately ±10 μm are obtained. The electrical layer of the OE bus modules comprises the essential driving circuitry for 1×4 VCSEL and PD arrays and the corresponding control and power regulation circuits. The interface between the optical and electrical layers of the bus modules is achieved with simple OE connectors that enable end-fired optical coupling into and out of the on-board polymer waveguides. The backplane demonstrator achieves error-free (BER < 10-12) 10 Gb/s data transmission over each optical channel, enabling therefore, an aggregate interconnection capacity of 40 Gb/s between any connected cards. © 1983-2012 IEEE.

Electrical and optical interconnects for high-performance computing

Technology scaling has enabled drastic growth in the computational and storage capacity of integrated circuits (ICs). This constant growth drives an increasing demand for high-bandwidth communication between and within ICs. In this dissertation we focus on low-power solutions that address this demand. We divide communication links into three subcategories depending on the communication distance. Each category has a different set of challenges and requirements and is affected by CMOS technology scaling in a different manner. We start with short-range chip-to-chip links for board-level communication. Next we will discuss board-to-board links, which demand a longer communication range. Finally on-chip links with communication ranges of a few millimeters are discussed.

Electrical signaling is a natural choice for chip-to-chip communication due to efficient integration and low cost. IO data rates have increased to the point where electrical signaling is now limited by the channel bandwidth. In order to achieve multi-Gb/s data rates, complex designs that equalize the channel are necessary. In addition, a high level of parallelism is central to sustaining bandwidth growth. Decision feedback equalization (DFE) is one of the most commonly employed techniques to overcome the limited bandwidth problem of the electrical channels. A linear and low-power summer is the central block of a DFE. Conventional approaches employ current-mode techniques to implement the summer, which require high power consumption. In order to achieve low-power operation we propose performing the summation in the charge domain. This approach enables a low-power and compact realization of the DFE as well as crosstalk cancellation. A prototype receiver was fabricated in 45nm SOI CMOS to validate the functionality of the proposed technique and was tested over channels with different levels of loss and coupling. Measurement results show that the receiver can equalize channels with maximum 21dB loss while consuming about 7.5mW from a 1.2V supply. We also introduce a compact, low-power transmitter employing passive equalization. The efficacy of the proposed technique is demonstrated through implementation of a prototype in 65nm CMOS. The design achieves up to 20Gb/s data rate while consuming less than 10mW.

An alternative to electrical signaling is to employ optical signaling for chip-to-chip interconnections, which offers low channel loss and cross-talk while providing high communication bandwidth. In this work we demonstrate the possibility of building compact and low-power optical receivers. A novel RC front-end is proposed that combines dynamic offset modulation and double-sampling techniques to eliminate the need for a short time constant at the input of the receiver. Unlike conventional designs, this receiver does not require a high-gain stage that runs at the data rate, making it suitable for low-power implementations. In addition, it allows time-division multiplexing to support very high data rates. A prototype was implemented in 65nm CMOS and achieved up to 24Gb/s with less than 0.4pJ/b power efficiency per channel. As the proposed design mainly employs digital blocks, it benefits greatly from technology scaling in terms of power and area saving.

As the technology scales, the number of transistors on the chip grows. This necessitates a corresponding increase in the bandwidth of the on-chip wires. In this dissertation, we take a close look at wire scaling and investigate its effect on wire performance metrics. We explore a novel on-chip communication link based on a double-sampling architecture and dynamic offset modulation technique that enables low power consumption and high data rates while achieving high bandwidth density in 28nm CMOS technology. The functionality of the link is demonstrated using different length minimum-pitch on-chip wires. Measurement results show that the link achieves up to 20Gb/s of data rate (12.5Gb/s/$\mu$m) with better than 136fJ/b of power efficiency.

A model of amacrine and ganglion cells for optical information processing

Based on a previously reported logic cell structure (see SPIE, vol. 2038, p. 67-77, 1993), the two types of cells present at the inner and ganglion cell layers of the vertebrate retina and their intracellular response, as well as their connections with each other, have been simulated. These cells are amacrines and ganglion cells. The main scheme of the authors' configuration is shown in a figure. These two types of cells, as well as some of their possible interconnections, have been implemented with the authors' previously reported optical-processing element. As it has been shown, the authors' logic structure is able to process two optical input binary signals, being the output two logical functions. Moreover, if a delayed feedback from one of the two possible outputs to one or both of the inputs is introduced, a very different behaviour is obtained. Depending on the value of the time delay, an oscillatory output can be obtained from a constant optical input signal. Period and length pulses are dependent on delay values, both external and internal, as well as on other control signals. Moreover, a chaotic behaviour can be obtained too under certain conditions