Studio e realizzazione di un inverter trifase a tre livelli

Lo scopo di questa tesi è lo studio e la realizzazione di una specifica tipologia di inverter, l’inverter trifase a tre livelli di tipo Cascaded. Il primo capitolo descrive l’inverter a due livelli e quello multilivello, evidenziandone gli aspetti peculiari e le possibili applicazioni. Il secondo capitolo affronta nello specifico l’inverter a trifase a tre livelli, per il quale, nel terzo capitolo, ne è descritta una realizzazione pratica, costruita presso i laboratori del Dipartimento di Ingegneria Elettrica dell’Università di Bologna. Nel quarto capitolo vengono presentate alcune prove sperimentali effettuate sul sistema reale.

Natural balancing of flying capacitor voltages in multicell inverter under PD carrier-based PWM

The flying capacitor multicell inverter (FCMI) possesses natural balancing property. With the phase-shifted (PS) carrier-based scheme, natural balancing can be achieved in a straightforward manner. However, to achieve natural balancing with the harmonically optimal phase-disposition (PD) carrierbased scheme, the conventional approaches require (n-1) x (n-1) trapezoidal carrier signals for an n-level inverter, which is (n-1) x (n-2) times more than that in the standard PD scheme. This paper proposes two improved natural balancing strategies for FMI under PD scheme, which use the same (n-1) carrier signals as used in the standard PD scheme. In the first scheme, on-line detection is performed of the band in which the modulation signal is located, corresponding period number of the carrier, and rising or falling half cycle of the carrier waveform to generate the switching signals based on certain rules. In the second strategy, the output voltage level selection is first processed and the switching signals are then generated according to a rule based on preferential cell selection algorithm. These methods are easy to use and can be simply implemented as compared to the other available methods. Simulation and experimental results are presented for a five-level inverter to verify these proposed schemes.

Common-mode voltage eliminated three-level inverter using a three-level flying-capacitor inverter and cascaded H-bridge

This paper proposes a new 3 level common mode voltage eliminated inverter using an inverter structure formed by cascading a H-Bridge with a three-level flying capacitor inverter. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-Bridge fails, the system can still be operated as a normal 3 level inverter mode at full power. This inverter has many advantages like use of single DC-supply, making it possible for a back to back grid-tied converter application, improved reliability etc.

A Three-Level Common-Mode Voltage Eliminated Inverter With Single DC Supply Using Flying Capacitor Inverter and Cascaded H-Bridge

A three-level common-mode voltage eliminated inverter with single dc supply using flying capacitor inverter and cascaded H-bridge has been proposed in this paper. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-bridge fails, the system can still be operated as a normal three-level inverter at full power. This inverter has many other advantages like use of single dc supply, making it possible for a back-to-back grid-tied converter application, improved reliability, etc.

Inverters multilivello per il pilotaggio di motori asincroni trifase

In questo lavoro di laurea si presentano le varie famiglie di convertitori multilivello MMC (Modular Multilevel Converter). Questi convertitori sono di ausilio per il condizionamento dei parametri di reti elettriche in media e alta tensione e possono anche essere convenientemente utilizzati nel pilotaggio di motori asincroni trifase. Dopo aver esplicitato i principi di funzionamento, presentato i dispositivi di commutazione, le tipologie conosciute e le rispettive principali tecniche di modulazione, si è presentato il motore asincrono trifase, il suo circuito equivalente e le problematiche di accoppiamento ad un inverter. Successivamente si è simulato un inverter multilivello di tipo Diode-Clamped, con modulazione analogica PWM multiportante, che aziona un motore asincrono commerciale, così da poterne verificare le prestazioni in diversi regimi di velocità.

Harmonic Analysis of DC-Link Capacitor Current in Sinusoidally Modulated Neutral-Point-Clamped Inverter

The voltage ripple and power loss in the DC-capacitor of a voltage source inverter depend on the harmonic currents flowing through the capacitor. This paper presents double Fourier series based harmonic analysis of DC capacitor current in a three-level neutral point clamped inverter, modulated with sine-triangle PWM. The analytical results are validated experimentally on a 5-kVA three-level inverter prototype. The results of the analysis are used for predicting the power loss in the DC capacitor.

A Seventeen-level Inverter With a Single DC-link For Motor Drives

In the present paper, a novel topology for generating a 17-level inverter using three-level flying capacitor inverter and cascaded H-bridge modules with floating capacitors. The proposed circuit is analyzed and various aspects of it are presented in the paper. This circuit is experimentally verified and the results are shown. The stability of the capacitor balancing algorithm has been verified during sudden acceleration. This circuit has many pole voltage redundancies. This circuit has an advantage of balancing all the capacitor voltages instantaneously by switching through the redundancies. Another advantage of this topology is its ability to generate all the 17 pole voltages from a single DC link which enables back to back converter operation. Also, the proposed inverter can be operated at all load power factors and modulation indices. Another advantage is, if one of the H-bridges fail, the inverter can still be operated at full load with reduced number of levels.

Analysis of the modulation process in advanced bus-clamping PWM techniques

Advanced bus-clamping pulse width modulation (ABCPWM) techniques are advantageous in terms of line current distortion and inverter switching loss in voltage source inverter-fed applications. However, the PWM waveforms corresponding to these techniques are not amenable to carrier-based generation. The modulation process in ABCPWM methods is analyzed here from a “per-phase” perspective. It is shown that three sets of descendant modulating functions (or modified modulating functions) can be generated from the three-phase sinusoidal signals. Each set of the modified modulating functions can be used to produce the PWM waveform of a given phase in a computationally efficient manner. Theoretical results and experimental investigations on a 5hp motor drive are presented

Seventeen-Level Inverter Formed by Cascading Flying Capacitor and Floating Capacitor H-Bridges

A multilevel inverter for generating 17 voltage levels using a three-level flying capacitor inverter and cascaded H-bridge modules with floating capacitors has been proposed. Various aspects of the proposed inverter like capacitor voltage balancing have been presented in the present paper. Experimental results are presented to study the performance of the proposed converter. The stability of the capacitor balancing algorithm has been verified both during transients and steady-state operation. All the capacitors in this circuit can be balanced instantaneously by using one of the pole voltage combinations. Another advantage of this topology is its ability to generate all the voltages from a single dc-link power supply which enables back-to-back operation of converter. Also, the proposed inverter can be operated at all load power factors and modulation indices. Additional advantage is, if one of the H-bridges fail, the inverter can still be operated at full load with reduced number of levels. This configuration has very low dv/dt and common-mode voltage variation.

Evaluation of integrated inverter topologies for low power PV systems

This work presents the stage integration in power electronics converters as a suitable solution for solar photovoltaic inverters. The rated voltages available in Photovoltaic (PV) modules have usually low values for applications such as regulated output voltages in stand-alone or grid-connected configurations. In these cases, a boost stage or a transformer will be necessary. Transformers have low efficiencies, heavy weights and have been used only when galvanic isolation is mandatory. Furthermore, high-frequency transformers increase the converter complexity. Therefore, the most usual topologies use a boost stage and one inverter stage cascaded. However, the complexity, size, weight, cost and lifetime might be improved considering the integration of both stages. These are the expected features to turn attractive this kind of integrated structures. Therefore, some integrated converters are analyzed and compared in this paper in order to support future evaluations and trends for low power single-phase inverters for PV systems. © 2011 IEEE.

Analisi e simulazione di un convertitore a tre livelli per applicazioni di potenza

La tesi presenta l'analisi del funzionamento di un inverter a tre livelli di tipo diode-clamped, confrontando tra loro varie tecniche di modulazione e valutandone l'efficienza (per ulteriori informazioni contattare matteo.toffano@gmail.com).

Flying supercapacitors as power smoothing elements in wind generation

This paper presents a capacitor-clamped three-level inverter-based supercapacitor direct integration scheme for wind energy conversion systems. The idea is to increase the capacitance of clamping capacitors with the use of supercapacitors and allow their voltage to vary within a defined range. Even though this unique approach eliminates the need of interfacing dc-dc converters for supercapacitors, the variable voltage operation brings about several challenges. The uneven distribution of space vectors is the major modulation challenge. A space vector modulation method is proposed in this paper to address this issue and to generate undistorted currents even in the presence of dynamic changes in supercapacitor voltages. A supercapacitor voltage equalization algorithm is also presented. Moreover, control strategies of the proposed system are discussed in detail. Simulation and experimental results are presented to verify the efficacy of the proposed system in suppressing short-term wind power fluctuations.

Space-Vector-Based Hybrid Pulsewidth Modulation Techniques for Reduced Harmonic Distortion and Switching Loss

Novel switching sequences can be employed in spacevector-based pulsewidth modulation (PWM) of voltage source inverters. Differentswitching sequences are evaluated and compared in terms of inverter switching loss. A hybrid PWM technique named minimum switching loss PWM is proposed, which reduces the inverter switching loss compared to conventional space vector PWM (CSVPWM) and discontinuous PWM techniques at a given average switching frequency. Further, four space-vector-based hybrid PWM techniques are proposed that reduce line current distortion as well as switching loss in motor drives, compared to CSVPWM. Theoretical and experimental results are presented.

Single stage converters for low power stand-alone and grid-connected PV systems

This work presents the evaluation of different power electronic integrated converters suitable for photovoltaic applications, in order to reduce complexity and improve reliability. The rated voltages available in Photovoltaic (PV) modules have usually low values for applications such as regulated output voltages in stand-alone or grid-connected configurations. In these cases, a boost stage or a transformer will be necessary. Transformers have low efficiencies, heavy weights and have been used only when galvanic isolation is mandatory. Furthermore, high-frequency transformers increase the converter complexity. Therefore, the most usual topologies use a boost stage and one inverter stage cascaded. However, the complexity, size, weight, cost and lifetime might be improved considering the integration of both stages. In this context, some integrated converters are analyzed and compared in this paper in order to support future evaluations and trends for low power single-phase inverters for PV systems. Power decoupling, MPPT and Tri-State modulations are also considered. Finally, simulation and experimental results are presented and compared for the analyzed topologies. © 2011 IEEE.

Studio di un algoritmo di controllo di temperatura per ganasce termosigillanti in macchine per packaging

Gli obiettivi dell'elaborato sono lo studio e la programmazione di un algoritmo di controllo di temperatura per le superfici termosaldanti di macchine per il packaging (confezionatrici in film a file multiple) prodotte dal committente, OMAG srl. L'algoritmo è implementato tramite il software SoMachineMotion v.4.2, prodotto da Schneider Electrics spa. Il controllo è di tipo in anello chiuso in retroazione, con temocoppie e resistenze di riscaldamento con modulazione PWM. Ci si è inizialmente occupati di testare su banco prova varie tipologie di regolatori: a relay, a isteresi, a ricerca diretta del duty cycle, TBH, con approccio misto TBH/integratore di Clegg, PID. I diversi metodi di regolazione sono stati valutati sulla base di una serie di metri di giudizio (precisione dell'inseguimento, prestazioni statiche e dinamiche, flessibilità, peso computazionale, facilità implementativa), pesati secondo i requisiti imposti dal committente. Le metodologie selezionate sono state PID e TBH/Clegg integrator; quest'ultima ha dato risultati assai soddisfacenti, pur essendo un metodo monoparametrico. Si sono quindi studiate diverse modalità per la taratura del regolatore PID, in particolare: tuning in anello chiuso con metodo a relay per la fase di pretuning, algoritmo di Nelder-Mead, per la ricerca diretta continua dei valori che minimizzano l'errore integrale, per un selftuning adattivo. Si è infine proceduto ad implementare le soluzioni individuate in un software robusto, che rispetti gli standard del settore e si sono inoltre sviluppate una serie di funzionalità aggiuntive, quali: modulazione software PWM, preriscaldamento, handling errori/warning, filtraggio segnali in/out. Si è addizionalmente sviluppato un modello matematico predittivo dell'evoluzione del sistema, che potrebbe servire, in un futuro sviluppo, come base per un controllo model-based in cascata al controllo in retroazione studiato.