997 resultados para hardware development


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This paper presents a review of the design and development of the Yorick series of active stereo camera platforms and their integration into real-time closed loop active vision systems, whose applications span surveillance, navigation of autonomously guided vehicles (AGVs), and inspection tasks for teleoperation, including immersive visual telepresence. The mechatronic approach adopted for the design of the first system, including head/eye platform, local controller, vision engine, gaze controller and system integration, proved to be very successful. The design team comprised researchers with experience in parallel computing, robot control, mechanical design and machine vision. The success of the project has generated sufficient interest to sanction a number of revisions of the original head design, including the design of a lightweight compact head for use on a robot arm, and the further development of a robot head to look specifically at increasing visual resolution for visual telepresence. The controller and vision processing engines have also been upgraded, to include the control of robot heads on mobile platforms and control of vergence through tracking of an operator's eye movement. This paper details the hardware development of the different active vision/telepresence systems.

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Dannie Jost gave an introductory presentation on the emergence on open hardware phenomena, including synthetic biology and other technological environments at the HEPTech Workshop on Open Hardware on June 13 held at the GSI, Darmstadt (Germany). The workshop was organized by CERN and GSI. This event addressed the OSHW phenomenon and its implications for academia and industry with special attention to knowledge and technology transfer issues. Consideration was given to the various aspects of open source hardware development, and how these are dealt with in academia and industry. Presentations from legal experts, academics, practitioners and business provided input for the discussions and exchange of ideas.

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O objectivo da Realidade Virtual é simples de entender mas muito difícil de implementar: criar ambientes completamente indiferenciáveis do mundo real com os quais se possa interagir de um modo natural. Desde a criação do Sensorama por Morton Heiling em 1962, passando pela difusão do conceito pelo público geral na década de 90 até os dias de hoje, a evolução da Realidade Virtual tem sido constante. Este conjunto de tecnologias tem estado envolvido por uma certa descrença por parte da sociedade, motivada pelas grandes expectativas que lhe foram atribuídas e pelo estado de desenvolvimento do hardware aquando do seu auge. No entanto, actualmente assiste-se a um ressurgimento do seu interesse no público geral com a introdução de imagem estereoscópica no cinema ou o sucesso dos controladores da consola Nintendo Wii. Hoje em dia as suas aplicações são muito variadas: desde o treino de pilotos de avião ao tratamento de fobias, passando pela industria do entretenimento e a visita virtual de locais com interesse histórico ou turístico. O objectivo desta tese de mestrado é explorar uma área que ainda não tem sido muito abrangida pela Realidade Virtual e que cobre também aspectos educacionais e lúdicos de modo a ser um factor de atracção para os estudantes do ensino secundário: a simulação de instrumentos musicais. Para tal foi implementado um sistema capaz de simular instrumentos musicais de percussão (uma bateria) utilizando imagem estereoscópica, som posicional e interfaces com o utilizador realistas. Os resultados obtidos nas sessões de avaliação efectuadas por alunos recentemente ingressados no ensino superior demonstram que o sistema desenvolvido, bem como a inovação em interfaces do utilizador com os dispositivos electrónicos de uma forma geral, constituem um meio efectivo na sua motivação para a escolha de um curso na área da engenharia.

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Teaching robotics to students at the beginning of their studies has become a huge challenge. Simulation environments can be an effective solution to that challenge where students can interact with simulated robots and have the first contact with robotic constraints. From our previous experience with simulation environments it was possible to observe that students with lower background knowledge in robotics where able to deal with a limited number of constraints, implement a simulated robotic platform and study several sensors. The question is: after this first phase what should be the best approach? Should the student start developing their own hardware? Hardware development is a very important part of an engineer's education but it can also be a difficult phase that could lead to discouragement and loss of motivation in some students. Considering the previous constraints and first year engineering students’ high abandonment rate it is important to develop teaching strategies to deal with this problem in a feasible way. The solution that we propose is the integration of a low-cost standard robotic platform WowWee Rovio as an intermediate solution between the simulation phase and the stage where the students can develop their own robots. This approach will allow the students to keep working in robotic areas such as: cooperative behaviour, perception, navigation and data fusion. The propose approach proved to be a motivation step not only for the students but also for the teachers. Students and teachers were able to reach an agreement between the level of demand imposed by the teachers and satisfaction/motivation of the students.

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Työssä suunniteltiin ja rakennettiin laite, joka suorittaa reaaliaikaisen Clarken muunnoksen kolmivaiheiselle mittaussignaalille. Kolmivaiheisella mittaussignaalilla tarkoitetaan tässä kolmivaiheisesta järjestelmästä mitattuja vaihevirtoja tai -jännitteitä. Lähtö tuottaa kaksivaiheisen mittaussignaalin, jota voidaan tutkia oskilloskooppia. Käyttämällä oskilloskooppia xy-moodissa näytölle piirtyy virta- tai jänniteympyrä. Laitetta voidaan käyttää esimerkiksi taajuusmuuttajien testauksen apuvälineenä, jolloin parametrien muuttamisen vaikutus laitteen tuottaman sähkön laatuun nähdään välittömästi.

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Sulautettujen järjestelmien tekemisessä käytettävät metodit ovat moninaiset. Tämä johtuu siitä, että sulautettuja järjestelmiä on tuhansia erilaisia, sekä laitteiston ja ohjelmiston rakentamisen eroavaisuuksista. Sovellukset vaihtelevat kännyköistä aina avaruusluotaimiin. Näihin projekteihin on sovellettu metodeita joita ei ole alun perin suunniteltu laitteiston ja ohjelmiston yhteissuunnitteluun ja toteuttamiseen. Ohjelmistotuotannon menetelmistä oikean valinta nimenomaan tietylle sulautetulle järjestelmälle on haasteellista. Viimeisimpinä ovat tulleet erilaiset ketterät menetelmät ja niitäkin on olemassa useita erilaisia. Ketteriä ja perinteisempiä ohjelmistotuotannon menetelmiä esitellään tässä kandidaatin työssä. Tässä työssä on tarkoituksena selvittää mitkä olisivat parhaiten soveltuvia sulautetun järjestelmän projektille.

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Ubiquitous healthcare is an emerging area of technology that uses a large number of environmental and patient sensors and actuators to monitor and improve patients’ physical and mental condition. Tiny sensors gather data on almost any physiological characteristic that can be used to diagnose health problems. This technology faces some challenging ethical questions, ranging from the small-scale individual issues of trust and efficacy to the societal issues of health and longevity gaps related to economic status. It presents particular problems in combining developing computer/information/media ethics with established medical ethics. This article describes a practice-based ethics approach, considering in particular the areas of privacy, agency, equity and liability. It raises questions that ubiquitous healthcare will force practitioners to face as they develop ubiquitous healthcare systems. Medicine is a controlled profession whose practise is commonly restricted by government-appointed authorities, whereas computer software and hardware development is notoriously lacking in such regimes.

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In the two last decades of the past century, following the consolidation of the Internet as the world-wide computer network, applications generating more robust data flows started to appear. The increasing use of videoconferencing stimulated the creation of a new form of point-to-multipoint transmission called IP Multicast. All companies working in the area of software and the hardware development for network videoconferencing have adjusted their products as well as developed new solutionsfor the use of multicast. However the configuration of such different solutions is not easy done, moreover when changes in the operational system are also requirede. Besides, the existing free tools have limited functions, and the current comercial solutions are heavily dependent on specific platforms. Along with the maturity of IP Multicast technology and with its inclusion in all the current operational systems, the object-oriented programming languages had developed classes able to handle multicast traflic. So, with the help of Java APIs for network, data bases and hipertext, it became possible to the develop an Integrated Environment able to handle multicast traffic, which is the major objective of this work. This document describes the implementation of the above mentioned environment, which provides many functions to use and manage multicast traffic, functions which existed only in a limited way and just in few tools, normally the comercial ones. This environment is useful to different kinds of users, so that it can be used by common users, who want to join multimedia Internet sessions, as well as more advenced users such engineers and network administrators who may need to monitor and handle multicast traffic

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Wireless sensor network is an emerging research topic due to its vast and ever-growing applications. Wireless sensor networks are made up of small nodes whose main goal is to monitor, compute and transmit data. The nodes are basically made up of low powered microcontrollers, wireless transceiver chips, sensors to monitor their environment and a power source. The applications of wireless sensor networks range from basic household applications, such as health monitoring, appliance control and security to military application, such as intruder detection. The wide spread application of wireless sensor networks has brought to light many research issues such as battery efficiency, unreliable routing protocols due to node failures, localization issues and security vulnerabilities. This report will describe the hardware development of a fault tolerant routing protocol for railroad pedestrian warning system. The protocol implemented is a peer to peer multi-hop TDMA based protocol for nodes arranged in a linear zigzag chain arrangement. The basic working of the protocol was derived from Wireless Architecture for Hard Real-Time Embedded Networks (WAHREN).

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Esta Tesis aborda el diseño e implementación de aplicaciones en el campo de procesado de señal, utilizando como plataforma los dispositivos reconfigurables FPGA. Esta plataforma muestra una alta capacidad de lógica, e incorpora elementos orientados al procesado de señal, que unido a su relativamente bajo coste, la hacen ideal para el desarrollo de aplicaciones de procesado de señal cuando se requiere realizar un procesado intensivo y se buscan unas altas prestaciones. Sin embargo, el coste asociado al desarrollo en estas plataformas es elevado. Mientras que el aumento en la capacidad lógica de los dispositivos FPGA permite el desarrollo de sistemas completos, los requisitos de altas prestaciones obligan a que en muchas ocasiones se deban optimizar operadores a muy bajo nivel. Además de las restricciones temporales que imponen este tipo de aplicaciones, también tienen asociadas restricciones de área asociadas al dispositivo, lo que obliga a evaluar y verificar entre diferentes alternativas de implementación. El ciclo de diseño e implementación para estas aplicaciones se puede prolongar tanto, que es normal que aparezcan nuevos modelos de FPGA, con mayor capacidad y mayor velocidad, antes de completar el sistema, y que hagan a las restricciones utilizadas para el diseño del sistema inútiles. Para mejorar la productividad en el desarrollo de estas aplicaciones, y con ello acortar su ciclo de diseño, se pueden encontrar diferentes métodos. Esta Tesis se centra en la reutilización de componentes hardware previamente diseñados y verificados. Aunque los lenguajes HDL convencionales permiten reutilizar componentes ya definidos, se pueden realizar mejoras en la especificación que simplifiquen el proceso de incorporar componentes a nuevos diseños. Así, una primera parte de la Tesis se orientará a la especificación de diseños basada en componentes predefinidos. Esta especificación no sólo busca mejorar y simplificar el proceso de añadir componentes a una descripción, sino que también busca mejorar la calidad del diseño especificado, ofreciendo una mayor posibilidad de configuración e incluso la posibilidad de informar de características de la propia descripción. Reutilizar una componente ya descrito depende en gran medida de la información que se ofrezca para su integración en un sistema. En este sentido los HDLs convencionales únicamente proporcionan junto con la descripción del componente la interfaz de entrada/ salida y un conjunto de parámetros para su configuración, mientras que el resto de información requerida normalmente se acompaña mediante documentación externa. En la segunda parte de la Tesis se propondrán un conjunto de encapsulados cuya finalidad es incorporar junto con la propia descripción del componente, información que puede resultar útil para su integración en otros diseños. Incluyendo información de la implementación, ayuda a la configuración del componente, e incluso información de cómo configurar y conectar al componente para realizar una función. Finalmente se elegirá una aplicación clásica en el campo de procesado de señal, la transformada rápida de Fourier (FFT), y se utilizará como ejemplo de uso y aplicación, tanto de las posibilidades de especificación como de los encapsulados descritos. El objetivo del diseño realizado no sólo mostrará ejemplos de la especificación propuesta, sino que también se buscará obtener una implementación de calidad comparable con resultados de la literatura. Para ello, el diseño realizado se orientará a su implementación en FPGA, aprovechando tanto los elementos lógicos generalistas como elementos específicos de bajo nivel disponibles en estos dispositivos. Finalmente, la especificación de la FFT obtenida se utilizará para mostrar cómo incorporar en su interfaz información que ayude para su selección y configuración desde fases tempranas del ciclo de diseño. Abstract This PhD. thesis addresses the design and implementation of signal processing applications using reconfigurable FPGA platforms. This kind of platform exhibits high logic capability, incorporates dedicated signal processing elements and provides a low cost solution, which makes it ideal for the development of signal processing applications, where intensive data processing is required in order to obtain high performance. However, the cost associated to the hardware development on these platforms is high. While the increase in logic capacity of FPGA devices allows the development of complete systems, high-performance constraints require the optimization of operators at very low level. In addition to time constraints imposed by these applications, Area constraints are also applied related to the particular device, which force to evaluate and verify a design among different implementation alternatives. The design and implementation cycle for these applications can be tedious and long, being therefore normal that new FPGA models with a greater capacity and higher speed appear before completing the system implementation. Thus, the original constraints which guided the design of the system become useless. Different methods can be used to improve the productivity when developing these applications, and consequently shorten their design cycle. This PhD. Thesis focuses on the reuse of hardware components previously designed and verified. Although conventional HDLs allow the reuse of components already defined, their specification can be improved in order to simplify the process of incorporating new design components. Thus, a first part of the PhD. Thesis will focus on the specification of designs based on predefined components. This specification improves and simplifies the process of adding components to a description, but it also seeks to improve the quality of the design specified with better configuration options and even offering to report on features of the description. Hardware reuse of a component for its integration into a system largely depends on the information it offers. In this sense the conventional HDLs only provide together with the component description, the input/output interface and a set of parameters for its configuration, while other information is usually provided by external documentation. In the second part of the Thesis we will propose a formal way of encapsulation which aims to incorporate with the component description information that can be useful for its integration into other designs. This information will include features of the own implementation, but it will also support component configuration, and even information on how to configure and connect the component to carry out a function. Finally, the fast Fourier transform (FFT) will be chosen as a well-known signal processing application. It will be used as case study to illustrate the possibilities of proposed specification and encapsulation formalisms. The objective of the FFT design is not only to show practical examples of the proposed specification, but also to obtain an implementation of a quality comparable to scientific literature results. The design will focus its implementation on FPGA platforms, using general logic elements as base of the implementation, but also taking advantage of low-level specific elements available on these devices. Last, the specification of the obtained FFT will be used to show how to incorporate in its interface information to assist in the selection and configuration process early in the design cycle.

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This thesis was elaborated in the scenario of Digital Metropolis Institute (IMD) – a supplementary unit at the Federal University of Rio Grande do Norte in the training of personnel with technical and higher level courses whose technical level training is associated with a process of digital inclusion, with the purpose of attracting young people to this area, with emphasis on Software and Hardware Development. It aims to investigate the cognitive change of young apprentice on technological education and his/her entrance into the labor market, through the formation and the social inclusion proposed by the Instituto Metrópole Digital; understanding the juvenile subjectivity production through the Instituto Metrópole Digital’s education by performance in the labor market; recognizing the Brazilian professional qualification public policies for youth and identifying the role of Tutoring in the learning process during the course of formation of the young apprentice of the technological education proposed by the Instituto Metrópole Digital.The clipping of the object of investigation was the process of cognitive change and constitution of subjectivity of the young apprentice in information technology (IT) in the IMD. It was searched support in theory Freireana as proposal that problematizes the policies and the process of formation and professional qualification, in the perspective of a citizen and liberating consciousness. By qualitative and ethnographic nature, descriptive-explanatory, it counts with the participation of young people, high school students from public and private schools, aged between 15 and 18 years. There are strong aspects: a cognitive change on the young apprentice of technological education onto overdrive high school as the student of the Instituto Metrópole Digital; it happened the social integration for those who remain in the course, both in the neighborhood where they reside and at school where he attended high school, the young man is recognized and becomes reference to other young, favoring him a life projection which when the activities of mentoring is learning motivator, it exerts a positive influence to the young on the continuity of studies, it provides intellectual and institutional affiliation and continuity in the investments to the academic life for a better insertion in the labor market, which refers to the modification of the life project-invest in academic training, in exchange for a technical job in the labor market. There are weak aspects: the absence of professor in the course, in his most important role, which involves awareness of his/her condition in action, in explicit position that the professional practice constitutes as this constitution requires reciprocity of its students and the context in which it operates; fragile formation of mentoring, absence of dialogues in the classroom that favors the formation of subject learning, mainly in guiding action, mediator of the young; There is a lack of methodological proposal to develop real projects on the labor market with problem solving and collaborative learning. It considers that without converting information into knowledge cannot discern clearly enough that there is no direct causal relationship between Professional and technological Education and the level of employability of the young worker certificate. It suggests to the evasion: a greater knowledge of the reality of the student of the Institute Metropolis Digital; better knowledge of youth and their expectations of life project; the Tutoring will be Teacher-tutor; investing in employability conditions effective the young into the labor market.

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The Mine Improvement and New Emergency Response (MINER) Act of 2006 implemented new regulations in the underground coal mining industry that allow for the certification of non-compressed gas equipment for respiratory protection in underground coal mines. NASA’s Kennedy Space Center (KSC) Biomedical Research and Engineering Laboratory (BRL) is investigating the potential to expand cryogenic air supply systems into the mining and general industries. These investigations have, so far, resulted in four separate comparison and hardware development programs. The Propellant Handlers Ensemble (PHE) and Level “A” Ensemble Comparison (LAE): This study compared worker thermal stress while using the industry standard Level A hazardous material handling ensemble as opposed to using the similarly protective Propellant Handler’s Ensemble (PHE) that utilizes a cryogenic air supply pack, known as an Environmental Control Unit (ECU) as opposed to the compressed air Self Contained Breathing Apparatus (SCBA) used in the LAE. The research found that, in a 102°F environment, test subjects experienced significantly decreased body temperature increases, significantly decreased heart rate increases, and decreased sweat loss while performing a standard work routine while using the PHE, compared to the same test subjects performing the same routine while using the LAE. The Cryogenic Refuge Alternative Supply System (CryoRASS) project: The MINER Act of 2006 requires the operators of underground coal mines to provide refuge alternatives that can provide a safe atmosphere for workers for up to 96 hours in the event of a mine emergency. The CryoRASS project retrofitted an existing refuge chamber with a liquid air supply instead of the standard compressed air supply system and performed a 96 hour test. The CryoRASS system demonstrated that it provided a larger air supply in a significantly smaller footprint area, provided humidity and temperature control, and maintained acceptable oxygen and carbon dioxide levels in the chamber for the required amount of time. SCBA and Mine Rescue System (CryoBA/CryoASFS) Another requirement of the MINER Act is that additional emergency breathing equipment must be staged along evacuation routes to supplement the Self Contained/Self Rescue (SCSR) devices that are now required. The BRL has developed an SCBA known as the Cryogenic Breathing Apparatus (CryoBA), that has the ability to provide 2 hours of breathing air, a refill capability, and some cooling for the user. Cryogenic Air Storage and Filling Stations (CryoASFS) would be positioned in critical areas to extend evacuation time. The CryoASFS stations have a significantly smaller footprint and larger air storage capacity to similar compressed air systems. The CryoBA pack is currently undergoing NIOSH certification testing. Technical challenges associated with liquid breathing air systems: Research done by the BRL has also addressed three major technical challenges involved with the widespread use of liquid breathing air. The BRL developed a storage Dewar fitted with a Cryorefrigerator that has stored liquid air for four months with no appreciable oxygen enrichment due to differential evaporation. Testing of liquid breathing air was material and time intensive. A BRL contract developed a system that only required 1 liter of air and five minutes of time compared to the 10 liters of air and 75 minutes of time required by the old method. The BRL also developed a simple and cost effective method of manufacturing liquid air that joins a liquid oxygen tanker with a liquid nitrogen tanker through an orifice controlled “Y” fitting, mixing the two components, and depositing the mixed breathing air in a separate tanker.

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ALICE, that is an experiment held at CERN using the LHC, is specialized in analyzing lead-ion collisions. ALICE will study the properties of quarkgluon plasma, a state of matter where quarks and gluons, under conditions of very high temperatures and densities, are no longer confined inside hadrons. Such a state of matter probably existed just after the Big Bang, before particles such as protons and neutrons were formed. The SDD detector, one of the ALICE subdetectors, is part of the ITS that is composed by 6 cylindrical layers with the innermost one attached to the beam pipe. The ITS tracks and identifies particles near the interaction point, it also aligns the tracks of the articles detected by more external detectors. The two ITS middle layers contain the whole 260 SDD detectors. A multichannel readout board, called CARLOSrx, receives at the same time the data coming from 12 SDD detectors. In total there are 24 CARLOSrx boards needed to read data coming from all the SDD modules (detector plus front end electronics). CARLOSrx packs data coming from the front end electronics through optical link connections, it stores them in a large data FIFO and then it sends them to the DAQ system. Each CARLOSrx is composed by two boards. One is called CARLOSrx data, that reads data coming from the SDD detectors and configures the FEE; the other one is called CARLOSrx clock, that sends the clock signal to all the FEE. This thesis contains a description of the hardware design and firmware features of both CARLOSrx data and CARLOSrx clock boards, which deal with all the SDD readout chain. A description of the software tools necessary to test and configure the front end electronics will be presented at the end of the thesis.

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The development of embedded control systems for a Hybrid Electric Vehicle (HEV) is a challenging task due to the multidisciplinary nature of HEV powertrain and its complex structures. Hardware-In-the-Loop (HIL) simulation provides an open and convenient environment for the modeling, prototyping, testing and analyzing HEV control systems. This thesis focuses on the development of such a HIL system for the hybrid electric vehicle study. The hardware architecture of the HIL system, including dSPACE eDrive HIL simulator, MicroAutoBox II and MotoTron Engine Control Module (ECM), is introduced. Software used in the system includes dSPACE Real-Time Interface (RTI) blockset, Automotive Simulation Models (ASM), Matlab/Simulink/Stateflow, Real-time Workshop, ControlDesk Next Generation, ModelDesk and MotoHawk/MotoTune. A case study of the development of control systems for a single shaft parallel hybrid electric vehicle is presented to summarize the functionality of this HIL system.

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Brain-Computer Interfaces are usually tackled from a medical point of view, correlating observed phenomena to physical facts known about the brain. Existing methods of classification lie in the application of deterministic algorithms and depend on certain degree of knowledge about the underlying phenomena so as to process data. In this demo, different architectures for an evolvable hardware classifier implemented on an FPGA are proposed, in line with the objective of generalizing evolutionary algorithms regardless of the application.