A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication

An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor, in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2 x 2-memory array was prototyped according to a standard 0.8 mum n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 muA less than or equal to I-SAMPLE less than or equal to 0.75 muA. Standby consumption is 6.75 muW per cell @I-SAMPLE = 0.75 muA. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2x(max) = 320 mV(pp) and 2y(max). = 448 mV(pp), yielding a maximum output swing of 0.9 muA(pp). 4QM worst-case nonlinearity is 7.9%.

An accurate low-voltage analog memory-cell with built-in multiplication

A CMOS memory-cell for dynamic storage of analog data and suitable for LVLP applications is proposed. Information is memorized as the gate-voltage of input-transistor of a gain-boosting triode-transconductor. The enhanced output-resistance improves accuracy on reading out the sampled currents. Additionally, a four-quadrant multiplication between the input to regulation-amplifier of the transconductor and the stored voltage is provided. Designing complies with a low-voltage 1.2μm N-well CMOS fabrication process. For a 1.3V-supply, CCELL=3.6pF and sampling interval is 0.25μA≤ ISAMPLE ≤ 0.75μA. The specified retention time is 1.28ms and corresponds to a charge-variation of 1% due to junction leakage @75°C. A range of MR simulations confirm circuit performance. Absolute read-out error is below O.40% while the four-quadrant multiplier nonlinearity, at full-scale is 8.2%. Maximum stand-by consumption is 3.6μW/cell.

Fabrication and Pseudo-Analog Characteristics of Ta2O5 -Based ReRAM Cell

Memristori on yksi elektroniikan peruskomponenteista vastuksen, kondensaattorin ja kelan lisäksi. Se on passiivinen komponentti, jonka teorian kehitti Leon Chua vuonna 1971. Kesti kuitenkin yli kolmekymmentä vuotta ennen kuin teoria pystyttiin yhdistämään kokeellisiin tuloksiin. Vuonna 2008 Hewlett Packard julkaisi artikkelin, jossa he väittivät valmistaneensa ensimmäisen toimivan memristorin. Memristori eli muistivastus on resistiivinen komponentti, jonka vastusarvoa pystytään muuttamaan. Nimens mukaisesti memristori kykenee myös säilyttämään vastusarvonsa ilman jatkuvaa virtaa ja jännitettä. Tyypillisesti memristorilla on vähintään kaksi vastusarvoa, joista kumpikin pystytään valitsemaan syöttämällä komponentille jännitettä tai virtaa. Tämän vuoksi memristoreita kutsutaankin usein resistiivisiksi kytkimiksi. Resistiivisiä kytkimiä tutkitaan nykyään paljon erityisesti niiden mahdollistaman muistiteknologian takia. Resistiivisistä kytkimistä rakennettua muistia kutsutaan ReRAM-muistiksi (lyhenne sanoista resistive random access memory). ReRAM-muisti on Flash-muistin tapaan haihtumaton muisti, jota voidaan sähköisesti ohjelmoida tai tyhjentää. Flash-muistia käytetään tällä hetkellä esimerkiksi muistitikuissa. ReRAM-muisti mahdollistaa kuitenkin nopeamman ja vähävirtaiseman toiminnan Flashiin verrattuna, joten se on tulevaisuudessa varteenotettava kilpailija markkinoilla. ReRAM-muisti mahdollistaa myös useammin bitin tallentamisen yhteen muistisoluun binäärisen (”0” tai ”1”) toiminnan sijaan. Tyypillisesti ReRAM-muistisolulla on kaksi rajoittavaa vastusarvoa, mutta näiden kahden tilan välille pystytään mahdollisesti ohjelmoimaan useampia tiloja. Muistisoluja voidaan kutsua analogisiksi, jos tilojen määrää ei ole rajoitettu. Analogisilla muistisoluilla olisi mahdollista rakentaa tehokkaasti esimerkiksi neuroverkkoja. Neuroverkoilla pyritään mallintamaan aivojen toimintaa ja suorittamaan tehtäviä, jotka ovat tyypillisesti vaikeita perinteisille tietokoneohjelmille. Neuroverkkoja käytetään esimerkiksi puheentunnistuksessa tai tekoälytoteutuksissa. Tässä diplomityössä tarkastellaan Ta2O5 -perustuvan ReRAM-muistisolun analogista toimintaa pitäen mielessä soveltuvuus neuroverkkoihin. ReRAM-muistisolun valmistus ja mittaustulokset käydään läpi. Muistisolun toiminta on harvoin täysin analogista, koska kahden rajoittavan vastusarvon välillä on usein rajattu määrä tiloja. Tämän vuoksi toimintaa kutsutaan pseudoanalogiseksi. Mittaustulokset osoittavat, että yksittäinen ReRAM-muistisolu kykenee binääriseen toimintaan hyvin. Joiltain osin yksittäinen solu kykenee tallentamaan useampia tiloja, mutta vastusarvoissa on peräkkäisten ohjelmointisyklien välillä suurta vaihtelevuutta, joka hankaloittaa tulkintaa. Valmistettu ReRAM-muistisolu ei sellaisenaan kykene toimimaan pseudoanalogisena muistina, vaan se vaati rinnalleen virtaa rajoittavan komponentin. Myös valmistusprosessin kehittäminen vähentäisi yksittäisen solun toiminnassa esiintyvää varianssia, jolloin sen toiminta muistuttaisi enemmän pseudoanalogista muistia.

Multiple synchronous states in static delay-free mutually connected PLL networks

In many engineering applications, the time coordination of geographically separated events is of fundamental importance, as in digital telecommunications and integrated digital circuits. Mutually connected (MC) networks are very good candidates for some new types of application, such as wireless sensor networks. This paper presents a study on the behavior of MC networks of digital phase-locked loops (DPLLs). Analytical results are derived showing that, even for static networks without delays, different synchronous states may exist for the network. An upper bound for the number of such states is also presented. Numerical simulations are used to show the following results: (i) the synchronization precision in MC DPLLs networks; (ii) the existence of synchronous states for the network does not guarantee its achievement and (iii) different synchronous states may be achieved for different initial conditions. These results are important in the neural computation context. as in this case, each synchronous state may be associated to a different analog memory information. (C) 2010 Elsevier B.V. All rights reserved.

Simultaneous co-expression of memory- and effector-related genes by individual human CD8 T cells depends on antigen specificity and differentiation

Purpose/Objective: Phenotypic and functional T cell properties are usually analyzed at the level of defined cell populations. However, large differences between individual T cells may have important functional consequences. To answer this issue, we performed highly sensitive single-cell gene expression profiling, which allows the direct ex vivo characterization of individual virus- and tumor-specific T cells from healthy donors and melanoma patients. Materials and methods: HLA-A*0201-positive patients with stage III/ IV metastatic melanoma were included in a phase I clinical trial (LUD- 00-018). Patients received monthly low-dose of the Melan-AMART- 1 26_35 unmodified natural (EAAGIGILTV) or the analog A27L (ELAGIGILTV) peptides, mixed CPG and IFA. Individual effector memory CD28+ (EM28+) and EM28- tetramer-specific CD8pos T cells were sorted by flow cytometer. Following direct cell lysis and reverse transcription, the resulting cDNA was precipitated and globally amplified. Semi-quantitative PCR was used for gene expression and TCR BV repertoire analyses. Results: We have previously shown that vaccination with the natural Melan-A peptide induced T cells with superior effector functions as compared to the analog peptide optimized for enhanced HLA binding. Here we found that natural peptide vaccination induced EM28+ T cells with frequent co-expression of both memory/homing-associated genes (CD27, IL7R, EOMES, CXCR3 and CCR5) and effector-related genes (IFNG, KLRD1, PRF1 and GZMB), comparable to protective EBV- and CMV-specific T cells. In contrast, memory/homing- and effectorassociated genes were less frequently co-expressed after vaccination with the analog peptide. Conclusions: These findings reveal a previously unknown level of gene expression diversity among vaccine- and virus-specific T cells with the simultaneous co-expression of multiple memory/homing- and effector- related genes by the same cell. Such broad functional gene expression signatures within antigen-specific T cells may be critical for mounting efficient responses to pathogens or tumors. In summary, direct ex vivo high-resolution molecular characterization of individual T cells provides key insights into the processes shaping the functional properties of tumor- and virus-specific T cells.

Activation of human melanoma reactive CD8+ T cells by vaccination with an immunogenic peptide analog derived from Melan-A/melanoma antigen recognized by T cells-1.

PURPOSE: As compared with natural tumor peptide sequences, carefully selected analog peptides may be more immunogenic and thus better suited for vaccination. However, T cells in vivo activated by such altered analog peptides may not necessarily be tumor specific because sequence and structure of peptide analogs differ from corresponding natural peptides. EXPERIMENTAL DESIGN: Three melanoma patients were immunized with a Melan-A peptide analog that binds more strongly to HLA-A*0201 and is more immunogenic than the natural sequence. This peptide was injected together with a saponin-based adjuvant, followed by surgical removal of lymph node(s) draining the site of vaccination. RESULTS: Ex vivo analysis of vaccine site draining lymph nodes revealed antigen-specific CD8+ T cells, which had differentiated to memory cells. In vitro, these cells showed accelerated proliferation upon peptide stimulation. Nearly all (16 of 17) of Melan-A-specific CD8+ T-cell clones generated from these lymph nodes efficiently killed melanoma cells. CONCLUSIONS: Patient immunization with the analog peptide leads to in vivo activation of T cells that were specific for the natural tumor antigen, demonstrating the usefulness of the analog peptide for melanoma immunotherapy.

Simultaneous coexpression of memory-related and effector-related genes by individual human CD8 T cells depends on antigen specificity and differentiation.

Phenotypic and functional cell properties are usually analyzed at the level of defined cell populations but not single cells. Yet, large differences between individual cells may have important functional consequences. It is likely that T-cell-mediated immunity depends on the polyfunctionality of individual T cells, rather than the sum of functions of responding T-cell subpopulations. We performed highly sensitive single-cell gene expression profiling, allowing the direct ex vivo characterization of individual virus-specific and tumor-specific T cells from healthy donors and melanoma patients. We have previously shown that vaccination with the natural tumor peptide Melan-A-induced T cells with superior effector functions as compared with vaccination with the analog peptide optimized for enhanced HLA-A*0201 binding. Here we found that natural peptide vaccination induced tumor-reactive CD8 T cells with frequent coexpression of both memory/homing-associated genes (CD27, IL7R, EOMES, CXCR3, and CCR5) and effector-related genes (IFNG, KLRD1, PRF1, and GZMB), comparable with protective Epstein-Barr virus-specific and cytomegalovirus-specific T cells. In contrast, memory/homing-associated and effector-associated genes were less frequently coexpressed after vaccination with the analog peptide. Remarkably, these findings reveal a previously unknown level of gene expression diversity among vaccine-specific and virus-specific T cells with the simultaneous coexpression of multiple memory/homing-related and effector-related genes by the same cell. Such broad functional gene expression signatures within antigen-specific T cells may be critical for mounting efficient responses to pathogens or tumors. In summary, direct ex vivo high-resolution molecular characterization of individual T cells provides key insights into the processes shaping the functional properties of tumor-specific and virus-specific T cells.

Potential and Challenges of Analog Reconfigurable Computation in Modern and Future CMOS

In this work, the feasibility of the floating-gate technology in analog computing platforms in a scaled down general-purpose CMOS technology is considered. When the technology is scaled down the performance of analog circuits tends to get worse because the process parameters are optimized for digital transistors and the scaling involves the reduction of supply voltages. Generally, the challenge in analog circuit design is that all salient design metrics such as power, area, bandwidth and accuracy are interrelated. Furthermore, poor flexibility, i.e. lack of reconfigurability, the reuse of IP etc., can be considered the most severe weakness of analog hardware. On this account, digital calibration schemes are often required for improved performance or yield enhancement, whereas high flexibility/reconfigurability can not be easily achieved. Here, it is discussed whether it is possible to work around these obstacles by using floating-gate transistors (FGTs), and analyze problems associated with the practical implementation. FGT technology is attractive because it is electrically programmable and also features a charge-based built-in non-volatile memory. Apart from being ideal for canceling the circuit non-idealities due to process variations, the FGTs can also be used as computational or adaptive elements in analog circuits. The nominal gate oxide thickness in the deep sub-micron (DSM) processes is too thin to support robust charge retention and consequently the FGT becomes leaky. In principle, non-leaky FGTs can be implemented in a scaled down process without any special masks by using “double”-oxide transistors intended for providing devices that operate with higher supply voltages than general purpose devices. However, in practice the technology scaling poses several challenges which are addressed in this thesis. To provide a sufficiently wide-ranging survey, six prototype chips with varying complexity were implemented in four different DSM process nodes and investigated from this perspective. The focus is on non-leaky FGTs, but the presented autozeroing floating-gate amplifier (AFGA) demonstrates that leaky FGTs may also find a use. The simplest test structures contain only a few transistors, whereas the most complex experimental chip is an implementation of a spiking neural network (SNN) which comprises thousands of active and passive devices. More precisely, it is a fully connected (256 FGT synapses) two-layer spiking neural network (SNN), where the adaptive properties of FGT are taken advantage of. A compact realization of Spike Timing Dependent Plasticity (STDP) within the SNN is one of the key contributions of this thesis. Finally, the considerations in this thesis extend beyond CMOS to emerging nanodevices. To this end, one promising emerging nanoscale circuit element - memristor - is reviewed and its applicability for analog processing is considered. Furthermore, it is discussed how the FGT technology can be used to prototype computation paradigms compatible with these emerging two-terminal nanoscale devices in a mature and widely available CMOS technology.

Case based reasoning as an extension of fault dictionary methods for linear electronic analog circuits diagnosis

El test de circuits és una fase del procés de producció que cada vegada pren més importància quan es desenvolupa un nou producte. Les tècniques de test i diagnosi per a circuits digitals han estat desenvolupades i automatitzades amb èxit, mentre que aquest no és encara el cas dels circuits analògics. D'entre tots els mètodes proposats per diagnosticar circuits analògics els més utilitzats són els diccionaris de falles. En aquesta tesi se'n descriuen alguns, tot analitzant-ne els seus avantatges i inconvenients. Durant aquests últims anys, les tècniques d'Intel·ligència Artificial han esdevingut un dels camps de recerca més importants per a la diagnosi de falles. Aquesta tesi desenvolupa dues d'aquestes tècniques per tal de cobrir algunes de les mancances que presenten els diccionaris de falles. La primera proposta es basa en construir un sistema fuzzy com a eina per identificar. Els resultats obtinguts son força bons, ja que s'aconsegueix localitzar la falla en un elevat tant percent dels casos. Per altra banda, el percentatge d'encerts no és prou bo quan a més a més s'intenta esbrinar la desviació. Com que els diccionaris de falles es poden veure com una aproximació simplificada al Raonament Basat en Casos (CBR), la segona proposta fa una extensió dels diccionaris de falles cap a un sistema CBR. El propòsit no és donar una solució general del problema sinó contribuir amb una nova metodologia. Aquesta consisteix en millorar la diagnosis dels diccionaris de falles mitjançant l'addició i l'adaptació dels nous casos per tal d'esdevenir un sistema de Raonament Basat en Casos. Es descriu l'estructura de la base de casos així com les tasques d'extracció, de reutilització, de revisió i de retenció, fent èmfasi al procés d'aprenentatge. En el transcurs del text s'utilitzen diversos circuits per mostrar exemples dels mètodes de test descrits, però en particular el filtre biquadràtic és l'utilitzat per provar les metodologies plantejades, ja que és un dels benchmarks proposats en el context dels circuits analògics. Les falles considerades son paramètriques, permanents, independents i simples, encara que la metodologia pot ser fàcilment extrapolable per a la diagnosi de falles múltiples i catastròfiques. El mètode es centra en el test dels components passius, encara que també es podria extendre per a falles en els actius.

Low cost BIST techniques for linear and non-linear analog circuits

With the ever increasing demands for high complexity consumer electronic products, market pressures demand faster product development and lower cost. SoCbased design can provide the required design flexibility and speed by allowing the use of IP cores. However, testing costs in the SoC environment can reach a substantial percent of the total production cost. Analog testing costs may dominate the total test cost, as testing of analog circuits usually require functional verification of the circuit and special testing procedures. For RF analog circuits commonly used in wireless applications, testing is further complicated because of the high frequencies involved. In summary, reducing analog test cost is of major importance in the electronic industry today. BIST techniques for analog circuits, though potentially able to solve the analog test cost problem, have some limitations. Some techniques are circuit dependent, requiring reconfiguration of the circuit being tested, and are generally not usable in RF circuits. In the SoC environment, as processing and memory resources are available, they could be used in the test. However, the overhead for adding additional AD and DA converters may be too costly for most systems, and analog routing of signals may not be feasible and may introduce signal distortion. In this work a simple and low cost digitizer is used instead of an ADC in order to enable analog testing strategies to be implemented in a SoC environment. Thanks to the low analog area overhead of the converter, multiple analog test points can be observed and specific analog test strategies can be enabled. As the digitizer is always connected to the analog test point, it is not necessary to include muxes and switches that would degrade the signal path. For RF analog circuits, this is specially useful, as the circuit impedance is fixed and the influence of the digitizer can be accounted for in the design phase. Thanks to the simplicity of the converter, it is able to reach higher frequencies, and enables the implementation of low cost RF test strategies. The digitizer has been applied successfully in the testing of both low frequency and RF analog circuits. Also, as testing is based on frequency-domain characteristics, nonlinear characteristics like intermodulation products can also be evaluated. Specifically, practical results were obtained for prototyped base band filters and a 100MHz mixer. The application of the converter for noise figure evaluation was also addressed, and experimental results for low frequency amplifiers using conventional opamps were obtained. The proposed method is able to enhance the testability of current mixed-signal designs, being suitable for the SoC environment used in many industrial products nowadays.

Memory enhancement by intrahippocampal, intraamygdala, or intraentorhinal infusion of platelet-activating factor measured in an inhibitory avoidance task.

Platelet-activating factor (PAF; 1-O-alkyl-2-acetyl-sn-glycero-3-phosphocholine), which is thought to be a retrograde messenger in long-term potentiation (LTP), enhances glutamate release and LTP through an action on presynaptic nerve endings. The PAF antagonist BN 52021 blocks CA1 LTP in hippocampal slices, and, when infused into rat dorsal hippocampus pre- or posttraining, blocks retention of inhibitory avoidance. Here we report that memory is affected by pre- or posttraining infusion of the PAF analog 1-O-hexadecyl-2-N-methylcarbamoyl-sn-glycerol-3-phosphocholine (mc-PAF) into either rat dorsal hippocampus, amygdala, or entorhinal cortex. Male Wistar rats were implanted bilaterally with cannulae in these brain regions. After recovery from surgery, the animals were trained in step-down inhibitory avoidance or in a spatial habituation task and tested for retention 24 h later. mc-PAF (1.0 microgram per side) enhanced retention test performance of the two tasks when infused into the hippocampus before training without altering training session performance. In addition, mc-PAF enhanced retention test performance of the avoidance task when infused into (i) the hippocampus 0 but not 60 min after training; (ii) the amygdala immediately after training; and (iii) the entorhinal cortex 100 but not 0 or 300 min after training. In confirmation of previous findings, BN 52021 (0.5 microgram per side) was found to be amnestic for the avoidance task when infused into the hippocampus or the amygdala immediately but not 30 or more minutes after training or into the entorhinal cortex 100 but not 0 or 300 min after training. These findings support the hypothesis that memory involves PAF-regulated events, possibly LTP, generated at the time of training in hippocampus and amygdala and 100 min later in the entorhinal cortex.

Storage of analog variables in delay lines,

Issued also as thesis, University of Illinois.

Toddler subtraction with large sets: further evidence for an analog-magnitude representation of number

Two experiments were conducted to test the hypothesis that toddlers have access to an analog-magnitude number representation that supports numerical reasoning about relatively large numbers. Three-year-olds were presented with subtraction problems in which initial set size and proportions subtracted were systematically varied. Two sets of cookies were presented and then covered The experimenter visibly subtracted cookies from the hidden sets, and the children were asked to choose which of the resulting sets had more. In Experiment 1, performance was above chance when high proportions of objects (3 versus 6) were subtracted from large sets (of 9) and for the subset of older participants (older than 3 years, 5 months; n = 15), performance was also above chance when high proportions (10 versus 20) were subtracted from the very large sets (of 30). In Experiment 2, which was conducted exclusively with older 3-year-olds and incorporated an important methodological control, the pattern of results for the subtraction tasks was replicated In both experiments, success on the tasks was not related to counting ability. The results of these experiments support the hypothesis that young children have access to an analog-magnitude system for representing large approximate quantities, as performance on these subtraction tasks showed a Webers Law signature, and was independent of conventional number knowledge.

PCM-based in-memory computing: architectures, circuits and applications

Analog In-memory Computing (AIMC) has been proposed in the context of Beyond Von Neumann architectures as a valid strategy to reduce internal data transfers energy consumption and latency, and to improve compute efficiency. The aim of AIMC is to perform computations within the memory unit, typically leveraging the physical features of memory devices. Among resistive Non-volatile Memories (NVMs), Phase-change Memory (PCM) has become a promising technology due to its intrinsic capability to store multilevel data. Hence, PCM technology is currently investigated to enhance the possibilities and the applications of AIMC. This thesis aims at exploring the potential of new PCM-based architectures as in-memory computational accelerators. In a first step, a preliminar experimental characterization of PCM devices has been carried out in an AIMC perspective. PCM cells non-idealities, such as time-drift, noise, and non-linearity have been studied to develop a dedicated multilevel programming algorithm. Measurement-based simulations have been then employed to evaluate the feasibility of PCM-based operations in the fields of Deep Neural Networks (DNNs) and Structural Health Monitoring (SHM). Moreover, a first testchip has been designed and tested to evaluate the hardware implementation of Multiply-and-Accumulate (MAC) operations employing PCM cells. This prototype experimentally demonstrates the possibility to reach a 95% MAC accuracy with a circuit-level compensation of cells time drift and non-linearity. Finally, empirical circuit behavior models have been included in simulations to assess the use of this technology in specific DNN applications, and to enhance the potentiality of this innovative computation approach.

The Intrahippocampal Infusion Of Crotamine From Crotalus Durissus Terrificus Venom Enhances Memory Persistence In Rats.

Previous research has shown that crotamine, a toxin isolated from the venom of Crotalus durissus terrificus, induces the release of acetylcholine and dopamine in the central nervous system of rats. Particularly, these neurotransmitters are important modulators of memory processes. Therefore, in this study we investigated the effects of crotamine infusion on persistence of memory in rats. We verified that the intrahippocampal infusion of crotamine (1 μg/μl; 1 μl/side) improved the persistence of object recognition and aversive memory. By other side, the intrahippocampal infusion of the toxin did not alter locomotor and exploratory activities, anxiety or pain threshold. These results demonstrate a future prospect of using crotamine as potential pharmacological tool to treat diseases involving memory impairment, although it is still necessary more researches to better elucidate the crotamine effects on hippocampus and memory.