Automatic layout generation of static CMOS circuits targeting delay and power

The evolution of integrated circuits technologies demands the development of new CAD tools. The traditional development of digital circuits at physical level is based in library of cells. These libraries of cells offer certain predictability of the electrical behavior of the design due to the previous characterization of the cells. Besides, different versions of each cell are required in such a way that delay and power consumption characteristics are taken into account, increasing the number of cells in a library. The automatic full custom layout generation is an alternative each time more important to cell based generation approaches. This strategy implements transistors and connections according patterns defined by algorithms. So, it is possible to implement any logic function avoiding the limitations of the library of cells. Tools of analysis and estimate must offer the predictability in automatic full custom layouts. These tools must be able to work with layout estimates and to generate information related to delay, power consumption and area occupation. This work includes the research of new methods of physical synthesis and the implementation of an automatic layout generation in which the cells are generated at the moment of the layout synthesis. The research investigates different strategies of elements disposition (transistors, contacts and connections) in a layout and their effects in the area occupation and circuit delay. The presented layout strategy applies delay optimization by the integration with a gate sizing technique. This is performed in such a way the folding method allows individual discrete sizing to transistors. The main characteristics of the proposed strategy are: power supply lines between rows, over the layout routing (channel routing is not used), circuit routing performed before layout generation and layout generation targeting delay reduction by the application of the sizing technique. The possibility to implement any logic function, without restrictions imposed by a library of cells, allows the circuit synthesis with optimization in the number of the transistors. This reduction in the number of transistors decreases the delay and power consumption, mainly the static power consumption in submicrometer circuits. Comparisons between the proposed strategy and other well-known methods are presented in such a way the proposed method is validated.

Realization of Optical Logic Gates Using the Thermal Lens Effect

A sensitive method based on the principle of photothermal phenomena to realize optical logic gates is presented. A dual beam thermal lens method using low power cw lasers in a dye-doped polymer can be very effectively used as an alternate technique to perform the logical function such as NAND, AND and OR.

Enzymatic Logic Gates with Noise-Reducing Sigmoid Response

Biochemical computing is an emerging field of unconventional computing that attempts to process information with biomolecules and biological objects using digital logic. In this work we survey filtering in general, in biochemical computing, and summarize the experimental realization of an and logic gate with sigmoid response in one of the inputs. The logic gate is realized with electrode-immobilized glucose-6-phosphate dehydrogenase enzyme that catalyzes a reaction corresponding to the Boolean and functions. A kinetic model is also developed and used to evaluate the extent to which the performance of the experimentally realized logic gate is close to optimal.

All-optical logic gates with 1550nm Fabry-Perot and distributed feedback semiconductor laser amplifiers

The optical bistability occurring in laser diode amplifiers is used to design an all-optical logic gate capable to provide the whole set of logic functions. The structure of the reported logic gate is based on two connected 1550nm laser amplifiers (Fabry-Perot and distributed feedback laser amplifiers).

Chaotic behaviour evaluation in optical logic gates with fractal concepts

A chaotic output was obtained previously by us, from an Optical Programmable Logic Cell when a feedback is added. Some time delay is given to the feedback in order to obtain the non-linear behavior. The working conditions of such a cell is obtained from a simple diagram with fractal properties. We analyze its properties as well as the influence of time delay on the characteristics of the working diagram. A further study of the chaotic obtained signal is presented.

Logic gates using high Rydberg states

Connected logic gates can be operated on the levels of one molecule by making use of the special properties of high Rydberg states. Explicit experimental results for the NO molecule are provided as an example. A number of other options, including that of several gates concatenated so as to operate as a full adder, are discussed. Specific properties of high Rydberg states that are used are: their autoionization is delayed so that they can be distinguished from direct multiphoton ionization, during their long life such states also can decay by energy transfer to the molecular core in a way that can be controlled by the judicious application of very weak external electrical fields, and the Rydberg states can be detected by the application of an ionizing electrical field. The combination of two (or three) color photons with and without external weak fields allows the construction of quite elaborate logic circuit diagrams and shows that taking advantage of the different intramolecular dynamics of levels that differ by their excitation enables the compounding of logic operations on one molecular frame.

Use and description of the CALCOMP program to draw networks of logic gates /

Mode of access: Internet.

A new look at reversible logic implementation of decimal adder

Reversibility plays a fundamental role when logic gates such as AND, OR, and XOR are not reversible. computations with minimal energy dissipation are considered. Hence, these gates dissipate heat and may reduce the life of In recent years, reversible logic has emerged as one of the most the circuit. So, reversible logic is in demand in power aware important approaches for power optimization with its circuits. application in low power CMOS, quantum computing and A reversible conventional BCD adder was proposed in using conventional reversible gates.

Asymptotically Zero Energy Computing Using Split-Level Charge Recovery Logic

The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers. In this work we present a number of new CMOS logic families, Charge Recovery Logic (CRL) as well as the much improved Split-Level Charge Recovery Logic (SCRL), within which the transfer of charge between the nodes occurs quasistatically. Operating quasistatically, these logic families have an energy dissipation that drops linearly with operating frequency, i.e., their power consumption drops quadratically with operating frequency as opposed to the linear drop of conventional CMOS. The circuit techniques in these new families rely on constructing an explicitly reversible pipelined logic gate, where the information necessary to recover the energy used to compute a value is provided by computing its logical inverse. Information necessary to uncompute the inverse is available from the subsequent inverse logic stage. We demonstrate the low energy operation of SCRL by presenting the results from the testing of the first fully quasistatic 8 x 8 multiplier chip (SCRL-1) employing SCRL circuit techniques.

Logic-Based Delivery of Site-Specifically-Modified Proteins from Gels through Engineered Biomacromolecular Architecture

Thesis (Master's)--University of Washington, 2016-08

Contrasting photoelectrochemical behaviour of two isomeric supramolecular dyes based on meso-tetra(pyridyl)porphyrin incorporating four (mu(3)-oxo)- triruthenium(III) clusters

A saddle shaped tetracluster porphyrin species containing four [Ru(3)O(OAc)(6)(py)(2)](+) clusters coordinated to the N-pyridyl atoms of 5,10,15,20-tetra(3-pyridyl)porphyrin, H(2)(3-TCPyP), has been investigated in comparison with the planar tetra(4-pyridyl) porphyrin analogue H(2)(4-TCPyP). The steric effects from the bulky peripheral complexes play a critical role in the H(2)(3-TCPyP) species, determining a non-planar configuration around the porphyrin centre and precluding any significant pi-electronic coupling, in contrast with the less hindered H(2)(4-TCPyP) species. Both systems exhibit a photoelectrochemical response in the presence of nanocrystalline TiO(2) films, involving the porphyrin excitation around 450 nm. However, only in the H(2)(4-TCPyP) case do the cluster moieties also contribute to the photoinduced electron injection process at 670 nm, reflecting the relevance of the electronic coupling between the porphyrin centre and the peripheral complexes.

Rough Notes on Programming AVR Microcontrollers in C

These notes follow on from the material that you studied in CSSE1000 Introduction to Computer Systems. There you studied details of logic gates, binary numbers and instruction set architectures using the Atmel AVR microcontroller family as an example. In your present course (METR2800 Team Project I), you need to get on to designing and building an application which will include such a microcontroller. These notes focus on programming an AVR microcontroller in C and provide a number of example programs to illustrate the use of some of the AVR peripheral devices.

Novel solitons in parametric amplifiers and atom lasers

We review recent developments in quantum and classical soliton theory, leading to the possibility of observing both classical and quantum parametric solitons in higher-dimensional environments. In particular, we consider the theory of three bosonic fields interacting via both parametric (cubic) and quartic couplings. In the case of photonic fields in a nonlinear optical medium this corresponds to the process of sum frequency generation (via chi((2)) nonlinearity) modified by the chi((3)) nonlinearity. Potential applications include an ultrafast photonic AND-gate. The simplest quantum solitons or energy eigenstates (bound-state solutions) of the interacting field Hamiltonian are obtained exactly in three space dimensions. They have a point-like structure-even though the corresponding classical theory is nonsingular. We show that the solutions can be regularized with the imposition of a momentum cut-off on the nonlinear couplings. The case of three-dimensional matter-wave solitons in coupled atomic/molecular Bose-Einstein condensates is discussed.

Quantum controlled-NOT gate with 'hot' trapped ions

We present a novel method of performing quantum logic gates in trapped ion quantum computers which does not require the ions to be cooled down to the ground state of their vibrational modes, thereby avoiding one of the principal experimental difficulties encountered in realizing this technology. Our scheme employs adiabatic passages and a phase shift conditional on the phonon number state.

JPEG decoder implementation on FPGA using dynamic partial reconfiguration

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia de Electrónica e telecomunicações