951 resultados para Slice Topology
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* This work was supported by the CNR while the author was visiting the University of Milan.
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PURPOSE: To introduce techniques for deriving a map that relates visual field locations to optic nerve head (ONH) sectors and to use the techniques to derive a map relating Medmont perimetric data to data from the Heidelberg Retinal Tomograph. METHODS: Spearman correlation coefficients were calculated relating each visual field location (Medmont M700) to rim area and volume measures for 10 degrees ONH sectors (HRT III software) for 57 participants: 34 with glaucoma, 18 with suspected glaucoma, and 5 with ocular hypertension. Correlations were constrained to be anatomically plausible with a computational model of the axon growth of retinal ganglion cells (Algorithm GROW). GROW generated a map relating field locations to sectors of the ONH. The sector with the maximum statistically significant (P < 0.05) correlation coefficient within 40 degrees of the angle predicted by GROW for each location was computed. Before correlation, both functional and structural data were normalized by either normative data or the fellow eye in each participant. RESULTS: The model of axon growth produced a 24-2 map that is qualitatively similar to existing maps derived from empiric data. When GROW was used in conjunction with normative data, 31% of field locations exhibited a statistically significant relationship. This significance increased to 67% (z-test, z = 4.84; P < 0.001) when both field and rim area data were normalized with the fellow eye. CONCLUSIONS: A computational model of axon growth and normalizing data by the fellow eye can assist in constructing an anatomically plausible map connecting visual field data and sectoral ONH data.
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Review of 'The True Story of Butterfish', Brisbane Festival / Brisbane Powerhouse, published in The Australian, 6 October 2009.
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This paper presents a new DC-DC Multi-Output Boost (MOB) converter which can share its total output between different series of output voltages for low and high power applications. This configuration can be utilised instead of several single output power supplies. This is a compatible topology for a diode-clamed inverter in the grid connection systems, where boosting low rectified output-voltage and series DC link capacitors is required. To verify the proposed topology, steady state and dynamic analysis of a MOB converter are examined. A simple control strategy has been proposed to demonstrate the performance of the proposed topology for a double-output boost converter. The topology and its control strategy can easily be extended to offer multiple outputs. Simulation and experimental results are presented to show the validity of the control strategy for the proposed converter.
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A novel H-bridge multilevel PWM converter topology based on a series connection of a high voltage (HV) diode-clamped inverter and a low voltage (LV) conventional inverter is proposed. A DC link voltage arrangement for the new hybrid and asymmetric solution is presented to have a maximum number of output voltage levels by preserving the adjacent switching vectors between voltage levels. Hence, a fifteen-level hybrid converter can be attained with a minimum number of power components. A comparative study has been carried out to present high performance of the proposed configuration to approach a very low THD of voltage and current, which leads to the possible elimination of output filter. Regarding the proposed configuration, a new cascade inverter is verified by cascading an asymmetrical diode-clamped inverter, in which nineteen levels can be synthesized in output voltage with the same number of components. To balance the DC link capacitor voltages for the maximum output voltage resolution as well as synthesise asymmetrical DC link combination, a new Multi-output Boost (MOB) converter is utilised at the DC link voltage of a seven-level H-bridge diode-clamped inverter. Simulation and hardware results based on different modulations are presented to confirm the validity of the proposed approach to achieve a high quality output voltage.
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Improving efficiency and flexibility in pulsed power supply technologies is the most substantial concern of pulsed power systems specifically with regard to plasma generation. Recently, the improvement of pulsed power supply has become of greater concern due to the extension of pulsed power applications to environmental and industrial areas. With this respect, a current source based topology is proposed in this paper as a pulsed power supply which gives the possibility of power flow control during load supplying mode. The main contribution in this configuration is utilization of low-medium voltage semiconductor switches for high voltage generation. A number of switch-diode-capacitor units are designated at the output of topology to exchange the current source energy into voltage form and generate a pulsed power with sufficient voltage magnitude and stress. Simulations carried out in Matlab/SIMULINK platform as well as experimental tests on a prototype setup have verified the capability of this topology in performing desired duties. Being efficient and flexible are the main advantages of this topology.
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Performance comparisons between File Signatures and Inverted Files for text retrieval have previously shown several significant shortcomings of file signatures relative to inverted files. The inverted file approach underpins most state-of-the-art search engine algorithms, such as Language and Probabilistic models. It has been widely accepted that traditional file signatures are inferior alternatives to inverted files. This paper describes TopSig, a new approach to the construction of file signatures. Many advances in semantic hashing and dimensionality reduction have been made in recent times, but these were not so far linked to general purpose, signature file based, search engines. This paper introduces a different signature file approach that builds upon and extends these recent advances. We are able to demonstrate significant improvements in the performance of signature file based indexing and retrieval, performance that is comparable to that of state of the art inverted file based systems, including Language models and BM25. These findings suggest that file signatures offer a viable alternative to inverted files in suitable settings and positions the file signatures model in the class of Vector Space retrieval models.
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Appearance-based localization can provide loop closure detection at vast scales regardless of accumulated metric error. However, the computation time and memory requirements of current appearance-based methods scale not only with the size of the environment but also with the operation time of the platform. Additionally, repeated visits to locations will develop multiple competing representations, which will reduce recall performance over time. These properties impose severe restrictions on long-term autonomy for mobile robots, as loop closure performance will inevitably degrade with increased operation time. In this paper we present a graphical extension to CAT-SLAM, a particle filter-based algorithm for appearance-based localization and mapping, to provide constant computation and memory requirements over time and minimal degradation of recall performance during repeated visits to locations. We demonstrate loop closure detection in a large urban environment with capped computation time and memory requirements and performance exceeding previous appearance-based methods by a factor of 2. We discuss the limitations of the algorithm with respect to environment size, appearance change over time and applications in topological planning and navigation for long-term robot operation.
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Distributed Genetic Algorithms (DGAs) designed for the Internet have to take its high communication cost into consideration. For island model GAs, the migration topology has a major impact on DGA performance. This paper describes and evaluates an adaptive migration topology optimizer that keeps the communication load low while maintaining high solution quality. Experiments on benchmark problems show that the optimized topology outperforms static or random topologies of the same degree of connectivity. The applicability of the method on real-world problems is demonstrated on a hard optimization problem in VLSI design.
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Advances in solid-state switches and power electronics techniques have led to the development of compact, efficient and more reliable pulsed power systems. This paper proposes an efficient scheme that utilizes modular switch-capacitor units in obtaining high voltage levels with fast rise time (dv/dt) using low voltage solid-state switches. The proposed pulsed power supply has flexibility in terms of controlling energy and generating broad range of voltage levels. The energy flow can be controlled as the stored energy can be adjusted by a current source utilized at the first stage of the system. Desirable voltage level can be obtained by connecting adequate number of switch-capacitor units. Moreover, the proposed topology is load independent. Therefore it can easily supply wide range of applications especially the low impedance ones. The effectiveness of the proposed approach is verified by simulations
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Automated process discovery techniques aim at extracting models from information system logs in order to shed light into the business processes supported by these systems. Existing techniques in this space are effective when applied to relatively small or regular logs, but otherwise generate large and spaghetti-like models. In previous work, trace clustering has been applied in an attempt to reduce the size and complexity of automatically discovered process models. The idea is to split the log into clusters and to discover one model per cluster. The result is a collection of process models -- each one representing a variant of the business process -- as opposed to an all-encompassing model. Still, models produced in this way may exhibit unacceptably high complexity. In this setting, this paper presents a two-way divide-and-conquer process discovery technique, wherein the discovered process models are split on the one hand by variants and on the other hand hierarchically by means of subprocess extraction. The proposed technique allows users to set a desired bound for the complexity of the produced models. Experiments on real-life logs show that the technique produces collections of models that are up to 64% smaller than those extracted under the same complexity bounds by applying existing trace clustering techniques.
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This paper presents work in progress of EatChaFood – a prototype app designed to increase user knowledge of the currently available domestic supply and location of food, with a view to reducing expired household food waste. In order to reap the benefits that EatChaFood can provide we explore ways to overcome manual data entry as a barrier to use. Our user study has to recognise the limitations of the prototype app, and conduct an evaluation of the interaction design built into the app to promote behaviour change. Innovations in the near future such as the automatic scanning of barcodes on food items or photo-recognition will close the gap between perceived prototype usability and usefulness.
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A design for a cascaded multilevel DC-DC converter is proposed. The applications of a multilevel converter and the design issues involved in changing from a single converter to multiple converters are discussed. Implementation of the multilevel system using multiple Cuk converters is suggested and explanations of design decisions are given. The merits of the proposed design are discussed.
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Two lecture notes describe recent developments of evolutionary multi objective optimization (MO) techniques in detail and their advantages and drawbacks compared to traditional deterministic optimisers. The role of Game Strategies (GS), such as Pareto, Nash or Stackelberg games as companions or pre-conditioners of Multi objective Optimizers is presented and discussed on simple mathematical functions in Part I , as well as their implementations on simple aeronautical model optimisation problems on the computer using a friendly design framework in Part II. Real life (robust) design applications dealing with UAVs systems or Civil Aircraft and using the EAs and Game Strategies combined material of Part I & Part II are solved and discussed in Part III providing the designer new compromised solutions useful to digital aircraft design and manufacturing. Many details related to Lectures notes Part I, Part II and Part III can be found by the reader in [68].