2 resultados para SBCD


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Calcineurin-like metallophosphoesterases (MPEs) form a large superfamily of binuclear metal-ion-centre-containing enzymes that hydrolyse phosphomono-, phosphodi-or phosphotri-esters in a metal-dependent manner. The MPE domain is found in Mre11/SbcD DNA-repair enzymes, mammalian phosphoprotein phosphatases, acid sphingomyelinases, purple acid phosphatases, nucleotidases and bacterial cyclic nucleotide phosphodiesterases. Despite this functional diversity, MPEs show a remarkably similar structural fold and active-site architecture. In the present review, we summarize the available structural, biochemical and functional information on these proteins. We also describe how diversification and specialization of the core MPE fold in various MPEs is achieved by amino acid substitution in their active sites, metal ions and regulatory effects of accessory domains. Finally, we discuss emerging roles of these proteins as non-catalytic protein-interaction scaffolds. Thus we view the MPE superfamily as a set of proteins with a highly conserved structural core that allows embellishment to result in dramatic and niche-specific diversification of function.

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The Brazilian Environmental Data Collecting System (SBCDA) collects and broadcasts meteorological and environmental data, to be handled by dozens of institutions and organizations. The system space segment, composed by the data collecting satellites, plays an important role for the system operation. To ensure the continuity and quality of these services, efforts are being made to the development of new satellite architectures. Aiming a reduction of size and power consumption, the design of an integrated circuit containing a receiver front-end is proposed, to be embedded in the next SBCDA satellite generations. The circuit will also operate under the requirements of the international data collecting standard ARGOS. This work focuses on the design of an UHF low noise amplifier and mixers in a CMOS standard technology. The specifi- cations are firstly described and the circuit topologies presented. Then the circuit conception is discussed and the design variables derived. Finally, the layout is designed and the final results are commented. The chip will be fabricated in a 130 nm technology from ST Microelectronics.