Development and testing of the atlas ibl rod pre production boards

Il lavoro di questa tesi riguarda principalmente la progettazione, simulazione e test di laboratorio di tre versioni successive di schede VME, chiamate Read Out Driver (ROD), che sono state fabbricate per l'upgrade del 2014 dell'esperimento ATLAS Insertable B-Layer (IBL) al CERN. IBL è un nuovo layer che diverrà parte del Pixel Detector di ATLAS. Questa tesi si compone di una panoramica descrittiva dell'esperimento ATLAS in generale per poi concentrarsi sulla descrizione del layer specifico IBL. Inoltre tratta in dettaglio aspetti fisici e tecnici: specifiche di progetto, percorso realizzativo delle schede e test conseguenti. Le schede sono state dapprima prodotte in due prototipi per testare le prestazioni del sistema. Queste sono state fabbricate al fine di valutare le caratteristiche e prestazioni complessive del sistema di readout. Un secondo lotto di produzione, composto di cinque schede, è stato orientato alla correzione fine delle criticità emerse dai test del primo lotto. Un'indagine fine e approfondita del sistema ha messo a punto le schede per la fabbricazione di un terzo lotto di altre cinque schede. Attualmente la produzione è finita e complessivamente sono state realizzate 20 schede definitive che sono in fase di test. La produzione sarà validata prossimamente e le 20 schede verranno consegnate al CERN per essere inserite nel sistema di acquisizione dati del rivelatore. Al momento, il Dipartimento di Fisica ed Astronomia dell'Università di Bologna è coinvolto in un esperimento a pixel solamente attravers IBL descritto in questa tesi. In conclusione, il lavoro di tesi è stato prevalentemente focalizzato sui test delle schede e sul progetto del firmware necessario per la calibrazione e per la presa dati del rivelatore.

Single electron transfer-driven multi-dimensional signal read-out function of TCNQ as an ``off-the-shelf'' detector for cyanide

Herein we report the first applications of TCNQ as a rapid and highly sensitive off-the-shelf cyanide detector. As a proof-of-concept, we have applied a kinetically selective single-electron transfer (SET) from cyanide to deep-lying LUMO orbitals of TCNQ to generate a persistently stable radical anion (TCNQ(center dot-)), under ambient condition. In contrast to the known cyanide sensors that operate with limited signal outputs, TCNQ(center dot-) offers a unique multiple signaling platform. The signal readability is facilitated through multichannel absorption in the UV-vis-NIR region and scattering-based spectroscopic methods like Raman spectroscopy and hyper Rayleigh scattering techniques. Particularly notable is the application of the intense 840 nm NIR absorption band to detect cyanide. This can be useful for avoiding background interference in the UV-vis region predominant in biological samples. We also demonstrate the fabrication of a practical electronic device with TCNQ as a detector. The device generates multiorder enhancement in current with cyanide because of the formation of the conductive TCNQ(center dot-).

多路谱仪放大器输出信号的读出与数据采集

A read-out and data acquisition system for the outputs of multi-channel spectroscopy amplifiers is introduced briefly in this paper.The 16-channel gating integrator/multiplexer developed by us and PXI-DAQ card are used to construct this system.A virtual instrument system for displaying,indicating,measuring and recording of output waveform is accomplished by integrating the PC,hardware,software together flexibly based on the Lab Windows/CVI platform in our read-out and data acquisition system.In this system,...中文文摘：简要介绍一个针对多路谱仪放大器的读出与数据采集方法与系统。该系统基于16通道门积分/选通输出电路和通用PXI-DAQ卡构建。利用Lab Windows/CVI平台构建虚拟仪器,灵活地将计算机、硬件、软件结合起来,设计了一个读出与数据采集系统。在该系统中,一个ADC通道可以面对16个谱仪放大器的输出,有效地提高了系统的集成度,降低了数据采集系统的成本。该设计为利用通用型谱仪放大器构建数百参数的信号读出与数据采集系统提供了一种新的方法。通过实验验证,证明该系统具有智能化、可靠性高、实时性强、成本低等优点。

Characterization and Test of a Data Acquisition System for PET

A small Positron Emission Tomography demonstrator based on LYSO slabs and Silicon Photomultiplier matrices is under construction at the University and INFN of Pisa. In this paper we present the characterization results of the read-out electronics and of the detection system. Two SiPM matrices, composed by 8 × 8 SiPM pixels, 1.5 mm pitch, have been coupled one to one to a LYSO crystals array. Custom Front-End ASICs were used to read the 64 channels of each matrix. Data from each Front-End were multiplexed and sent to a DAQ board for the digital conversion; a motherboard collects the data and communicates with a host computer through a USB port. Specific tests were carried out on the system in order to assess its performance. Futhermore we have measured some of the most important parameters of the system for PET application.

Timing performances of a data acquisition system for time of flight PET

We are investigating the performances of a data acquisition system for Time of Flight PET, based on LYSO crystal slabs and 64 channels Silicon Photomultipliers matrices (1.2 cm2 of active area each). Measurements have been performed to test the timing capability of the detection system (SiPM matices coupled to a LYSO slab and the read-out electronics) with both test signal and radioactive source.

CompactRIO: advanced data acquisition systems integration in CODAC Core System

Las herramientas de configuración basadas en lenguajes de alto nivel como LabVIEW permiten el desarrollo de sistemas de adquisición de datos basados en hardware reconfigurable FPGA muy complejos en un breve periodo de tiempo. La estandarización del ciclo de diseño hardware/software y la utilización de herramientas como EPICS facilita su integración con la plataforma de adquisición y control ITER CODAC CORE SYSTEM (CCS) basada en Linux. En este proyecto se propondrá una metodología que simplificará el ciclo completo de integración de plataformas novedosas, como cRIO, en las que el funcionamiento del hardware de adquisición puede ser modificado por el usuario para que éste se amolde a sus requisitos específicos. El objetivo principal de este proyecto fin de master es realizar la integración de un sistema cRIO NI9159 y diferentes módulos de E/S analógica y digital en EPICS y en CODAC CORE SYSTEM (CCS). Este último consiste en un conjunto de herramientas software que simplifican la integración de los sistemas de instrumentación y control del experimento ITER. Para cumplir el objetivo se realizarán las siguientes tareas: • Desarrollo de un sistema de adquisición de datos basado en FPGA con la plataforma hardware CompactRIO. En esta tarea se realizará la configuración del sistema y la implementación en LabVIEW para FPGA del hardware necesario para comunicarse con los módulos: NI9205, NI9264, NI9401.NI9477, NI9426, NI9425 y NI9476 • Implementación de un driver software utilizando la metodología de AsynDriver para integración del cRIO con EPICS. Esta tarea requiere definir todos los records necesarios que exige EPICS y crear las interfaces adecuadas que permitirán comunicarse con el hardware. • Implementar la descripción del sistema cRIO y del driver EPICS en el sistema de descripción de plantas de ITER llamado SDD. Esto automatiza la creación de las aplicaciones de EPICS que se denominan IOCs. SUMMARY The configuration tools based in high-level programing languages like LabVIEW allows the development of high complex data acquisition systems based on reconfigurable hardware FPGA in a short time period. The standardization of the hardware/software design cycle and the use of tools like EPICS ease the integration with the data acquisition and control platform of ITER, the CODAC Core System based on Linux. In this project a methodology is proposed in order to simplify the full integration cycle of new platforms like CompactRIO (cRIO), in which the data acquisition functionality can be reconfigured by the user to fits its concrete requirements. The main objective of this MSc final project is to develop the integration of a cRIO NI-9159 and its different analog and digital Input/Output modules with EPICS in a CCS. The CCS consists of a set of software tools that simplifies the integration of instrumentation and control systems in the International Thermonuclear Reactor (ITER) experiment. To achieve such goal the following tasks are carried out: • Development of a DAQ system based on FPGA using the cRIO hardware platform. This task comprehends the configuration of the system and the implementation of the mandatory hardware to communicate to the I/O adapter modules NI9205, NI9264, NI9401, NI9477, NI9426, NI9425 y NI9476 using LabVIEW for FPGA. • Implementation of a software driver using the asynDriver methodology to integrate such cRIO system with EPICS. This task requires the definition of the necessary EPICS records and the creation of the appropriate interfaces that allow the communication with the hardware. • Develop the cRIO system’s description and the EPICS driver in the ITER plant description tool named SDD. This development will automate the creation of EPICS applications, called IOCs.

Three Generations of FPGA DAQ Development for the ATLAS Pixel Detector

Thesis (Master's)--University of Washington, 2016-06