3-D Space Vector PWM implementation for Four-Leg Voltage Source Inverter

The Space Vector PWM implementation and operation for a Four-leg Voltage Source Inverter (VSI) is detailed and discussed in this paper. Although less common, four-leg VSIs are a viable solution for situations where neutral connection is necessary, including Active Power Filter applications. This topology presents advantages regarding the VSI DC link and capacitance, which make it useful for high power devices. Theory, implementation and simulations are also discussed in this paper. © 2011 IEEE.

Universal active and reactive power control of electronically interfaced distributed generation sources in virtual power plants operating in gridconnected and islanding modes

The control paradigms of the distributed generation (DG) sources in the smart grid are realised by either utilising virtual power plant (VPP) or by employing MicroGrid structures. Both VPP and MicroGrid are presented with the problem of control of power flow between their comprising DG sources. This study depicts this issue for VPP and proposes a novel and improved universal active and reactive power flow controllers for three-phase pulse width modulated voltage source inverters (PWM-VSI) operating in the VPP environment. The proposed controller takes into account all cases of R-X relationship, thus allowing it to function in systems operating at high, medium (MV) and low-voltage (LV) levels. Also proposed control scheme for the first time in an inverter control takes into account the capacitance of the transmission line which is an important factor to accurately represent medium length transmission lines. This allows the proposed control scheme to be applied in VPP structures, where DG sources can operate at MV LV levels over a short/medium length transmission line. The authors also conducted small signal stability analysis of the proposed controller and compared it against the small signal study of the existing controllers.

Filter Optimization for Grid Interactive Voltage Source Inverters

Higher order LCL filters are essential in meeting the interconnection standard requirement for grid-connected voltage source converters. LCL filters offer better harmonic attenuation and better efficiency at a smaller size when compared to the traditional L filters. The focus of this paper is to analyze the LCL filter design procedure from the point of view of power loss and efficiency. The IEEE 1547-2008 specifications for high-frequency current ripple are used as a major constraint early in the design to ensure that all subsequent optimizations are still compliant with the standards. Power loss in each individual filter component is calculated on a per-phase basis. The total inductance per unit of the LCL filter is varied, and LCL parameter values which give the highest efficiency while simultaneously meeting the stringent standard requirements are identified. The power loss and harmonic output spectrum of the grid-connected LCL filter is experimentally verified, and measurements confirm the predicted trends.

An Improved Dead-Time Compensation Scheme for Voltage Source Inverters Considering the Device Switching Transition Times

Inverter dead-time, which is meant to prevent shoot-through fault, causes harmonic distortion and change in the fundamental voltage in the inverter output. Typical dead-time compensation schemes ensure that the amplitude of the fundamental output current is as desired, and also improve the current waveform quality significantly. However, even with compensation, the motor line current waveform is observed to be distorted close to the current zero-crossings. The IGBT switching transition times being significantly longer at low currents than at high currents is an important reason for this zero-crossover distortion. Hence, this paper proposes an improved dead-time compensation scheme, which makes use of the measured IGBT switching transition times at low currents. Measured line current waveforms in a 2.2 kW induction motor drive with the proposed compensation scheme are compared against those with the conventional dead-time compensation scheme and without dead-time compensation. The experimental results on the motor drive clearly demonstrate the improvement in the line current waveform quality with the proposed method.

Doubly Fed Induction Generator for wind energy generation using nine-switch power converter

A Three-Phase Nine-Switch Converter (NSC) topology for Doubly Fed Induction Generator in wind energy generation is proposed in this paper. This converter topology was used in various applications such as Hybrid Electric Vehicles and Uninterruptable Power Supplies. In this paper, Nine-Switch Converter is introduced in Doubly Fed Induction Generator in renewable energy application for the first time. It replaces the conventional Back-to-Back Pulse Width Modulated voltage source converter (VSC) which composed of twelve switches in many DFIG applications. Reduction in number of switches is the most beneficial in terms of cost and power switching losses. The operation principle of Nine-Switch Converter using SPWM method is discussed. The resulting NSC performance of rotor side current control, active power and reactive control are compared with Back-to Back voltage source converter performance. DC link voltage regulation using front end converter is also presented. Finally the simulation results of DFIG performances using NSC and Back-to-Back VSC are analyzed and compared.

Optimal Pulse Width Modulation of Voltage-Source Inverter fed Motor Drives with Relaxation of Quarter Wave Symmetry Condition

Optimal switching angles for minimization of total harmonic distortion of line current (I-THD) in a voltage source inverter are determined traditionally by imposing half-wave symmetry (HWS) and quarter-wave symmetry (QWS) conditions on the pulse width modulated waveform. This paper investigates optimal switching angles with QWS relaxed. Relaxing QWS expands the solution space and presents the possibility of improved solutions. The optimal solutions without QWS are shown here to outperform the optimal solutions with QWS over a range of modulation index (M) between 0.82 and 0.94 for a switching frequency to fundamental frequency ratio of 5. Theoretical and experimental results are presented on a 2.3kW induction motor drive.

Harmonic quality of multilevel cascade inverters with random carrier phase pulse width modulation

The output harmonic quality of N series connected full-bridge dc-ac inverters is investigated. The inverters are pulse width modulated using a common reference signal but randomly phased carrier signals. Through analysis and simulation, probability distributions for inverter output harmonics and vector representations of N carrier phases are combined and assessed. It is concluded that a low total harmonic distortion is most likely to occur and will decrease further as N increases.

Harmonic quality of multilevel cascade inverters with random carrier phase pulse width modulation

The output harmonic quality of N series connected full-bridge dc-ac inverters is investigated. The inverters are pulse width modulated using a common reference signal but randomly phased carrier signals. Through analysis and simulation, probability distributions for inverter output harmonics and vector representations of N carrier phases are combined and assessed. It is concluded that a low total harmonic distortion is most likely to occur and will decrease further as N increases.

Development of a switch mode assisted linear amplifier for use as a high fidelity voltage source

Frequency Domain Spectroscopy (FDS) is one of the major techniques used for determining the condition of the cellulose based paper and pressboard components in large oil/paper insulated power transformers. This technique typically makes use of a sinusoidal voltage source swept from 0.1 mHz to 1 kHz. The excitation test voltage source used must meet certain characteristics, such as high output voltage, high fidelity, low noise and low harmonic content. The amplifier used; in the test voltage source; must be able to drive highly capacitive loads. This paper proposes that a switch-mode assisted linear amplifier (SMALA) can be used in the test voltage source to meet these criteria. A three level SMALA prototype amplifier was built to experimentally demonstrate the effectiveness of this proposal. The developed SMALA prototype shows no discernable harmonic distortion in the output voltage waveform, or the need for output filters, and is therefore seen as a preferable option to pulse width modulated digital amplifiers. The lack of harmonic distortion and high frequency switching noise in the output voltage of this SMALA prototype demonstrates its feasibility for applications in FDS, particularly on highly capacitive test objects such as transformer insulation systems.

Minimum switching loss pulse width modulation for reduced power conversion loss in reactive power compensators

Advanced bus-clamping switching sequences, which employ an active vector twice in a subcycle, are used to reduce line current distortion and switching loss in a space vector modulated voltage source converter. This study evaluates minimum switching loss pulse width modulation (MSLPWM), which is a combination of such sequences, for static reactive power compensator (STATCOM) application. It is shown that MSLPWM results in a significant reduction in device loss over conventional space vector pulse width modulation. Experimental verification is presented at different power levels of up to 150 kVA.

Different approaches to reduce shaft voltage in AC generators

This paper presents several shaft voltage reduction techniques for doubly-fed induction generators in wind turbine applications. These techniques includes: pulse width modulated voltage without zero vectors, multi-level inverters with proper PWM strategy, better generator design to minimize effective capacitive couplings in shaft voltage, active common-mode filter, reducing dc-link voltage and increasing modulation index. These methods have been verified with mathematical analysis and simulations.

A Simple Five-Level Inverter Topology for Induction Motor Drive Using Conventional Two-Level Inverters and Flying Capacitor Technique

This paper proposes a new five-level inverter topology for open-end winding induction motor (IM) drive. The popular existing circuit configurations for five-level inverter include the NPC inverter and flying capacitor topologies. Compared to the NPC inverter, the proposed topology eliminates eighteen clamping diodes having different voltage ratings in the present circuit. Moreover it requires only one capacitor bank per phase, whereas flying capacitor schemes for five level topologies require six capacitor banks per phase. The proposed topology is realized by feeding the phase winding of an open-end induction motor with two-level inverters in series with flying capacitors. The flying capacitor voltages are balanced using the switching state redundancy for full modulation range. The proposed inverter scheme is capable of producing two-level to five-level pulse width modulated voltage across the phase winding depending on the modulation range. Additionally, in case of any switch failure in the flying capacitor connection, the proposed inverter topology can be operated as a three-level inverter for full modulation range. The proposed scheme is experimentally verified on a four pole, 5hp induction motor drive.

On-line Estimation of Fundamental and Ripple Components of Line Currents in a Voltage-Source Inverter Operated at Low Switching Frequency

High-power voltage-source inverters (VSI) are often switched at low frequencies due to switching loss constraints. Numerous low-switching-frequency PWM techniques have been reported, which are quite successful in reducing the total harmonic distortion under open-loop conditions at such low operating frequencies. However, the line current still contains low-frequency components (though of reduced amplitudes), which are fed back to the current loop controller during closed-loop operation. Since the harmonic frequencies are quite low and are not much higher than the bandwidth of the current loop, these are amplified by the current controller, causing oscillations and instability. Hence, only the fundamental current should be fed back. Filtering out these harmonics from the measured current (before feeding back) leads to phase shift and attenuation of the fundamental component, while not eliminating the harmonics totally. This paper proposes a method for on-line extraction of the fundamental current in induction motor drives, modulated with low-switching-frequency PWM. The proposed method is validated through simulations on MATLAB/Simulink. Further, the proposed algorithm is implemented on Cyclone FPGA based controller board. Experimental results are presented for an R-L load.