Use of macros in backtrack programming /

Thesis (M.S.)--University of Illinois at Urbana-Champaign.

Calculation of construction schedules and priorities with the aid of electronic computers,

Cover title.

The use of computers in engineering education; report. 1st-3d; 1960-62.

Cover title, 1960: Electronic computers in engineering education; report.

Linear system solvers for parallel computers /

Includes bibliographical references.

Improving the performance of virtual memory computers /

"UILU-ENG 78 1741."

A Language for describing digital computers,

Issued also as thesis (M.S.) University of Illinois.

Computational statistics, electronic publishing, and access to research data

Abstract not available

Data structures for SIMD logic simulation

Due to the growth of design size and complexity, design verification is an important aspect of the Logic Circuit development process. The purpose of verification is to validate that the design meets the system requirements and specification. This is done by either functional or formal verification. The most popular approach to functional verification is the use of simulation based techniques. Using models to replicate the behaviour of an actual system is called simulation. In this thesis, a software/data structure architecture without explicit locks is proposed to accelerate logic gate circuit simulation. We call thus system ZSIM. The ZSIM software architecture simulator targets low cost SIMD multi-core machines. Its performance is evaluated on the Intel Xeon Phi and 2 other machines (Intel Xeon and AMD Opteron). The aim of these experiments is to: • Verify that the data structure used allows SIMD acceleration, particularly on machines with gather instructions ( section 5.3.1). • Verify that, on sufficiently large circuits, substantial gains could be made from multicore parallelism ( section 5.3.2 ). • Show that a simulator using this approach out-performs an existing commercial simulator on a standard workstation ( section 5.3.3 ). • Show that the performance on a cheap Xeon Phi card is competitive with results reported elsewhere on much more expensive super-computers ( section 5.3.5 ). To evaluate the ZSIM, two types of test circuits were used: 1. Circuits from the IWLS benchmark suit [1] which allow direct comparison with other published studies of parallel simulators.2. Circuits generated by a parametrised circuit synthesizer. The synthesizer used an algorithm that has been shown to generate circuits that are statistically representative of real logic circuits. The synthesizer allowed testing of a range of very large circuits, larger than the ones for which it was possible to obtain open source files. The experimental results show that with SIMD acceleration and multicore, ZSIM gained a peak parallelisation factor of 300 on Intel Xeon Phi and 11 on Intel Xeon. With only SIMD enabled, ZSIM achieved a maximum parallelistion gain of 10 on Intel Xeon Phi and 4 on Intel Xeon. Furthermore, it was shown that this software architecture simulator running on a SIMD machine is much faster than, and can handle much bigger circuits than a widely used commercial simulator (Xilinx) running on a workstation. The performance achieved by ZSIM was also compared with similar pre-existing work on logic simulation targeting GPUs and supercomputers. It was shown that ZSIM simulator running on a Xeon Phi machine gives comparable simulation performance to the IBM Blue Gene supercomputer at very much lower cost. The experimental results have shown that the Xeon Phi is competitive with simulation on GPUs and allows the handling of much larger circuits than have been reported for GPU simulation. When targeting Xeon Phi architecture, the automatic cache management of the Xeon Phi, handles and manages the on-chip local store without any explicit mention of the local store being made in the architecture of the simulator itself. However, targeting GPUs, explicit cache management in program increases the complexity of the software architecture. Furthermore, one of the strongest points of the ZSIM simulator is its portability. Note that the same code was tested on both AMD and Xeon Phi machines. The same architecture that efficiently performs on Xeon Phi, was ported into a 64 core NUMA AMD Opteron. To conclude, the two main achievements are restated as following: The primary achievement of this work was proving that the ZSIM architecture was faster than previously published logic simulators on low cost platforms. The secondary achievement was the development of a synthetic testing suite that went beyond the scale range that was previously publicly available, based on prior work that showed the synthesis technique is valid.

Implementació d’un sistema xat multiprotocol fent servir el llenguatge de programació ERLANG

Construcció d’una aplicació amb un llenguatge de programació concurrent i distribuït anomenat Erlang. Erlang és un llenguatge de programació funcional amb avaluació estricta, és a dir, assignació única i que inclou una màquina virtual. L’aplicació desenvolupada ha estat la programació d’un xat multiprotocol, el qual s’ha realitzat una primera part que ha consistit en el construcció d’un servidor per la xarxa local i el seu corresponent client. Llavors per poder fer un client més funcional i útil s’ha implementat un altre protocol, IRC. Al tractar-se d’un llenguatge espacialment dissenyat per treballar en processos s’ha intentat dissenyar d’una manera la qual es pugés aprofitar aquesta qualitat

Student's watcher : comparison between ASP.NET and PHP+CSS

"Student’s Watcher” is a small Web application which wants to show in a visual, simple and fast way, the evolution of the students. The main project table displays such things as marks and comments about students. We can add a comment for each mark to explain why this mark. The objective is to be able to know if some student has a problem, how is going his year, marks in other courses, or even, to know if he has a bad week in a different subjects. We can see the evolution of students in past years to do an objective comparison. It also allows inserting global comments of student, we have a list of these, and all professors can add new ones, where we can see more general valuations. “Student’s Watcher” was begun in ASP.net, but finally my project would be developed in PHP, HTML and CSS. This project wants to be a comparison between two of most important languages used nowadays, ASPX and PHP

Paral·lelització especulativa de programes sobre un clúster

Estudi sobre la millora de rendiment (en temps d’execució) al'algorisme de gràfics Fast Multipath Radiosity Using Hierarchical Subscenes gràcies a l’execució paral•lela especulada que ens permet obtenir el motor d'especulació per a clústers desenvolupat en el grup de recerca BCDS de la Universitat de Girona

Implementació de programari de pràctiques d'introducció a la química quàntica i d'introducció a la programació en live CDs utilitzables pels alumnes fora de les aules

L'objectiu d'aquest projecte és desenvolupar live CDs per tal de facilitar als alumnes de les assignatures obligatòries del Departament de Química Física que inclouen pràctiques amb ordinadors el treball fora de les aules, com a complement del realitzar durant les sessions de pràctiques.

Paral·lelització especulativa de programes sobre un clúster

Estudi sobre la millora de rendiment (en temps d’execució) a l'algorisme de gràfics Fast Multipath Radiosity Using Hierarchical Subscenes gràcies a l’execució paral•lela especulada que ens permet obtenir el motor d'especulació per a clústers desenvolupat en el grup de recerca BCDS de la Universitat de Girona

Implementació d’un sistema xat multiprotocol fent servir el llenguatge de programació ERLANG

Construcció d’una aplicació amb un llenguatge de programació concurrent i distribuït anomenat Erlang. Erlang és un llenguatge de programació funcional amb avaluació estricta, és a dir, assignació única i que inclou una màquina virtual. L’aplicació desenvolupada ha estat la programació d’un xat multiprotocol, el qual s’ha realitzat una primera part que ha consistit en el construcció d’un servidor per la xarxa local i el seu corresponent client. Llavors per poder fer un client més funcional i útil s’ha implementat un altre protocol, IRC. Al tractar-se d’un llenguatge espacialment dissenyat per treballar en processos s’ha intentat dissenyar d’una manera la qual es pugés aprofitar aquesta qualitat

Student's watcher : comparison between ASP.NET and PHP+CSS

"Student’s Watcher” is a small Web application which wants to show in a visual, simple and fast way, the evolution of the students. The main project table displays such things as marks and comments about students. We can add a comment for each mark to explain why this mark. The objective is to be able to know if some student has a problem, how is going his year, marks in other courses, or even, to know if he has a bad week in a different subjects. We can see the evolution of students in past years to do an objective comparison. It also allows inserting global comments of student, we have a list of these, and all professors can add new ones, where we can see more general valuations. “Student’s Watcher” was begun in ASP.net, but finally my project would be developed in PHP, HTML and CSS. This project wants to be a comparison between two of most important languages used nowadays, ASPX and PHP