Modeling and analysis of MOS capacitor controlled by independent double gates

This paper, for the first time, explores the charcatersictics of MOS capacitor controlled by independent double gates by numerical simulation and analytical modeling for its possible use in RF circuit design as a varactor. By numerical simulation it is shown how the quasi-static and non-quasi-static characteristics of the first gate capacitance could be tuned by the second gate biases. Effect of body doping and energy quantization are also discussed in this regard. A semi-empirical quasi-static model is also developed by using the existing incomplete Poisson solution of independent double gate transistors. Proposed model, which is valid from accumulation to inversion, is shown to have excellent agreement with numerical simulation for practical bias conditions.

Critical investigation of high performance spin-coated high-kappa titania thin films based MOS capacitor

We report the tunable dielectric constant of titania films with low leakage current density. Titanium dioxide (TiO2) films of three different thicknesses (36, 63 and 91 nm) were deposited by the consecutive steps of solution preparation, spin-coating, drying, and firing at different temperatures. The problem of poor adhesion between Si substrate and TiO2 insulating layer was resolved by using the plasma activation process. The surface roughness was found to increase with increasing thickness and annealing temperature. The electrical investigation was carried out using metal-oxide-semiconductor structure. The flat band voltage (V-FB), oxide trapped charge (Q(ot)), dielectric constant (kappa) and equivalent oxide thicknesses are calculated from capacitance-voltage (C-V) curves. The C-V characteristics indicate a thickness dependent dielectric constant. The dielectric constant increases from 31 to 78 as thickness increases from 36 to 91 nm. In addition to that the dielectric constant was found to be annealing temperature and frequency dependent. The films having thickness 91 nm and annealed at 600 A degrees C shows the low leakage current density. Our study provides a broad insight of the processing parameters towards the use of titania as high-kappa insulating layer, which might be useful in Si and polymer based flexible devices.

Hydrogen sensor based on silicon carbide (SiC) MOS capacitor

Silicon carbide (SiC) based MOS capacitor devices are used for gas sensing in high temperature and chemically reactive environments. A SiC MOS capacitor structure used as hydrogen sensor is defined and simulated. The effects of hydrogen concentration, temperature and interface traps on C-V characteristics were analysed. A comparison between structures with different oxide layer types (SiO2, TiO2 and ZnO) and thicknesses (50..10nm) was conducted. The TiO2 based structure has better performance than the SiO2 and ZnO structures. Also, the performance of the SiC MOS capacitor increases at thinner oxide layers. © 2012 IEEE.

A High-Performance Silicon Electro-Optic Phase Modulator with a Triple MOS Capacitor

We propose and analyze a novel Si-based electro-optic modulator with an improved metal-oxide-semiconductor (MOS) capacitor configuration integrated into silicon-on-insulator (SOI).Three gate-oxide layers embedded in the silicon waveguide constitute a triple MOS capacitor structure,which boosts the modulation efficiency compared with a single MOS capacitor.The simulation results demonstrate that the VπLπ product is 2.4V·cm.The rise time and fall time of the proposed device are calculated to be 80 and 40ps from the transient response curve,respectively,indicating a bandwidth of 8GHz.The phase shift efficiency and bandwidth can be enhanced by rib width scaling.

Low-intensity differential photocapacitance of MOS structures

Some new observations on the phenomenon of photocapacitane on n-type silicon MOS structures under low intensities of illumination are reported. The difference between the illuminated and dark C---characteristics is automatically followed as a function of the applied bias thereby obtaining the differential photocapacitance and the resulting characteristics has been termed as the Low Intensity Differential Photocapacitance (LIDP). For an MOS capacitor, the LIDP characteristics is seen to go through a well defined maximum. The phenomenon has been investigated under different ambient conditions like light intensity, temperature, dependance of the frequency of the light etc. and it has been found that the phenomenon is due to a band excband excitation. In this connection, a novel sensitive technique for the measurement of the capacitance based upon following the frequency changes of a tank circuit is also described in some detail. It is also shown that the phenomenon can be understood by a simple theoretical model.

Substrate temperature influenced physical properties of silicon MOS devices with TiO2 gate dielectric

DC reactive magnetron sputtering technique was employed for deposition of titanium dioxide (TiO2) films. The films were formed on Corning glass and p-Si (100) substrates by sputtering of titanium target in an oxygen partial pressure of 6x10-2 Pa and at different substrate temperatures in the range 303 673 K. The films formed at 303 K were X-ray amorphous whereas those deposited at substrate temperatures?=?473 K were transformed into polycrystalline nature with anatase phase of TiO2. Fourier transform infrared spectroscopic studies confirmed the presence of characteristic bonding configuration of TiO2. The surface morphology of the films was significantly influenced by the substrate temperature. MOS capacitor with Al/TiO2/p-Si sandwich structure was fabricated and performed currentvoltage and capacitancevoltage characteristics. At an applied gate voltage of 1.5 V, the leakage current density of the device decreased from 1.8?x?10-6 to 5.4?x?10-8 A/cm2 with the increase of substrate temperature from 303 to 673 K. The electrical conduction in the MOS structure was more predominant with Schottky emission and Fowler-Nordheim conduction. The dielectric constant (at 1 MHz) of the films increased from 6 to 20 with increase of substrate temperature. The optical band gap of the films increased from 3.50 to 3.56 eV and refractive index from 2.20 to 2.37 with the increase of substrate temperature from 303 to 673 K. Copyright (c) 2012 John Wiley & Sons, Ltd.

Lanthanum oxide nanostructured films synthesized using hot dense and extremely non-equilibrium plasma for nanoelectronic device applications

Lanthanum oxide (La2O3) nanostructured films are synthesized on a p-type silicon wafer by ablation of La2O3 pellet due to interaction with hot dense argon plasmas in a modified dense plasma focus (DPF) device. The nanostructured films are investigated using scanning electron microscopy (SEM), atomic force microscopy (AFM), and X-ray diffraction (XRD) spectra. SEM study shows the formation of nano-films having nano-size structures with the average nanostructures size ~25, ~53, and ~45 nm for one, two, and three DPF shots, respectively. The nanostructures sizes and morphology of nano-films are consistent between the AFM and SEM analyses. XRD spectra confirms nano-sized La2O3 with an average grain size ~34, ~51, and ~42 nm for one, two, and three DPF shots, respectively. The electrical properties such as current-voltage and capacitance-voltage (C-V) characteristics of the Al-La2O3-Si metal-oxide- semiconductor (MOS) capacitor structure are measured. The current conduction mechanism of the MOS capacitors is also demonstrated. The C-V characteristics are further used to obtain the electrical parameters such as the dielectric constant, oxide thickness, flat-band capacitance, and flat-band voltage of the MOS capacitors. These measurements demonstrate significantly lower leakage currents without any commonly used annealing or doping, thereby revealing a significant improvement of the MOS nanoelectronic device performance due to the incorporation of the DPF-produced La2O3 nano-films.

Optical, dielectric and morphological studies of sol-gel derived nanocrystalline TiO2 films

Nanocrystalline TiO2 films have been synthesized on glass and silicon substrates by sol-gel technique. The films have been characterized with optical reflectance/transmittance in the wavelength range 300-1000nm and the optical constants (n, k) were estimated by using envelope technique as well as spectroscopic ellipsometry. Morphological studies have been carried Out using atomic force microscope (AFM). Metal-Oxide-Silicon (MOS) capacitor was fabricated using conducting coating on TiO2 film deposited on silicon. The C-V measurements show that the film annealed at 300 degrees C has a dielectric constant of 19.80. The high percentage of transmittance, low surface roughness and high dielectric constant suggests that it can be used as an efficient anti-reflection coating on silicon and other optical coating applications and also as a MOS capacitor.

Spectroscopic and electrical properties of SiO2 films prepared by simple and cost effective sol-gel process

Amorphous SiO2 thin films were prepared on glass and silicon substrates by cost effective sol-gel method. Tetra ethyl ortho silicate (TEOS) was used as the precursor material, ethanol as solvent and concentrated HCl as a catalyst. The films were characterized at different annealing temperatures. The optical transmittance was slightly increased with increase of annealing temperature. The refractive index was found to be 1.484 at 550 nm. The formation of SiO2 film was analyzed from FT-IR spectra. The MOS capacitors were designed using silicon (1 0 0) substrates. The current-voltage (I-V), capacitance-voltage (C-V) and dissipation-voltage (D-V) measurements were taken for all the annealed films deposited on Si (1 0 0). The variation of current density, resistivity and dielectric constant of SiO2 films with different annealing temperatures was investigated and discussed for its usage in applications like MOS capacitor. The results revealed the decrease of dielectric constant and increase of resistivity of SiO2 films with increasing annealing temperature. (C) 2010 Elsevier B.V. All rights reserved.

Influence of O-2 flow rate on HfO2 gate dielectrics for back-gated graphene transistors

HfO2 thin films deposited on Si substrate using electron beam evaporation, are evaluated for back-gated graphene transistors. The amount of O-2 flow rate, during vaporation is optimized for 35 nm thick HfO2 films, to achieve the best optical, chemical and electrical properties. It has been observed that with increasing oxygen flow rate, thickness of the films increased and refractive index decreased due to increase in porosity resulting from the scattering of the evaporant. The films deposited at low O-2 flow rates (1 and 3 SCCM) show better optical and compositional properties. The effects of post-deposition annealing and post-metallization annealing in forming gas ambience (FGA) on the optical and electrical properties of the films have been analyzed. The film deposited at 3 SCCM O-2 flow rate shows the best properties as measured on MOS capacitors. To evaluate the performance of device properties, back-gated bilayer graphene transistors on HfO2 films deposited at two O-2 flow rates of 3 and 20 SCCM have been fabricated and characterized. The transistor with HfO2 film deposited at 3 SCCM O-2 flow rate shows better electrical properties consistent with the observations on MOS capacitor structures. This suggests that an optimum oxygen pressure is necessary to get good quality films for high performance devices.

Studies of 6H-SiC devices

Silicon carbide (SiC) is recently receiving increased attention due to its unique electrical and thermal properties. It has been regarded as the most appropriate semiconductor material for high power, high frequency, high temperature, and radiation hard microelectronic devices. The fabrication processes and characterization of basic device on 6H-SiC were systematically studied. The main works are summarized as follows:The homoepitaxial growth on the commercially available single-crystal 6H-SiC wafers was performed in a modified gas source molecular beam epitaxy system. The mesa structured p(+)n junction diodes on the material were fabricated and characterized. The diodes showed a high breakdown voltage of 800 V at room temperature. They operated with good rectification characteristics from room temperature to 673 K.Using thermal evaporation, Ti/6H-SiC Schottky barrier diodes were fabricated. They showed good rectification characteristics from room temperature to 473 K. Using neon implantation to form the edge termination, the breakdown voltage was improved to be 800 V.n-Type 6H-SiC MOS capacitors were fabricated and characterized. Under the same growing conditions, the quality of polysilicon gate capacitors was better than Al. In addition, SiC MOS capacitors had good tolerance to gamma rays. (C) 2002 Published by Elsevier Science B.V.

Studies of 6H-SiC devices

Silicon carbide (SiC) is recently receiving increased attention due to its unique electrical and thermal properties. It has been regarded as the most appropriate semiconductor material for high power, high frequency, high temperature, and radiation hard microelectronic devices. The fabrication processes and characterization of basic device on 6H-SiC were systematically studied. The main works are summarized as follows:The homoepitaxial growth on the commercially available single-crystal 6H-SiC wafers was performed in a modified gas source molecular beam epitaxy system. The mesa structured p(+)n junction diodes on the material were fabricated and characterized. The diodes showed a high breakdown voltage of 800 V at room temperature. They operated with good rectification characteristics from room temperature to 673 K.Using thermal evaporation, Ti/6H-SiC Schottky barrier diodes were fabricated. They showed good rectification characteristics from room temperature to 473 K. Using neon implantation to form the edge termination, the breakdown voltage was improved to be 800 V.n-Type 6H-SiC MOS capacitors were fabricated and characterized. Under the same growing conditions, the quality of polysilicon gate capacitors was better than Al. In addition, SiC MOS capacitors had good tolerance to gamma rays. (C) 2002 Published by Elsevier Science B.V.

Electrical Characterisation of SOI Substrates Incorporating WSix Ground Planes

Silicon-on-insulator (SOI) substrates incorporating tungsten silicide ground planes (GPs) have been shown to offer the lowest reported crosstalk figure of merit for application in mixed signal integrated circuits. The inclusion of the silicide layer in the structure may lead to stress or defects in the overlying SOI layers and resultant degradation of device performance. It is therefore essential to establish the quality of the silicon on the GPSOI substrate. MOS capacitor structures have been employed in this paper to characterize these GPSOI substrates for the first time. High quality MOS capacitor characteristics have been achieved with minority carrier lifetime of similar to 0.8 ms. These results show that the substrate is suitable for device manufacture with no degradation in the silicon due to stress or metallic contamination resulting from the inclusion of the underlying silicide layer.

Electrical characterization of ALD Al2O3 and HfO2 films on germanium

Al2O3 and HfO2 films were deposited on germanium substrates by atomic layer deposition (ALD) and analyzed by MOS capacitor electrical characterization. In-situ plasma nitridation performed prior to ALD was found to improve the stability of the interface. For Al 2O3/GeON/Ge capacitors, a 450°C anneal in nitrogen ambient reduced hysteresis and oxide fixed charge to 90 mV and 1012 cm-2 respectively, with low leakage current density. On the contrary, degradation was observed for un-nitrided Al2O3/Ge capacitors after 300 and 400°C post-metal anneals. HfO2/GeON/Ge capacitors benefitted from a 400°C densification anneal but exhibited degradation after post-metal anneals at temperatures greater than 300°C. This degradation is attributed to the influence of Al electrodes on the HfO 2 gate stack. HfO2 is considered to be a suitable material for the gate stack and Al2O3 for the buried dielectric in a GeOI structure. ©The Electrochemical Society.