Design methodology for multi-pumped discrete Raman amplifiers: case-study employing photonic crystal fibers

This paper proposes a new design methodology for discrete multi-pumped Raman amplifier. In a multi-objective optimization scenario, in a first step the whole solution-space is inspected by a CW analytical formulation. Then, the most promising solutions are fully investigated by a rigorous numerical treatment and the Raman amplification performance is thus determined by the combination of analytical and numerical approaches. As an application of our methodology we designed an photonic crystal fiber Raman amplifier configuration which provides low ripple, high gain, clear eye opening and a low power penalty. The amplifier configuration also enables to fully compensate the dispersion introduced by a 70-km singlemode fiber in a 10 Gbit/s system. We have successfully obtained a configuration with 8.5 dB average gain over the C-band and 0.71 dB ripple with almost zero eye-penalty using only two pump lasers with relatively low pump power. (C) 2009 Optical Society of America

A new design methodology for multipulse rectifiers with Delta auto-connected transformers and a retrofit application in Adjustable Speed Drives (ASDs)

Multipulse rectifiers can replace a conventional six pulse three-phase rectifier (diode bridge) providing a DC voltage with low ripple, low Total Harmonic Distortion of current (THDi) and a high Power Factor (PF). In this context is presented a multipulse rectifier with generalized Delta-differential autotransformer topology, which can provide any level of DC output voltage for any level of three-phase AC input voltage. This paper presents all the possible configurations for Delta topology in order to choose, through graphics, one configuration that presents reduced weight and volume. The average voltage on the DC bus must be compatible with the DC voltage in the six pulse rectifier used in commercial ASDs. Therefore, it is possible to apply the retrofit technique to replace the conventional bridge rectifier by the proposed multipulse rectifier. Based on mathematic models and simulation results, an 18-pulse rectifier with Delta topology, 220 V of line voltage, 315 V of DC output, and rating 2.5 kW of power was designed, implemented and applied for three different commercial ASDs. Experimental results as voltage and current waveforms and results about PF and THDi will be presented. © 2012 IEEE.

Classificação, metodologia de projeto e aplicação de retificadores multipulsos com conexão diferencial de transformador

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Dual Active Bridge based Battery Charger for Plug-in Hybrid Electric Vehicle with Charging Current Containing Low Frequency Ripple

High power density is strongly preferable for the on-board battery charger of Plug-in Hybrid Electric Vehicle (PHEV). Wide band gap devices, such as Gallium Nitride HEMTs are being explored to push to higher switching frequency and reduce passive component size. In this case, the bulk DC link capacitor of AC-DC Power Factor Correction (PFC) stage, which is usually necessary to store ripple power of two times the line frequency in a DC current charging system, becomes a major barrier on power density. If low frequency ripple is allowed in the battery, the DC link capacitance can be significantly reduced. This paper focuses on the operation of a battery charging system, which is comprised of one Full Bridge (FB) AC-DC stage and one Dual Active Bridge (DAB) DC-DC stage, with charging current containing low frequency ripple at two times line frequency, designated as sinusoidal charging. DAB operation under sinusoidal charging is investigated. Two types of control schemes are proposed and implemented in an experimental prototype. It is proved that closed loop current control is the better. Full system test including both FB AC-DC stage and DAB DC-DC stage verified the concept of sinusoidal charging, which may lead to potentially very high power density battery charger for PHEV.

SINGLE STAGE LED DRIVER TECHNOLOGY WITH LOW FREQUENCY RIPPLE CANCELLATION

Because of high efficacy, long lifespan, and environment-friendly operation, LED lighting devices become more and more popular in every part of our life, such as ornament/interior lighting, outdoor lightings and flood lighting. The LED driver is the most critical part of the LED lighting fixture. It heavily affects the purchasing cost, operation cost as well as the light quality. Design a high efficiency, low component cost and flicker-free LED driver is the goal. The conventional single-stage LED driver can achieve low cost and high efficiency. However, it inevitably produces significant twice-line-frequency lighting flicker, which adversely affects our health. The conventional two-stage LED driver can achieve flicker-free LED driving at the expenses of significantly adding component cost, design complexity and low the efficiency. The basic ripple cancellation LED driving method has been proposed in chapter three. It achieves a high efficiency and a low component cost as the single-stage LED driver while also obtaining flicker-free LED driving performance. The basic ripple cancellation LED driver is the foundation of the entire thesis. As the research evolving, another two ripple cancellation LED drivers has been developed to improve different aspects of the basic ripple cancellation LED driver design. The primary side controlled ripple cancellation LED driver has been proposed in chapter four to further reduce cost on the control circuit. It eliminates secondary side compensation circuit and an opto-coupler in design while at the same time maintaining flicker-free LED driving. A potential integrated primary side controller can be designed based on the proposed LED driving method. The energy channeling ripple cancellation LED driver has been proposed in chapter five to further reduce cost on the power stage circuit. In previous two ripple cancellation LED drivers, an additional DC-DC converter is needed to achieve ripple cancellation. A power transistor has been used in the energy channeling ripple cancellation LED driving design to successfully replace a separate DC-DC converter and therefore achieved lower cost. The detailed analysis supports the theory of the proposed ripple cancellation LED drivers. Simulation and experiment have also been included to verify the proposed ripple cancellation LED drivers.

Fractional slot permanent magnet synchronous motors for low speed applications

This study compares different rotor structures of permanent magnet motors with fractional slot windings. The surface mounted magnet and the embedded magnet rotor structures are studied. This thesis analyses the characteristics of a concentrated two-layer winding, each coil of which is wound around one tooth and which has a number of slots per pole and per phase less than one (q < 1). Compared to the integer slot winding, the fractional winding (q < 1) has shorter end windings and this, thereby, makes space as well as manufacturing cost saving possible. Several possible ways of winding a fractional slot machine with slots per pole and per phase lessthan one are examined. The winding factor and the winding harmonic components are calculated. The benefits attainable from a machine with concentrated windingsare considered. Rotor structures with surface magnets, radially embedded magnets and embedded magnets in V-position are discussed. The finite element method isused to solve the main values of the motors. The waveform of the induced electro motive force, the no-load and rated load torque ripple as well as the dynamic behavior of the current driven and voltage driven motor are solved. The results obtained from different finite element analyses are given. A simple analytic method to calculate fractional slot machines is introduced and the values are compared to the values obtained with the finite element analysis. Several different fractional slot machines are first designed by using the simple analytical methodand then computed by using the finite element method. All the motors are of thesame 225-frame size, and have an approximately same amount of magnet material, a same rated torque demand and a 400 - 420 rpm speed. An analysis of the computation results gives new information on the character of fractional slot machines.A fractional slot prototype machine with number 0.4 for the slots per pole and per phase, 45 kW output power and 420 rpm speed is constructed to verify the calculations. The measurement and the finite element method results are found to beequal.

Analysis of torque and speed ripple producing non-idealities of frequency converters in electric drives

Electric motors driven by adjustable-frequency converters may produce periodic excitation forces that can cause torque and speed ripple. Interaction with the driven mechanical system may cause undesirable vibrations that affect the system performance and lifetime. Direct drives in sensitive applications, such as elevators or paper machines, emphasize the importance of smooth torque production. This thesis analyses the non-idealities of frequencyconverters that produce speed and torque ripple in electric drives. The origin of low order harmonics in speed and torque is examined. It is shown how different current measurement error types affect the torque. As the application environment, direct torque control (DTC) method is applied to permanent magnet synchronous machines (PMSM). A simulation model to analyse the effect of the frequency converter non-idealities on the performance of the electric drives is created. Themodel enables to identify potential problems causing torque vibrations and possibly damaging oscillations in electrically driven machine systems. The model is capable of coupling with separate simulation software of complex mechanical loads. Furthermore, the simulation model of the frequency converter's control algorithm can be applied to control a real frequency converter. A commercial frequencyconverter with standard software, a permanent magnet axial flux synchronous motor and a DC motor as the load are used to detect the effect of current measurement errors on load torque. A method to reduce the speed and torque ripple by compensating the current measurement errors is introduced. The method is based on analysing the amplitude of a selected harmonic component of speed as a function oftime and selecting a suitable compensation alternative for the current error. The speed can be either measured or estimated, so the compensation method is applicable also for speed sensorless drives. The proposed compensation method is tested with a laboratory drive, which consists of commercial frequency converter hardware with self-made software and a prototype PMSM. The speed and torque rippleof the test drive are reduced by applying the compensation method. In addition to the direct torque controlled PMSM drives, the compensation method can also beapplied to other motor types and control methods.

Performance and scalability of isolated DC-DC converter topologies in low voltage, high current applications

Fuel cells are a promising alternative for clean and efficient energy production. A fuel cell is probably the most demanding of all distributed generation power sources. It resembles a solar cell in many ways, but sets strict limits to current ripple, common mode voltages and load variations. The typically low output voltage from the fuel cell stack needs to be boosted to a higher voltage level for grid interfacing. Due to the high electrical efficiency of the fuel cell, there is a need for high efficiency power converters, and in the case of low voltage, high current and galvanic isolation, the implementation of such converters is not a trivial task. This thesis presents galvanically isolated DC-DC converter topologies that have favorable characteristics for fuel cell usage and reviews the topologies from the viewpoint of electrical efficiency and cost efficiency. The focus is on evaluating the design issues when considering a single converter module having large current stresses. The dominating loss mechanism in low voltage, high current applications is conduction losses. In the case of MOSFETs, the conduction losses can be efficiently reduced by paralleling, but in the case of diodes, the effectiveness of paralleling depends strongly on the semiconductor material, diode parameters and output configuration. The transformer winding losses can be a major source of losses if the windings are not optimized according to the topology and the operating conditions. Transformer prototyping can be expensive and time consuming, and thus it is preferable to utilize various calculation methods during the design process in order to evaluate the performance of the transformer. This thesis reviews calculation methods for solid wire, litz wire and copper foil winding losses, and in order to evaluate the applicability of the methods, the calculations are compared against measurements and FEM simulations. By selecting a proper calculation method for each winding type, the winding losses can be predicted quite accurately before actually constructing the transformer. The transformer leakage inductance, the amount of which can also be calculated with reasonable accuracy, has a significant impact on the semiconductor switching losses. Therefore, the leakage inductance effects should also be taken into account when considering the overall efficiency of the converter. It is demonstrated in this thesis that although there are some distinctive differences in the loss distributions between the converter topologies, the differences in the overall efficiency can remain within a range of a few percentage points. However, the optimization effort required in order to achieve the high efficiencies is quite different in each topology. In the presence of practical constraints such as manufacturing complexity or cost, the question of topology selection can become crucial.

Unequal Teeth Widths for Torque Ripple Reduction in Permanent Magnet Synchronous Machines With Fractional-Slot Non-Overlapping Windings

Permanent magnet synchronous machines with fractional-slot non-overlapping windings (FSPMSM), also known as tooth-coil winding permanent magnet synchronous machines (TCW PMSM), have been under intensive research during the latest decade. There are many optimization routines explained and implemented in the literature in order to improve the characteristics of this machine type. This paper introduces a new technique for torque ripple minimization in TCW PMSM. The source of torque harmonics is also described. The low order torque harmonics can be harmful for a variety of applications, such as direct drive wind generators, direct drive light vehicle electrical motors, and for some high precision servo applications. The reduction of the torque ripple harmonics with the lowest orders (6th and 12th) is realized by machine geometry optimization technique using finite element analysis (FEA). The presented optimization technique includes the stator geometry adjustment in TCW PMSMs with rotor surface permanent magnets and with rotor embedded permanent magnets. Influence of the permanent magnet skewing on the torque ripple reduction and cogging torque elimination was also investigated. It was implemented separately and together with the stator optimization technique. As a result, the reduction of some torque ripple harmonics was attained.

A low-cost neurostimulator with accurate pulsed-current control

A constant-current stimulator for high-impedance loads using only low-cost standard high-voltage components Is presented. A voltage-regulator powers an oscillator built across the primary of a step-up transformer whose secondary supplies, after rectification, the high voltage to a switched current-mirror in the driving stage. Adjusting the regulated voltage controls the pulsed-current intensity. A prototype produces stimulus of amplitude and pulsewidth within 0 less than or equal to I-skin less than or equal to 20 mA and 50 mus less than or equal to T-pulse less than or equal to 1 ms, respectively. Pulse-repetition spans from 1 Hz to 10 Hz. Worst case ripple is 3.7% at I-skin = 1 mA. Overall consumption is 5.6 W at I-skin = 20 mA.

High Efficiency Envelope Amplifier based on a Ripple Cancellation Buck Converter. Design, Optimization and Integration in an EER RFPA

Durante los últimos años la tendencia en el sector de las telecomunicaciones ha sido un aumento y diversificación en la transmisión de voz, video y fundamentalmente de datos. Para conseguir alcanzar las tasas de transmisión requeridas, los nuevos estándares de comunicaciones requieren un mayor ancho de banda y tienen un mayor factor de pico, lo cual influye en el bajo rendimiento del amplificador de radiofrecuencia (RFPA). Otro factor que ha influido en el bajo rendimiento es el diseño del amplificador de radiofrecuencia. Tradicionalmente se han utilizado amplificadores lineales por su buen funcionamiento. Sin embargo, debido al elevado factor de pico de las señales transmitidas, el rendimiento de este tipo de amplificadores es bajo. El bajo rendimiento del sistema conlleva desventajas adicionales como el aumento del coste y del tamaño del sistema de refrigeración, como en el caso de una estación base, o como la reducción del tiempo de uso y un mayor calentamiento del equipo para sistemas portátiles alimentados con baterías. Debido a estos factores, se han desarrollado durante las últimas décadas varias soluciones para aumentar el rendimiento del RFPA como la técnica de Outphasing, combinadores de potencia o la técnica de Doherty. Estas soluciones mejoran las prestaciones del RFPA y en algún caso han sido ampliamente utilizados comercialmente como la técnica de Doherty, que alcanza rendimientos hasta del 50% para el sistema completo para anchos de banda de hasta 20MHz. Pese a las mejoras obtenidas con estas soluciones, los mayores rendimientos del sistema se obtienen para soluciones basadas en la modulación de la tensión de alimentación del amplificador de potencia como “Envelope Tracking” o “EER”. La técnica de seguimiento de envolvente o “Envelope Tracking” está basada en la modulación de la tensión de alimentación de un amplificador lineal de potencia para obtener una mejora en el rendimiento en el sistema comparado a una solución con una tensión de alimentación constante. Para la implementación de esta técnica se necesita una etapa adicional, el amplificador de envolvente, que añade complejidad al amplificador de radiofrecuencia. En un amplificador diseñado con esta técnica, se aumentan las pérdidas debido a la etapa adicional que supone el amplificador de envolvente pero a su vez disminuyen las pérdidas en el amplificador de potencia. Si el diseño se optimiza adecuadamente, puede conseguirse un aumento global en el rendimiento del sistema superior al conseguido con las técnicas mencionadas anteriormente. Esta técnica presenta ventajas en el diseño del amplificador de envolvente, ya que el ancho de banda requerido puede ser menor que el ancho de banda de la señal de envolvente si se optimiza adecuadamente el diseño. Adicionalmente, debido a que la sincronización entre la señal de envolvente y de fase no tiene que ser perfecta, el proceso de integración conlleva ciertas ventajas respecto a otras técnicas como EER. La técnica de eliminación y restauración de envolvente, llamada EER o técnica de Kahn está basada en modulación simultánea de la envolvente y la fase de la señal usando un amplificador de potencia conmutado, no lineal y que permite obtener un elevado rendimiento. Esta solución fue propuesta en el año 1952, pero no ha sido implementada con éxito durante muchos años debido a los exigentes requerimientos en cuanto a la sincronización entre fase y envolvente, a las técnicas de control y de corrección de los errores y no linealidades de cada una de las etapas así como de los equipos para poder implementar estas técnicas, que tienen unos requerimientos exigentes en capacidad de cálculo y procesamiento. Dentro del diseño de un RFPA, el amplificador de envolvente tiene una gran importancia debido a su influencia en el rendimiento y ancho de banda del sistema completo. Adicionalmente, la linealidad y la calidad de la señal de transmitida deben ser elevados para poder cumplir con los diferentes estándares de telecomunicaciones. Esta tesis se centra en el amplificador de envolvente y el objetivo principal es el desarrollo de soluciones que permitan el aumento del rendimiento total del sistema a la vez que satisfagan los requerimientos de ancho de banda, calidad de la señal transmitida y de linealidad. Debido al elevado rendimiento que potencialmente puede alcanzarse con la técnica de EER, esta técnica ha sido objeto de análisis y en el estado del arte pueden encontrarse numerosas referencias que analizan el diseño y proponen diversas implementaciones. En una clasificación de alto nivel, podemos agrupar las soluciones propuestas del amplificador de envolvente según estén compuestas de una o múltiples etapas. Las soluciones para el amplificador de envolvente en una configuración multietapa se basan en la combinación de un convertidor conmutado, de elevado rendimiento con un regulador lineal, de alto ancho de banda, en una combinación serie o paralelo. Estas soluciones, debido a la combinación de las características de ambas etapas, proporcionan un buen compromiso entre rendimiento y buen funcionamiento del amplificador de RF. Por otro lado, la complejidad del sistema aumenta debido al mayor número de componentes y de señales de control necesarias y el aumento de rendimiento que se consigue con estas soluciones es limitado. Una configuración en una etapa tiene las ventajas de una mayor simplicidad, pero debido al elevado ancho de banda necesario, la frecuencia de conmutación debe aumentarse en gran medida. Esto implicará un bajo rendimiento y un peor funcionamiento del amplificador de envolvente. En el estado del arte pueden encontrarse diversas soluciones para un amplificador de envolvente en una etapa, como aumentar la frecuencia de conmutación y realizar la implementación en un circuito integrado, que tendrá mejor funcionamiento a altas frecuencias o utilizar técnicas topológicas y/o filtros de orden elevado, que permiten una reducción de la frecuencia de conmutación. En esta tesis se propone de manera original el uso de la técnica de cancelación de rizado, aplicado al convertidor reductor síncrono, para reducir la frecuencia de conmutación comparado con diseño equivalente del convertidor reductor convencional. Adicionalmente se han desarrollado dos variantes topológicas basadas en esta solución para aumentar la robustez y las prestaciones de la misma. Otro punto de interés en el diseño de un RFPA es la dificultad de poder estimar la influencia de los parámetros de diseño del amplificador de envolvente en el amplificador final integrado. En esta tesis se ha abordado este problema y se ha desarrollado una herramienta de diseño que permite obtener las principales figuras de mérito del amplificador integrado para la técnica de EER a partir del diseño del amplificador de envolvente. Mediante el uso de esta herramienta pueden validarse el efecto del ancho de banda, el rizado de tensión de salida o las no linealidades del diseño del amplificador de envolvente para varias modulaciones digitales. Las principales contribuciones originales de esta tesis son las siguientes: La aplicación de la técnica de cancelación de rizado a un convertidor reductor síncrono para un amplificador de envolvente de alto rendimiento para un RFPA linealizado mediante la técnica de EER. Una reducción del 66% en la frecuencia de conmutación, comparado con el reductor convencional equivalente. Esta reducción se ha validado experimentalmente obteniéndose una mejora en el rendimiento de entre el 12.4% y el 16% para las especificaciones de este trabajo. La topología y el diseño del convertidor reductor con dos redes de cancelación de rizado en cascada para mejorar el funcionamiento y robustez de la solución con una red de cancelación. La combinación de un convertidor redactor multifase con la técnica de cancelación de rizado para obtener una topología que proporciona una reducción del cociente entre frecuencia de conmutación y ancho de banda de la señal. El proceso de optimización del control del amplificador de envolvente en lazo cerrado para mejorar el funcionamiento respecto a la solución en lazo abierto del convertidor reductor con red de cancelación de rizado. Una herramienta de simulación para optimizar el proceso de diseño del amplificador de envolvente mediante la estimación de las figuras de mérito del RFPA, implementado mediante EER, basada en el diseño del amplificador de envolvente. La integración y caracterización del amplificador de envolvente basado en un convertidor reductor con red de cancelación de rizado en el transmisor de radiofrecuencia completo consiguiendo un elevado rendimiento, entre 57% y 70.6% para potencias de salida de 14.4W y 40.7W respectivamente. Esta tesis se divide en seis capítulos. El primer capítulo aborda la introducción enfocada en la aplicación, los amplificadores de potencia de radiofrecuencia, así como los principales problemas, retos y soluciones existentes. En el capítulo dos se desarrolla el estado del arte de amplificadores de potencia de RF, describiéndose las principales técnicas de diseño, las causas de no linealidad y las técnicas de optimización. El capítulo tres está centrado en las soluciones propuestas para el amplificador de envolvente. El modo de control se ha abordado en este capítulo y se ha presentado una optimización del diseño en lazo cerrado para el convertidor reductor convencional y para el convertidor reductor con red de cancelación de rizado. El capítulo cuatro se centra en el proceso de diseño del amplificador de envolvente. Se ha desarrollado una herramienta de diseño para evaluar la influencia del amplificador de envolvente en las figuras de mérito del RFPA. En el capítulo cinco se presenta el proceso de integración realizado y las pruebas realizadas para las diversas modulaciones, así como la completa caracterización y análisis del amplificador de RF. El capítulo seis describe las principales conclusiones de la tesis y las líneas futuras. ABSTRACT The trend in the telecommunications sector during the last years follow a high increase in the transmission rate of voice, video and mainly in data. To achieve the required levels of data rates, the new modulation standards demand higher bandwidths and have a higher peak to average power ratio (PAPR). These specifications have a direct impact in the low efficiency of the RFPA. An additional factor for the low efficiency of the RFPA is in the power amplifier design. Traditionally, linear classes have been used for the implementation of the power amplifier as they comply with the technical requirements. However, they have a low efficiency, especially in the operating range of signals with a high PAPR. The low efficiency of the transmitter has additional disadvantages as an increase in the cost and size as the cooling system needs to be increased for a base station and a temperature increase and a lower use time for portable devices. Several solutions have been proposed in the state of the art to improve the efficiency of the transmitter as Outphasing, power combiners or Doherty technique. However, the highest potential of efficiency improvement can be obtained using a modulated power supply for the power amplifier, as in the Envelope Tracking and EER techniques. The Envelope Tracking technique is based on the modulation of the power supply of a linear power amplifier to improve the overall efficiency compared to a fixed voltage supply. In the implementation of this technique an additional stage is needed, the envelope amplifier, that will increase the complexity of the RFPA. However, the efficiency of the linear power amplifier will increase and, if designed properly, the RFPA efficiency will be improved. The advantages of this technique are that the envelope amplifier design does not require such a high bandwidth as the envelope signal and that in the integration process a perfect synchronization between envelope and phase is not required. The Envelope Elimination and Restoration (EER) technique, known also as Kahn’s technique, is based on the simultaneous modulation of envelope and phase using a high efficiency switched power amplifier. This solution has the highest potential in terms of the efficiency improvement but also has the most challenging specifications. This solution, proposed in 1952, has not been successfully implemented until the last two decades due to the high demanding requirements for each of the stages as well as for the highly demanding processing and computation capabilities needed. At the system level, a very precise synchronization is required between the envelope and phase paths to avoid a linearity decrease of the system. Several techniques are used to compensate the non-linear effects in amplitude and phase and to improve the rejection of the out of band noise as predistortion, feedback and feed-forward. In order to obtain a high bandwidth and efficient RFPA using either ET or EER, the envelope amplifier stage will have a critical importance. The requirements for this stage are very demanding in terms of bandwidth, linearity and quality of the transmitted signal. Additionally the efficiency should be as high as possible, as the envelope amplifier has a direct impact in the efficiency of the overall system. This thesis is focused on the envelope amplifier stage and the main objective will be the development of high efficiency envelope amplifier solutions that comply with the requirements of the RFPA application. The design and optimization of an envelope amplifier for a RFPA application is a highly referenced research topic, and many solutions that address the envelope amplifier and the RFPA design and optimization can be found in the state of the art. From a high level classification, multiple and single stage envelope amplifiers can be identified. Envelope amplifiers for EER based on multiple stage architecture combine a linear assisted stage and a switched-mode stage, either in a series or parallel configuration, to achieve a very high performance RFPA. However, the complexity of the system increases and the efficiency improvement is limited. A single-stage envelope amplifier has the advantage of a lower complexity but in order to achieve the required bandwidth the switching frequency has to be highly increased, and therefore the performance and the efficiency are degraded. Several techniques are used to overcome this limitation, as the design of integrated circuits that are capable of switching at very high rates or the use of topological solutions, high order filters or a combination of both to reduce the switching frequency requirements. In this thesis it is originally proposed the use of the ripple cancellation technique, applied to a synchronous buck converter, to reduce the switching frequency requirements compared to a conventional buck converter for an envelope amplifier application. Three original proposals for the envelope amplifier stage, based on the ripple cancellation technique, are presented and one of the solutions has been experimentally validated and integrated in the complete amplifier, showing a high total efficiency increase compared to other solutions of the state of the art. Additionally, the proposed envelope amplifier has been integrated in the complete RFPA achieving a high total efficiency. The design process optimization has also been analyzed in this thesis. Due to the different figures of merit between the envelope amplifier and the complete RFPA it is very difficult to obtain an optimized design for the envelope amplifier. To reduce the design uncertainties, a design tool has been developed to provide an estimation of the RFPA figures of merit based on the design of the envelope amplifier. The main contributions of this thesis are: The application of the ripple cancellation technique to a synchronous buck converter for an envelope amplifier application to achieve a high efficiency and high bandwidth EER RFPA. A 66% reduction of the switching frequency, validated experimentally, compared to the equivalent conventional buck converter. This reduction has been reflected in an improvement in the efficiency between 12.4% and 16%, validated for the specifications of this work. The synchronous buck converter with two cascaded ripple cancellation networks (RCNs) topology and design to improve the robustness and the performance of the envelope amplifier. The combination of a phase-shifted multi-phase buck converter with the ripple cancellation technique to improve the envelope amplifier switching frequency to signal bandwidth ratio. The optimization of the control loop of an envelope amplifier to improve the performance of the open loop design for the conventional and ripple cancellation buck converter. A simulation tool to optimize the envelope amplifier design process. Using the envelope amplifier design as the input data, the main figures of merit of the complete RFPA for an EER application are obtained for several digital modulations. The successful integration of the envelope amplifier based on a RCN buck converter in the complete RFPA obtaining a high efficiency integrated amplifier. The efficiency obtained is between 57% and 70.6% for an output power of 14.4W and 40.7W respectively. The main figures of merit for the different modulations have been characterized and analyzed. This thesis is organized in six chapters. In Chapter 1 is provided an introduction of the RFPA application, where the main problems, challenges and solutions are described. In Chapter 2 the technical background for radiofrequency power amplifiers (RF) is presented. The main techniques to implement an RFPA are described and analyzed. The state of the art techniques to improve performance of the RFPA are identified as well as the main sources of no-linearities for the RFPA. Chapter 3 is focused on the envelope amplifier stage. The three different solutions proposed originally in this thesis for the envelope amplifier are presented and analyzed. The control stage design is analyzed and an optimization is proposed both for the conventional and the RCN buck converter. Chapter 4 is focused in the design and optimization process of the envelope amplifier and a design tool to evaluate the envelope amplifier design impact in the RFPA is presented. Chapter 5 shows the integration process of the complete amplifier. Chapter 6 addresses the main conclusions of the thesis and the future work.

Intermittent Fasting Induces Hypothalamic Modifications Resulting In Low Feeding Efficiency, Low Body Mass And Overeating.

Intermittent fasting (IF) is an often-used intervention to decrease body mass. In male Sprague-Dawley rats, 24 hour cycles of IF result in light caloric restriction, reduced body mass gain, and significant decreases in the efficiency of energy conversion. Here, we study the metabolic effects of IF in order to uncover mechanisms involved in this lower energy conversion efficiency. After 3 weeks, IF animals displayed overeating during fed periods and lower body mass, accompanied by alterations in energy-related tissue mass. The lower efficiency of energy use was not due to uncoupling of muscle mitochondria. Enhanced lipid oxidation was observed during fasting days, whereas fed days were accompanied by higher metabolic rates. Furthermore, an increased expression of orexigenic neurotransmitters AGRP and NPY in the hypothalamus of IF animals was found, even on feeding days, which could explain the overeating pattern. Together, these effects provide a mechanistic explanation for the lower efficiency of energy conversion observed. Overall, we find that IF promotes changes in hypothalamic function that explain differences in body mass and caloric intake.

Low-density Lipoprotein Cholesterol And Radiotherapy-induced Carotid Atherosclerosis In Subjects With Head And Neck Cancer.

Radiotherapy (RT) is a risk factor for accelerated carotid artery atherosclerotic disease in subjects with head and neck cancer. However, the risk factors of RT-induced carotid artery remodeling are not established. This study aimed to investigate the effects of RT on carotid and popliteal arteries in subjects with head and neck cancer and to evaluate the relationship between baseline clinical and laboratory features and the progression of RT-induced atherosclerosis. Eleven men (age = 57.9 ± 6.2years) with head and neck cancer who underwent cervical bilateral irradiation were prospectively examined by clinical and laboratory analysis and by carotid and popliteal ultrasound before and after treatment (mean interval between the end of RT and the post-RT assessment = 181 ± 47 days). No studied subject used hypocholesterolemic medications. Significant increases in carotid intima-media thickness (IMT) (0.95 ± 0.08 vs. 0.87 ± 0.05 mm; p < 0.0001) and carotid IMT/diameter ratio (0.138 ± 0.013 vs. 0.129 ± 0.014; p = 0.001) were observed after RT, while no changes in popliteal structural features were detected. In addition, baseline low-density lipoprotein cholesterol levels showed a direct correlation with RT-induced carotid IMT change (r = 0.66; p = 0.027), while no other studied variable exhibited a significant relationship with carotid IMT change. These results indicate that RT-induced atherosclerosis is limited to the irradiated area and also suggest that it may be predicted by low-density lipoprotein cholesterol levels in subjects with head and neck cancer.

Effects Of Therapeutic Approach On The Neonatal Evolution Of Very Low Birth Weight Infants With Patent Ductus Arteriosus.

To analyze the effects of treatment approach on the outcomes of newborns (birth weight [BW] < 1,000 g) with patent ductus arteriosus (PDA), from the Brazilian Neonatal Research Network (BNRN) on: death, bronchopulmonary dysplasia (BPD), severe intraventricular hemorrhage (IVH III/IV), retinopathy of prematurity requiring surgical (ROPsur), necrotizing enterocolitis requiring surgery (NECsur), and death/BPD. This was a multicentric, cohort study, retrospective data collection, including newborns (BW < 1000 g) with gestational age (GA) < 33 weeks and echocardiographic diagnosis of PDA, from 16 neonatal units of the BNRN from January 1, 2010 to Dec 31, 2011. Newborns who died or were transferred until the third day of life, and those with presence of congenital malformation or infection were excluded. Groups: G1 - conservative approach (without treatment), G2 - pharmacologic (indomethacin or ibuprofen), G3 - surgical ligation (independent of previous treatment). Factors analyzed: antenatal corticosteroid, cesarean section, BW, GA, 5 min. Apgar score < 4, male gender, Score for Neonatal Acute Physiology Perinatal Extension (SNAPPE II), respiratory distress syndrome (RDS), late sepsis (LS), mechanical ventilation (MV), surfactant (< 2 h of life), and time of MV. death, O2 dependence at 36 weeks (BPD36wks), IVH III/IV, ROPsur, NECsur, and death/BPD36wks. Student's t-test, chi-squared test, or Fisher's exact test; Odds ratio (95% CI); logistic binary regression and backward stepwise multiple regression. Software: MedCalc (Medical Calculator) software, version 12.1.4.0. p-values < 0.05 were considered statistically significant. 1,097 newborns were selected and 494 newborns were included: G1 - 187 (37.8%), G2 - 205 (41.5%), and G3 - 102 (20.6%). The highest mortality was observed in G1 (51.3%) and the lowest in G3 (14.7%). The highest frequencies of BPD36wks (70.6%) and ROPsur were observed in G3 (23.5%). The lowest occurrence of death/BPD36wks occurred in G2 (58.0%). Pharmacological (OR 0.29; 95% CI: 0.14-0.62) and conservative (OR 0.34; 95% CI: 0.14-0.79) treatments were protective for the outcome death/BPD36wks. The conservative approach of PDA was associated to high mortality, the surgical approach to the occurrence of BPD36wks and ROPsur, and the pharmacological treatment was protective for the outcome death/BPD36wks.

Low-density Three-dimensional Foam Using Self-reinforced Hybrid Two-dimensional Atomic Layers.

Low-density nanostructured foams are often limited in applications due to their low mechanical and thermal stabilities. Here we report an approach of building the structural units of three-dimensional (3D) foams using hybrid two-dimensional (2D) atomic layers made of stacked graphene oxide layers reinforced with conformal hexagonal boron nitride (h-BN) platelets. The ultra-low density (1/400 times density of graphite) 3D porous structures are scalably synthesized using solution processing method. A layered 3D foam structure forms due to presence of h-BN and significant improvements in the mechanical properties are observed for the hybrid foam structures, over a range of temperatures, compared with pristine graphene oxide or reduced graphene oxide foams. It is found that domains of h-BN layers on the graphene oxide framework help to reinforce the 2D structural units, providing the observed improvement in mechanical integrity of the 3D foam structure.