Variable speed refrigeration system with HPF input rectifier stage

This paper is based on the analysis and implementation of a new drive system applied to refrigeration systems, complying with the restrictions imposed by the IEC standards (Harmonic/Flicker/EMI-Electromagnetic Interference restrictions), in order to obtain high efficiency, high power factor, reduced harmonic distortion in the input current and reduced electromagnetic interference, with excellent performance in temperature control of a refrigeration prototype system (automatic control, precision and high dynamic response). The proposal is replace the single-phase motor by a three-phase motor, in the conventional refrigeration system. In this way, a proper control technique can be applied, using a closed-loop (feedback control), that will allow an accurate adjustment of the desirable temperature. The proposed refrigeration prototype uses a 0.5Hp three-phase motor and an open (Belt-Drive) Bitzer IY type compressor. The input rectifier stage's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller for the output three-phase inverter stage has been developed using a conventional voltage-frequency control (scalar V/f control), and a simplified stator oriented Vector control, in order to verify the feasibility and performance of the proposed digital controls for continuous temperature control applied at the refrigerator prototype. ©2008 IEEE.

Hybrid three-phase HPF rectifier with programmable input current THD, using FPGA device and VHDL language

In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. Finally, the proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. The proposed strategy is verified by experiments. © 2008 IEEE.

Oscillations, phase-of-firing coding, and spike timing-dependent plasticity: an efficient learning scheme

Recent experiments have established that information can be encoded in the spike times of neurons relative to the phase of a background oscillation in the local field potential—a phenomenon referred to as “phase-of-firing coding” (PoFC). These firing phase preferences could result from combining an oscillation in the input current with a stimulus-dependent static component that would produce the variations in preferred phase, but it remains unclear whether these phases are an epiphenomenon or really affect neuronal interactions—only then could they have a functional role. Here we show that PoFC has a major impact on downstream learning and decoding with the now well established spike timing-dependent plasticity (STDP). To be precise, we demonstrate with simulations how a single neuron equipped with STDP robustly detects a pattern of input currents automatically encoded in the phases of a subset of its afferents, and repeating at random intervals. Remarkably, learning is possible even when only a small fraction of the afferents (~10%) exhibits PoFC. The ability of STDP to detect repeating patterns had been noted before in continuous activity, but it turns out that oscillations greatly facilitate learning. A benchmark with more conventional rate-based codes demonstrates the superiority of oscillations and PoFC for both STDP-based learning and the speed of decoding: the oscillation partially formats the input spike times, so that they mainly depend on the current input currents, and can be efficiently learned by STDP and then recognized in just one oscillation cycle. This suggests a major functional role for oscillatory brain activity that has been widely reported experimentally.

Converter-flux-based current control of voltage source PWM rectifiers - analysis and implementation

Pulsewidth-modulated (PWM) rectifier technology is increasingly used in industrial applications like variable-speed motor drives, since it offers several desired features such as sinusoidal input currents, controllable power factor, bidirectional power flow and high quality DC output voltage. To achieve these features,however, an effective control system with fast and accurate current and DC voltage responses is required. From various control strategies proposed to meet these control objectives, in most cases the commonly known principle of the synchronous-frame current vector control along with some space-vector PWM scheme have been applied. Recently, however, new control approaches analogous to the well-established direct torque control (DTC) method for electrical machines have also emerged to implement a high-performance PWM rectifier. In this thesis the concepts of classical synchronous-frame current control and DTC-based PWM rectifier control are combined and a new converter-flux-based current control (CFCC) scheme is introduced. To achieve sufficient dynamic performance and to ensure a stable operation, the proposed control system is thoroughly analysed and simple rules for the controller design are suggested. Special attention is paid to the estimationof the converter flux, which is the key element of converter-flux-based control. Discrete-time implementation is also discussed. Line-voltage-sensorless reactive reactive power control methods for the L- and LCL-type line filters are presented. For the L-filter an open-loop control law for the d-axis current referenceis proposed. In the case of the LCL-filter the combined open-loop control and feedback control is proposed. The influence of the erroneous filter parameter estimates on the accuracy of the developed control schemes is also discussed. A newzero vector selection rule for suppressing the zero-sequence current in parallel-connected PWM rectifiers is proposed. With this method a truly standalone and independent control of the converter units is allowed and traditional transformer isolation and synchronised-control-based solutions are avoided. The implementation requires only one additional current sensor. The proposed schemes are evaluated by the simulations and laboratory experiments. A satisfactory performance and good agreement between the theory and practice are demonstrated.

Programmable PFC based hybrid multipulse power rectifier for ultra clean power application

A novel hybrid three-phase rectifier is proposed. It is capable to achieve high input power factor (PF) and low total harmonic input currents distortion (THDI). The proposed hybrid high power rectifier is composed by a standard three-phase six-pulse diode rectifier (Graetz bridge) with a parallel connection of single-phase Sepic rectifiers in each three-phase rectifier leg. Such topology results in a structure capable of programming the input current waveform and providing conditions for obtaining high input power factor and low harmonic current distortion. In order to validate the proposed hybrid rectifier, this work describes its principles, with detailed operation, simulation, experimental results, and discussions on power rating of the required Sepic converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power is processed through the Sepic converters, making the proposed solution economically viable for very high power installations, with fast investment payback. Moreover, retrofitting to existing installations is also feasible since the parallel path can be easily controlled by integration with the existing dc-link. A prototype has been implemented in the laboratory and it was fully demonstrated to both operate with excellent performance and be feasibly implemented in higher power applications.

New 12kW three-phase 18-pulse high power factor AC-DC converter with regulated output voltage for rectifier units

This work presents a new high power factor three-phase rectifier based on a Y-connected differential autotransformer with reduced kVA and 18-pulse input current followed by three DC-DC boost converters. The topology provides a regulated output voltage and natural three-phase input power factor correction. The lowest input current harmonic components are the 17th and the 19th. Three boost converters, with constant input currents and regulated parallel connected output voltages are used to process 4kW each one. Analytical results from Fourier analyses of winding currents and the vector diagram of winding voltages are presented. Simulation results to verify the proposed concept and experimental results are shown in the paper.

Programmable PFC based hybrid multipulse power rectifier for utility interface of power electronic converters

In this paper it is proposed a novel hybrid three-phase rectifier capable to achieve high input power factor (PF), and low total harmonic distortion in the input currents (THDI). The proposed hybrid high power rectifier is composed by a standard three-phase 6-pulses diode rectifier (Graetz bridge) with a parallel connection of single-phase Boost rectifiers in each three-phase rectifier leg. Such topology results in a structure capable of programming the input current waveform and providing conditions for obtaining high input power factor and low harmonic current distortion. In order to validate the proposed hybrid rectifier, this paper describes its principles of operation, with detailed experimental results and discussions on power rating of the required Boost converters as related to the desired total harmonic current distortion. It is demonstrated that only a fraction of the output power is processed through the Boost converters, making the proposed solution economically viable for very high power installations, with fast pay back of the investment. Moreover, retrofitting to existing installations is also feasible since the parallel path can be easily controlled by integration with the existing de-link. A prototype rated at 6 kW has been implemented in laboratory and fully demonstrated its operation, performance and feasibility to high power applications. © 2005 IEEE.

A true programmable HPF hybrid three-phase rectifier

In this paper is proposed and analyzed a digital hysteresis modulation using a FPGA (Field Programmable Gate Array) device and VHDL (Hardware Description Language), applied at a hybrid three-phase rectifier with almost unitary input power factor, composed by parallel SEPIC controlled single-phase rectifiers connected to each leg of a standard 6-pulses uncontrolled diode rectifier. The digital control allows a programmable THD (Total Harmonic Distortion) at the input currents, and it makes possible that the power rating of the switching-mode converters, connected in parallel, can be a small fraction of the total average output power, in order to obtain a compact converter, reduced input current THD and almost unitary input power factor. The proposed digital control, using a FPGA device and VHDL, offers an important flexibility for the associated control technique, in order to obtain a programmable PFC (Power Factor Correction) hybrid three-phase rectifier, in agreement with the international standards (IEC, and IEEE), which impose limits for the THD of the AC (Alternate Current) line input currents. Finally, the proposed control strategy is verified through experimental results from an implemented prototype. ©2008 IEEE.

A HPF AC-AC converter for Permanent Magnet Generator applications

This paper describes the design and development of a high input power-factor (HPF) AC to AC converter for naval applications using Permanent Magnet Generator (PMG). The proposed converter comprises an isolated three-phase uncontrolled multipulse rectification stage directly connected to a single-phase inverter stage, without the use of DC to DC intermediary stage, resulting in more simplicity for the overall circuitry, assuring robustness, reliability and reduced costs. Furthermore, the multipulse rectifier stage is capable to provide high power factor and input currents with low total harmonic distortion (THD). The output voltage of the PMG varies from 260V rms (220 Hz) to 380V rms (360 Hz), depending on load conditions. The output single-phase inverter stage was designed to operate with wide range of DC bus voltage, maintaining 120V rms, 60 Hz output. Measured total harmonic distortion for the AC output voltage represents less than 2%, at 3.6kW nominal linear load. © 2010 IEEE.

Conversor CA-CA de elevado fator de potência para aplicações com geradores de Ímã permanente

This paper proposes and describes a high power factor AC-AC converter for naval applications using Permanent Magnet Generator (PMG). The three-phase output voltages of the PMG vary from 260 Vrms (220 Hz) to 380 Vrms (360 Hz), depending on load conditions. The proposed converter consists of a Y-/ΔY power transformer, which provides electrical isolation between the PMG and remaining stages, and a twelve-pulse uncontrolled rectifier stage directly connected to a single-phase inverter stage, without the use of an intermediary DC-DC topology. This proposal results in more simplicity for the overall circuitry, assuring robustness, reliability and reduced costs. Furthermore, the multipulse rectifier stage is capable to provide high power factor and low total harmonic distortion for the input currents of the converter. The single-phase inverter stage was designed to operate with wide range of DC bus voltage, maintaining 120 Vrms, 60 Hz output. The control philosophy, implemented in a digital signal processor (DSP) which also contains protection routines, alows series connections between two identical converters, achieving 240 Vrms, 60 Hz total output voltage. Measured total harmonic distortion for the AC output voltage is lower than 2% and the input power factor is 0.93 at 3.6kW nominal load. © 2010 IEEE.

Controle digital através de dispositivo FPGA aplicado a um retificador trifásico híbrido operando com modulação por histerese variável

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Predicting spike timing of neocortical pyramidal neurons by simple threshold models

Neurons generate spikes reliably with millisecond precision if driven by a fluctuating current--is it then possible to predict the spike timing knowing the input? We determined parameters of an adapting threshold model using data recorded in vitro from 24 layer 5 pyramidal neurons from rat somatosensory cortex, stimulated intracellularly by a fluctuating current simulating synaptic bombardment in vivo. The model generates output spikes whenever the membrane voltage (a filtered version of the input current) reaches a dynamic threshold. We find that for input currents with large fluctuation amplitude, up to 75% of the spike times can be predicted with a precision of +/-2 ms. Some of the intrinsic neuronal unreliability can be accounted for by a noisy threshold mechanism. Our results suggest that, under random current injection into the soma, (i) neuronal behavior in the subthreshold regime can be well approximated by a simple linear filter; and (ii) most of the nonlinearities are captured by a simple threshold process.

Random Sampling with Interspike-Intervals of the Exponential Integrate and Fire Neuron: A Computational Interpretation of UP-States

Oscillations between high and low values of the membrane potential (UP and DOWN states respectively) are an ubiquitous feature of cortical neurons during slow wave sleep and anesthesia. Nevertheless, a surprisingly small number of quantitative studies have been conducted only that deal with this phenomenon’s implications for computation. Here we present a novel theory that explains on a detailed mathematical level the computational benefits of UP states. The theory is based on random sampling by means of interspike intervals (ISIs) of the exponential integrate and fire (EIF) model neuron, such that each spike is considered a sample, whose analog value corresponds to the spike’s preceding ISI. As we show, the EIF’s exponential sodium current, that kicks in when balancing a noisy membrane potential around values close to the firing threshold, leads to a particularly simple, approximative relationship between the neuron’s ISI distribution and input current. Approximation quality depends on the frequency spectrum of the current and is improved upon increasing the voltage baseline towards threshold. Thus, the conceptually simpler leaky integrate and fire neuron that is missing such an additional current boost performs consistently worse than the EIF and does not improve when voltage baseline is increased. For the EIF in contrast, the presented mechanism is particularly effective in the high-conductance regime, which is a hallmark feature of UP-states. Our theoretical results are confirmed by accompanying simulations, which were conducted for input currents of varying spectral composition. Moreover, we provide analytical estimations of the range of ISI distributions the EIF neuron can sample from at a given approximation level. Such samples may be considered by any algorithmic procedure that is based on random sampling, such as Markov Chain Monte Carlo or message-passing methods. Finally, we explain how spike-based random sampling relates to existing computational theories about UP states during slow wave sleep and present possible extensions of the model in the context of spike-frequency adaptation.

A high-power-factor, three-phase isolated AC-DC converter using high-frequency current injection

A single-stage, three-phase AC-to-DC converter topology is proposed for high-frequency power supply applications. The principal features of the circuit include continuous current operation of the three AC input inductors, inherent shaping of the input currents, resulting in high power factor, a transformer isolated output, and only two active devices are required, both soft-switched. Resonant conversion techniques are used, and a high power factor is achieved by injecting high-frequency currents into the three-phase rectifier, producing a high frequency modulation of the rectifier input voltages. The current injection principle is explained and the system operation is confirmed by a combination of simulation and experimental results.

Generalization of Wye and Delta auto-connections: Analysis of voltages and currents

Multipulse rectifier topologies based on autoconnections, or differential connections, are more and more applied as interface stages between the mains and power converters. These topologies mitigate many low-order current harmonics in the utility, reducing the THD (total harmonic distortion) and increasing the power factor. This paper presents a mathematical model based on phasor diagrams, that results in a single expression able to unify all differential topologies connections (Delta and Wye), for both step-up or step-down autotransformers, for 12 and 18-pulse AC-DC converters. The proposed family of converters can be designed for any relationship between the input voltage and the load voltage. An immediate application would be the retrofit, i.e. to replace a conventional rectifier with poor quality of the processed energy by the 12 or 18 pulses rectifier with Wye or Delta-differential connection. The design procedure, simple and fast, is developed and tested for a prototype rating 6 kW and 250 V on the DC load © 2010 IEEE.