Effect of Stress and Interface defects on Photo Luminescence of Si nano-crystals embedded in SiO2

Effect of stress and interface defects on photo luminescence property of a silicon nano-crystal (Si-nc) embedded in amorphous silicon dioxide (a-SiO2) are studied in this paper using a self-consistent quantum-continuum based modeling framework. Si-ncs or quantum dots show photoluminescence at room temperature. Whether its origin is due to Si-nc/a-SiO2 interface defects or quantum confinement of carriers in Si-nc is still an outstanding question. Earlier reports have shown that stresses greater than 12 GPa change the indirect energy band gap structure of bulk Si to a direct energy band gap structure. Such stresses are observed very often in nanostructures and these stresses influence the carrier confinement energy significantly. Hence, it is important to determine the effect of stress in addition to the structure of interface defects on photoluminescence property of Si-nc. In the present work, first a Si-nc embedded in a-SiO2 is constructed using molecular dynamics simulation framework considering the actual conditions they are grown so that the interface and residual stress in the structure evolves naturally during formation. We observe that the structure thus created has an interface of about 1 nm thick consisting of 41.95% of defective states mostly Sin+ (n = 0 to 3) coordination states. Further, both the Si-nc core and the embedding matrix are observed to be under a compressive strain. This residual strain field is applied in an effective mass k.p Hamiltonian formulation to determine the energy states of the carriers. The photo luminescence property computed based on the carrier confinement energy and interface energy states associated with defects will be analysed in details in the paper.

DLTS analysis of amphoteric interface defects in high-TiO2 MOS structures prepared by sol-gel spin-coating

High-kappa TiO2 thin films have been fabricated from a facile, combined sol-gel spin - coating technique on p and n type silicon substrate. XRD and Raman studies headed the existence of anatase phase of TiO2 with a small grain size of 18 nm. The refractive index `n' quantified from ellipsometry is 2.41. AFM studies suggest a high quality, pore free films with a fairly small surface roughness of 6 angstrom. The presence of Ti in its tetravalent state is confirmed by XPS analysis. The defect parameters observed at the interface of Si/TiO2 were studied by capacitance - voltage (C - V) and deep level transient spectroscopy (DLTS). The flat - band voltage (V-FB) and the density of slow interface states estimated are -0.9, -0.44 V and 5.24x10(10), 1.03x10(11) cm(-2); for the NMOS and PMOS capacitors, respectively. The activation energies, interface state densities and capture cross -sections measured by DLTS are E-V + 0.30, E-C - 0.21 eV; 8.73x10(11), 6.41x10(11) eV(-1) cm(-2) and 5.8x10(-23), 8.11x10(-23) cm(2) for the NMOS and PMOS structures, respectively. A low value of interface state density in both P-and N-MOS structures makes it a suitable alternate dielectric layer for CMOS applications. And also very low value of capture cross section for both the carriers due to the amphoteric nature of defect indicates that the traps are not aggressive recombination centers and possibly can not contribute to the device operation to a large extent. (C) 2015 Author(s).

Sub-nA spatially resolved conductivity profiling of surface and interface defects in ceria films

Spatial variability of conductivity in ceria is explored using scanning probe microscopy (SPM) with galvanostatic control. Ionically blocking electrodes are used to probe the conductivity under opposite polarities to reveal possible differences in the defect structure across a thin film of CeO2. Data suggests the existence of a large spatial inhomogeneity that could give rise to constant phase elements during standard electrochemical characterization, potentially affecting the overall conductivity of films on the macroscale. The approach discussed here can also be utilized for other mixed ionic electronic conductor (MIEC) systems including memristors and electroresistors, as well as physical systems such as ferroelectric tunneling barriers.

Atomic layer deposition of interface control layers for the fabrication of III/V MOS devices

The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

Magneto-optical studies of the correlation between interface microroughness parameters and the photoluminescence line shape in GaAs/Ga0.7Al0.3As quantum wells

In this work we analyze the relation between the interface microroughness and the full width at half maximum (FWHM) of the photoluminescence (PL) spectra for a GaAs/Ga0.7Al0.3As multiple quantum well (QW) system. We show that, in spite of the complex correlation between the microscopic interface-defects parameters and the QW optical properties, the Singh and Bajaj model [Appl. Phys. Lett. 44, 805 (1984)] provides a good quantitative description of the excitonic PL-FWHM. ©1999 The American Physical Society.

热键合制作Yb：Y3Al5O12／Y3Al5O12复合晶体

采用热键合技术制备了Yb：Y3Al5O12／Y3Al5O12（Yb：YAG／YAG）复合晶体，对复合晶体进行了结构表征和键合质量检测，利用光学显微镜和扫描电镜观察了复合晶体横截面的形貌；在偏光显微镜下观察键合区域的应力，利用干涉条纹来表征复合晶体的光学均匀性；通过红外透过光谱的测量来检测复合晶体的键合质量．实验结果表明：热键合技术制备的Yb：YAG／YAG复合晶体键合界面处无界面缺陷，不存在复合界面空间过渡层，光学均匀性良好．

Nucleação de vortices e paredes de domínio em nanoestruturas magnéticas

We report a theoretical investigation of the magnetic phases and hysteresis of exchange biased ferromagnetic (F) nanoelements for three di erent systems: exchange biased nanoparticles, exchange biased narrow ferromagnetic stripes and exchange biased thin ferromagnetic lms. In all cases the focus is on the new e ects produced by suitable patterns of the exchange energy coupling the ferromagnetic nanoelement with a large anisotropy antiferromagnetic (AF) substrate. We investigate the hysteresis of iron and permalloy nanoparticles with a square basis, with lateral dimensions between 45 nm and 120 nm and thickness between 12 nm and 21 nm. Interface bias is aimed at producing large domains in thin lms. Our results show that, contrary to intuition, the interface exchange coupling may generate vortex states along the hysteresis loop. Also, the threshold value of the interface eld strength for vortex nucleation is smaller for iron nanoelements. We investigate the nucleation and depinning of an array of domain walls pinned at interface defects of a vicinal stripe/AF bilayer. The interface exchange eld displays a periodic pattern corresponding to the topology of the AF vicinal substrate. The vicinal AF substrate consists of a sequence of terraces, each with spins from one AF subalattice, alternating one another. As a result the interface eld of neighboring terraces point in opposite direction, leading to the nucleation of a sequence of domain walls in the ferromagnetic stripe. We investigated iron an permalloy micrometric stripes, with width ranging from 100 nm and 300 nm and thickness of 5 nm. We focused in domain wall sequences with same chirality and alternate chirality. We have found that for 100nm terraces the same chiraility sequence is more stable, requiring a larger value of the external eld for depinning. The third system consists of an iron lm with a thickness of 5 nm, exchange coupled to an AF substrate with a periodic distribution of islands where the AF spins have the opposite direction of the spins in the background. This corresponds to a two-sublattice noncompensated AF plane (such as the surface of a (100) FeF2 lm), with monolayer-height islands containing spins of one sublattice on a surface containing spins of the opposite sublattice. The interface eld acting in the ferromagnetic spins over the islands points in the opposite direction of that in the spins over the background. This a model system for the investigation of interface roughness e ects. We have studied the coercicivity an exchange bias hysteresis shift as a function of the distance between the islands and the degree of interface roughness. We have found a relevant reduction of coercivity for nearly compensated interfaces. Also the e ective hysteresis shift is not proportional to the liquid moment of the AF plane. We also developed an analytical model which reproduces qualitatively the results of numerical simulations

The influence of sintering process and atmosphere on the non-ohmic properties of SnO2 based varistor

The non-ohmic properties of the 98.95% SnO2 + 1.0 CoO + 0.05 Nb2O5 (all in mole%) system, as well as the influence of sintering temperature and atmosphere on these properties, were characterized in this study. The maximum non-linear coefficient (alpha = 32) was obtained for a sintering temperature of 1300 degrees C in an oxygen atmosphere and this maximum is associated with the presence of O in SnO2 grain boundaries, as interface defects. Experimental results also indicate thermionic-type conduction mechanisms, which are associated with the potential barrier of Schottky or Poole-Frenkel types.

Photoluminescence of core-shell nanoparticles made from yttrium stabilized zirconia powder grain coated with alumina

A YSZ@Al2O3 nanocomposite was obtained by Al 2O3 coating on the surface of yttrium stabilized zirconia via a polymeric precursor method. The resulting core-shell structures were characterized by X-ray diffraction, scanning electron microscopy, transmission electronic microscopy and PL spectra. The TEM micrographs clearly show a homogeneous Al2O3 shell around the ZrO2 core. The observed PL is related to surface-interface defects. Such novel technologies can, in principle, explore materials which are not available in the bulk single crystal form but their figure-of-merit is dramatically dependent on the surface-interface defect states. © 2013 This journal isThe Royal Society of Chemistry.

Caracterização elétrica de túnel-FET em estrutura de nanofio com fontes de SiGe e Ge em função da temperatura.

Este trabalho teve como objetivo estudar os transistores de tunelamento por efeito de campo em estruturas de nanofio (NW-TFET), sendo realizado através de analises com base em explicações teóricas, simulações numéricas e medidas experimentais. A fim de avaliar melhorar o desempenho do NW-TFET, este trabalho utilizou dispositivos com diferentes materiais de fonte, sendo eles: Si, liga SiGe e Ge, além da variação da espessura de HfO2 no material do dielétrico de porta. Com o auxílio de simulações numéricas foram obtidos os diagramas de bandas de energia dos dispositivos NW-TFET com fonte de Si0,73Ge0,27 e foi analisada a influência de cada um dos mecanismos de transporte de portadores para diversas condições de polarização, sendo observado a predominância da influência da recombinação e geração Shockley-Read-Hall (SRH) na corrente de desligamento, do tunelamento induzido por armadilhas (TAT) para baixos valores de tensões de porta (0,5V > VGS > 1,5V) e do tunelamento direto de banda para banda (BTBT) para maiores valores tensões de porta (VGS > 1,5V). A predominância de cada um desses mecanismos de transporte foi posteriormente comprovada com a utilização do método de Arrhenius, sendo este método adotado em todas as análises do trabalho. O comportamento relativamente constante da corrente dos NW-TFETs com a temperatura na região de BTBT tem chamado a atenção e por isso foi realizado o estudo dos parâmetros analógicos em função da temperatura. Este estudo foi realizado comparando a influência dos diferentes materiais de fonte. O uso de Ge na fonte, permitiu a melhora na corrente de tunelamento, devido à sua menor banda proibida, aumentando a corrente de funcionamento (ION) e a transcondutância do dispositivo. Porém, devido à forte dependência de BTBT com o campo elétrico, o uso de Ge na fonte resulta em uma maior degradação da condutância de saída. Entretanto, a redução da espessura de HfO2 no dielétrico de porta resultou no melhor acoplamento eletrostático, também aumentando a corrente de tunelamento, fazendo com que o dispositivo com fonte Ge e menor HfO2 apresentasse melhores resultados analógicos quando comparado ao puramente de Si. O uso de diferentes materiais durante o processo de fabricação induz ao aumento de defeitos nas interfaces do dispositivo. Ao longo deste trabalho foi realizado o estudo da influência da densidade de armadilhas de interface na corrente do dispositivo, demonstrando uma relação direta com o TAT e a formação de uma região de platô nas curvas de IDS x VGS, além de uma forte dependência com a temperatura, aumentando a degradação da corrente para temperaturas mais altas. Além disso, o uso de Ge introduziu maior número de impurezas no óxido, e através do estudo de ruído foi observado que o aumento na densidade de armadilhas no óxido resultou no aumento do ruído flicker em baixa frequência, que para o TFET, ocorre devido ao armadilhamento e desarmadilhamento de elétrons na região do óxido. E mais uma vez, o melhor acoplamento eletrostático devido a redução da espessura de HfO2, resultou na redução desse ruído tornando-se melhor quando comparado à um TFET puramente de Si. Neste trabalho foi proposto um modelo de ruído em baixa frequência para o NW-TFET baseado no modelo para MOSFET. Foram realizadas apenas algumas modificações, e assim, obtendo uma boa concordância com os resultados experimentais na região onde o BTBT é o mecanismo de condução predominante.

Nature of interfacial defects and their roles in strain relaxation at highly lattice mismatched 3C-SiC/Si (001) interface

Misfit defects in a 3C-SiC/Si (001) interface were investigated using a 200 kV high-resolution electron microscope with a point resolution of 0.194 nm. The [110] high-resolution electron microscopic images that do not directly reflect the crystal structure were transformed into the structure map through image deconvolution. Based on this analysis, four types of misfit dislocations at the 3C-SiC/Si (001) interface were determined. In turn, the strain relaxation mechanism was clarified through the generation of grow-in perfect misfit dislocations (including 90 degrees Lomer dislocations and 60 degrees shuffle dislocations) and 90 partial dislocations associated with stacking faults. (C) 2009 American Institute of Physics. [doi:10.1063/1.3234380]

Investigation of electrically active defects at the interface of high-k dielectrics and compound semiconductors

As silicon based devices in integrated circuits reach the fundamental limits of dimensional scaling there is growing research interest in the use of high electron mobility channel materials, such as indium gallium arsenide (InGaAs), in conjunction with high dielectric constant (high-k) gate oxides, for Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) based devices. The motivation for employing high mobility channel materials is to reduce power dissipation in integrated circuits while also providing improved performance. One of the primary challenges to date in the field of III-V semiconductors has been the observation of high levels of defect densities at the high-k/III-V interface, which prevents surface inversion of the semiconductor. The work presented in this PhD thesis details the characterization of MOS devices incorporating high-k dielectrics on III-V semiconductors. The analysis examines the effect of modifying the semiconductor bandgap in MOS structures incorporating InxGa1-xAs (x: 0, 0.15. 0.3, 0.53) layers, the optimization of device passivation procedures designed to reduce interface defect densities, and analysis of such electrically active interface defect states for the high-k/InGaAs system. Devices are characterized primarily through capacitance-voltage (CV) and conductance-voltage (GV) measurements of MOS structures both as a function of frequency and temperature. In particular, the density of electrically active interface states was reduced to the level which allowed the observation of true surface inversion behavior in the In0.53Ga0.47As MOS system. This was achieved by developing an optimized (NH4)2S passivation, minimized air exposure, and atomic layer deposition of an Al2O3 gate oxide. An extraction of activation energies allows discrimination of the mechanisms responsible for the inversion response. Finally a new approach is described to determine the minority carrier generation lifetime and the oxide capacitance in MOS structures. The method is demonstrated for an In0.53Ga0.47As system, but is generally applicable to any MOS structure exhibiting a minority carrier response in inversion.

Evaluation of a hybrid scaffold/cell construct in repair of high-load-bearing osteochondral defects in rabbits

The objective of this study was to evaluate the feasibility and potential of a hybrid scaffold system in large- and high-load-bearing osteochondral defects repair. The implants were made of medical-grade PCL (mPCL) for the bone compartment whereas fibrin glue was used for the cartilage part. Both matrices were seeded with allogenic bone marrow-derived mesenchymal cells (BMSC) and implanted in the defect (4 mm diameter×5 mm depth) on medial femoral condyle of adult New Zealand White rabbits. Empty scaffolds were used at the control side. Cell survival was tracked via fluorescent labeling. The regeneration process was evaluated by several techniques at 3 and 6 months post-implantation. Mature trabecular bone regularly formed in the mPCL scaffold at both 3 and 6 months post-operation. Micro-Computed Tomography showed progression of mineralization from the host–tissue interface towards the inner region of the grafts. At 3 months time point, the specimens showed good cartilage repair. In contrast, the majority of 6 months specimens revealed poor remodeling and fissured integration with host cartilage while other samples could maintain good cartilage appearance. In vivo viability of the transplanted cells was demonstrated for the duration of 5 weeks. The results demonstrated that mPCL scaffold is a potential matrix for osteochondral bone regeneration and that fibrin glue does not inherit the physical properties to allow for cartilage regeneration in a large and high-load-bearing defect site. Keywords: Osteochondral tissue engineering; Scaffold; Bone marrow-derived precursor cells; Fibrin glue

Deformation and failure of graphene sheet and graphene-polymer interface

With a monolayer honeycomb-lattice of sp2-hybridized carbon atoms, graphene has demonstrated exceptional electrical, mechanical and thermal properties. One of its promising applications is to create graphene-polymer nanocomposites with tailored mechanical and physical properties. In general, the mechanical properties of graphene nanofiller as well as graphene-polymer interface govern the overall mechanical performance of graphene-polymer nanocomposites. However, the strengthening and toughening mechanisms in these novel nanocomposites have not been well understood. In this work, the deformation and failure of graphene sheet and graphene-polymer interface were investigated using molecular dynamics (MD) simulations. The effect of structural defects on the mechanical properties of graphene and graphene-polymer interface was investigated as well. The results showed that structural defects in graphene (e.g. Stone-Wales defect and multi-vacancy defect) can significantly deteriorate the fracture strength of graphene but may still make full utilization of corresponding strength of graphene and keep the interfacial strength and the overall mechanical performance of graphene-polymer nanocomposites.