Elevated levels of urinary 8-hydroxy-2'-deoxyguanosine in male electrical and electronic equipment dismantling workers exposed to high concentrations of polychlorinated dibenzo-p-dioxins and dibenzofurans, polybrominated diphenyl ethers, and polychlorinated biphenyls

To investigate the occupational exposure levels to polychlorinated dibenzo-p-dioxins and dibenzofurans (PCDD/Fs), polybrominated diphenyl ethers (PBDEs), and polychlorinated biphenyls (PCBs), indoor dust (n = 3) in workshops and hair samples from male workers (n = 64) were collected at two electrical and electronic equipment waste (E-waste) dismantling factories located in the LQ area in east China in July 11-13, 2006. Pre- and postworkshift urines (64 of each) were also collected from the workers to study oxidative damage to DNA using 8-hydroxy-2'-deoxyguanosine (8-OHdG) as a biomarker. The concentrations of PCDD/Fs, PCDD/F-WHO-TEQs, PBDEs, PCBs and PCB-WHO-TEQs were (50.0 +/- 8.1) x 10(3), 724.1 +/- 249.6, (27.5 +/- 5.8) x 10(6), (1.6 +/- 0.4) x 10(9), (26.2 +/- 3.0) x 10(3) pg/g dry weight (dw) in dust, and (2.6 +/- 0.6) x 10(3), 42.4 +/- 9.3, (870.8 +/- 205.4) x 10(3), (1.6 +/- 0.2) x 10(6), 41.5 +/- 5.5 pg/g dw in hair, respectively. The homologue and congener profiles in the samples demonstrated that high concentrations of PCDD/Fs, PBDEs, and PCBs were originated from open burning of E-waste. The 8-OHdG levels were detected at 6.40 +/- 1.64 mu mol/mol creatinine in preworkshift urines. However, the levels significantly increased to 24.55 +/- 5.96 mu mol/mol creatinine in postworkshift urines (p < 0.05). Then, it is concluded that there is a high cancer risk originated from oxidative stress indicated by the elevated 8-OHdG levels in the E-waste dismantling workers exposed to high concentrations of PCDD/Fs, PBDEs, and PCBs.

A study into the impact of introducing Year 5 students to university and electronic engineering

This paper demonstrates the benefits of introducing Year 5 school students to university life, encountering styles of teaching to which they would be otherwise unaccustomed; and the results of a survey conducted both before and after the study visit to determine whether the visit was beneficial to the students in academic terms.

Export decisions within Taiwanese electrical and electronic SMEs : the role of management characteristics and attitudes

In this globalized environment, Taiwanese firms have been very successful in achieving growth via international market expansion. In particular, the Taiwanese electronics industry has shown a dynamism lacking in comparable industries around the world. However, in recent years there has been a move by many of the larger Taiwanese manufacturing firms to outsource their manufacturing to low-cost producers such as China in order to remain competitive. Conversely, most Taiwanese small- to medium-sized enterprises (SMEs) have retained their production facilities in Taiwan. These SMEs seek to expand their sales beyond the domestic market by employing an export strategy, making a significant socioeconomic contribution to the domestic and regional economies. This paper highlights the key dimensions such as enhancing factors (benefits/advantages), inhibiting factors (barriers/costs), and managerial factors (characteristics/commitment) that play an important role in the internationalization of SMEs located within the Taiwanese electronics industry. A logistic regression model is used to predict the probability of a firm being an exporter.

Phenomenology and system engineering of micro- and nano-antenna FPA sensors for detection of concealed weapons and improvised explosive devices

The ability of millimetre wave and terahertz systems to penetrate clothing is well known. The fact that the transmission of clothing and the reflectivity of the body vary as a function of frequency is less so. Several instruments have now been developed to exploit this capability. The choice of operating frequency, however, has often been associated with the maturity and the cost of the enabling technology rather than a sound systems engineering approach. Top level user and systems requirements have been derived to inform the development of design concepts. Emerging micro and nano technology concepts have been reviewed and we have demonstrated how these can be evaluated against these requirements by simulation using OpenFx. Openfx is an open source suite of 3D tools for modeling, animation and visualization which has been modified for use at millimeter waves. © 2012 SPIE.

Analysis of twelve electrical and electronics engineering programs

This paper investigates undergraduate programs in electrical and electronics engineering offered by twelve universities in Australia, Asia, Europe, and America. The investigation focuses on the structure and content of the programs, and the contact hour and assessment of the subjects involved in the programs. The investigation is carried out in four stages: selection of universities, collection of data, analysis of data, and formulation of outcomes. A list of subjects is created based on the content of the programs. The average percentage coverage of each subject in the twelve programs is calculated. The subjects are then grouped into nine program components. The average percentage coverage of each component per university is calculated. For each component, the total number of contact hours for lecture, tutorial, and practical is calculated. Also, the average percentage of four assessment methods for each component is found. Discussions on the outcome of the investigation are presented.

Pollutant Formation During the Thermal Decomposition of Electrical and Electronic Wastes

Paper submitted to the 7th International Symposium on Feedstock Recycling of Polymeric Materials (7th ISFR 2013), New Delhi, India, 23-26 October 2013.

Improving the freshman electrical and computer engineering lab

This thesis covers the challenges of creating and maintaining an introductory engineering laboratory. The history of the University of Illinois Electrical and Computer Engineering department’s introductory course, ECE 110, is recounted. The current state of the course, as of Fall 2008, is discussed along with current challenges arising from the use of a hand-wired prototyping board with logic gates. A plan for overcoming these issues using a new microcontroller-based board with a pseudo hardware description language is discussed. The new microcontroller based system implementation is extensively detailed along with its new accompanying description language. This new system was tried in several sections of the Fall 2008 semester alongside the old system; the students’ final performances with the two different approaches are compared in terms of design, performance, complexity, and enjoyment. The system in its first run shows great promise, increasing the students’ enjoyment, and improving the performance of their designs.

An assessment for cost effective maintenance and operation of the Callide Power Station electrical system, using reliability evaluation

The reliable operation of the electrical system at Callide Power Station is of extreme importance to the normal everyday running of the Station. This study applied the principles of reliability to do an analysis on the electrical system at Callide Power Station. It was found that the level of expected outage cost increased exponentially with a declining level of maintenance. Concluding that even in a harsh economic electricity market where CS Energy tries and push their plants to the limit, maintenance must not be neglected. A number of system configurations were found to increase the reliability of the system and reduce the expected outage costs. A number of other advantages were identified as a result of using reliability principles to do this study on the Callide electrical system configuration.

6-T SRAM cell design with nanoscale double-gate SOI MOSFETs: impact of source/drain engineering and circuit topology

The impact of source/drain engineering on the performance of a six-transistor (6-T) static random access memory (SRAM) cell, based on 22 nm double-gate (DG) SOI MOSFETs, has been analyzed using mixed-mode simulation, for three different circuit topologies for low voltage operation. The trade-offs associated with the various conflicting requirements relating to read/write/standby operations have been evaluated comprehensively in terms of eight performance metrics, namely retention noise margin, static noise margin, static voltage/current noise margin, write-ability current, write trip voltage/current and leakage current. Optimal design parameters with gate-underlap architecture have been identified to enhance the overall SRAM performance, and the influence of parasitic source/drain resistance and supply voltage scaling has been investigated. A gate-underlap device designed with a spacer-to-straggle (s/sigma) ratio in the range 2-3 yields improved SRAM performance metrics, regardless of circuit topology. An optimal two word-line double-gate SOI 6-T SRAM cell design exhibits a high SNM similar to 162 mV, I-wr similar to 35 mu A and low I-leak similar to 70 pA at V-DD = 0.6 V, while maintaining SNM similar to 30% V-DD over the supply voltage (V-DD) range of 0.4-0.9 V.

Engineering source/drain extension regions in nanoscale double gate (DG) SOI MOSFETs: Analytical model and design considerations

In this paper, we propose for the first time, an analytical model for short channel effects in nanoscale source/drain extension region engineered double gate (DG) SOI MOSFETs. The impact of (i) lateral source/drain doping gradient (d), (ii) spacer width (s), (iii) spacer to doping gradient ratio (s/d) and (iv) silicon film thickness (T-si), on short channel effects - threshold voltage (V-th) and subthreshold slope (S), on-current (I-on), off-current (I-on) and I-on/I-off is extensively analysed by using the analytical model and 2D device simulations. The results of the analytical model confirm well with simulated data over the entire range of spacer widths, doping gradients and effective channel lengths. Results show that lateral source/drain doping gradient along with spacer width can not only effectively control short channel effects, thus presenting low off-current, but can also be optimised to achieve high values of on-currents. The present work provides valuable design insights in the performance of nanoscale DG Sol devices with optimal source/drain engineering and serves as a tool to optimise important device and technological parameters for 65 nm technology node and below. (c) 2006 Elsevier Ltd. All rights reserved.