Aplicando lógica fuzzy no controle de robôs móveis usando dispositivos lógicos programáveis e a linguagem VHDL

Pós-graduação em Engenharia Elétrica - FEIS

Detecção de faltas em sistemas de distribuição de energia elétrica usando dispositivos programáveis

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Tecnologías actuales para dispositivos lógicos programables

Gran parte de los circuitos integrados de aplicación específica actuales se desarrollan sobre dispositivos lógicos programables (PLD). Los fabricantes ofrecen diferentes tecnologías programables, algunas de ellas admiten la reconfiguración de los diseños, incluso en tiempo de operación, mientras que otras pueden configurarse una única vez (tecnologías fusibles y antifusibles). En el trabajo se analizarán las diferentes familias de dispositivos y sus tecnologías, con especial atención en su capacidad de integración y consumo. Asimismo se realizarán diseños simples con alguna de ellas.

Ambiente computacional paradesenvolvimento de aplicações de controladores lógicos programáveis baseado em linguagens SFC e ST

This work proposes an environment for programming programmable logic controllers applied to oil wells with BCP type method of artificially lifting. The environment will have an editor based in the diagram of sequential functions for programming of PLCs. This language was chosen due to the fact of being high-level and accepted by the international standard IEC 61131-3. The use of these control programs in real PLC will be possible with the use of an intermediate level of language based on XML specification PLCopen T6 XML. For the testing and validation of the control programs, an area should be available for viewing variables obtained through communication with a real PLC. Thus, the main contribution of this work is to develop a computational environment that allows: modeling, testing and validating the controls represented in SFC and applied in oil wells with BCP type method of artificially lifting

Ambiente computacional paradesenvolvimento de aplicações de controladores lógicos programáveis baseado em linguagens SFC e ST

This work proposes an environment for programming programmable logic controllers applied to oil wells with BCP type method of artificially lifting. The environment will have an editor based in the diagram of sequential functions for programming of PLCs. This language was chosen due to the fact of being high-level and accepted by the international standard IEC 61131-3. The use of these control programs in real PLC will be possible with the use of an intermediate level of language based on XML specification PLCopen T6 XML. For the testing and validation of the control programs, an area should be available for viewing variables obtained through communication with a real PLC. Thus, the main contribution of this work is to develop a computational environment that allows: modeling, testing and validating the controls represented in SFC and applied in oil wells with BCP type method of artificially lifting

Reconfigurable transmitters for software-defined radios

Flexible radio transmitters based on the Software-Defined Radio (SDR) concept are gaining an increased research importance due to the unparalleled proliferation of new wireless standards operating at different frequencies, using dissimilar coding and modulation schemes, and targeted for different ends. In this new wireless communications paradigm, the physical layer of the radio transmitter must be able to support the simultaneous transmission of multi-band, multi-rate, multi-standard signals, which in practice is very hard or very inefficient to implement using conventional approaches. Nevertheless, the last developments in this field include novel all-digital transmitter architectures where the radio datapath is digital from the baseband up to the RF stage. Such concept has inherent high flexibility and poses an important step towards the development of SDR-based transmitters. However, the truth is that implementing such radio for a real world communications scenario is a challenging task, where a few key limitations are still preventing a wider adoption of this concept. This thesis aims exactly to address some of these limitations by proposing and implementing innovative all-digital transmitter architectures with inherent higher flexibility and integration, and where improving important figures of merit, such as coding efficiency, signal-to-noise ratio, usable bandwidth and in-band and out-of-band noise will also be addressed. In the first part of this thesis, the concept of transmitting RF data using an entirely digital approach based on pulsed modulation is introduced. A comparison between several implementation technologies is also presented, allowing to state that FPGAs provide an interesting compromise between performance, power efficiency and flexibility, thus making them an interesting choice as an enabling technology for pulse-based all-digital transmitters. Following this discussion, the fundamental concepts inherent to pulsed modulators, its key advantages, main limitations and typical enhancements suitable for all-digital transmitters are also presented. The recent advances regarding the two most common classes of pulse modulated transmitters, namely the RF and the baseband-level are introduced, along with several examples of state-of-the-art architectures found on the literature. The core of this dissertation containing the main developments achieved during this PhD work is then presented and discussed. The first key contribution to the state-of-the-art presented here consists in the development of a novel ΣΔ-based all-digital transmitter architecture capable of multiband and multi-standard data transmission in a very flexible and integrated way, where the pulsed RF output operating in the microwave frequency range is generated inside a single FPGA device. A fundamental contribution regarding the simultaneous transmission of multiple RF signals is then introduced by presenting and describing novel all-digital transmitter architectures that take advantage of multi-gigabit data serializers available on current high-end FPGAs in order to transmit in a time-interleaved approach multiple independent RF carriers. Further improvements in this design approach allowed to provide a two-stage up-conversion transmitter architecture enabling the fine frequency tuning of concurrent multichannel multi-standard signals. Finally, further improvements regarding two key limitations inherent to current all-digital transmitter approaches are then addressed, namely the poor coding efficiency and the combined high quality factor and tunability requirements of the RF output filter. The followed design approach based on poliphase multipath circuits allowed to create a new FPGA-embedded agile transmitter architecture that significantly improves important figures of merit, such as coding efficiency and SNR, while maintains the high flexibility that is required for supporting multichannel multimode data transmission.

LOGO2VHDL: modelos descritos em VHDL a partir da linguagem do LOGO!Soft Comfort da Siemens

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Implementação de um nó IEEE 1451, baseado em ferramentas abertas e padronizadas, para aplicações em ambientes de instrumentação distribuída

Pós-graduação em Engenharia Elétrica - FEIS

Operating infrastructure for an FPGA and ARM system

Advances in FPGA technology and higher processing capabilities requirements have pushed to the emerge of All Programmable Systems-on-Chip, which incorporate a hard designed processing system and a programmable logic that enable the development of specialized computer systems for a wide range of practical applications, including data and signal processing, high performance computing, embedded systems, among many others. To give place to an infrastructure that is capable of using the benefits of such a reconfigurable system, the main goal of the thesis is to implement an infrastructure composed of hardware, software and network resources, that incorporates the necessary services for the operation, management and interface of peripherals, that coompose the basic building blocks for the execution of applications. The project will be developed using a chip from the Zynq-7000 All Programmable Systems-on-Chip family.

Arquitetura híbrida com DSP e FPGA para implementação de controladores de filtros ativos de potência

The presence of non-linear loads at a point in the distribution system may deform voltage waveform due to the consumption of non-sinusoidal currents. The use of active power filters allows significant reduction of the harmonic content in the supply current. However, the processing of digital control structures for these filters may require high performance hardware, particularly for reference currents calculation. This work describes the development of hardware structures with high processing capability for application in active power filters. In this sense, it considers an architecture that allows parallel processing using programmable logic devices. The developed structure uses a hybrid model using a DSP and an FPGA. The DSP is used for the acquisition of current and voltage signals, calculation of fundamental current related controllers and PWM generation. The FPGA is used for intensive signal processing, such as the harmonic compensators. In this way, from the experimental analysis, significant reductions of the processing time are achieved when compared to traditional approaches using only DSP. The experimental results validate the designed structure and these results are compared with other ones from architectures reported in the literature.

Sistema web didático para a supervisão de redes fieldbus

Technological evolution of industrial automation systems has been guided by the dillema between flexibilization and confiability on the integration between devices and control supervisory systems. However, there are few supervisory systems whose attributions can also comprehend the teaching of the communication process that happens behind this technological integration, where those which are available are little flexible about accessibility and reach of patterns. On this context, we present the first module of a didactic supervisory system, accessible through Web, applied on the teaching of the main fieldbus protocols. The application owns a module that automatically discovers the network topology being used and allows students and professionals of automation to obtain a more practical knowledgment by exchanging messages with a PLC, allowing those who are involved to know with more details the communication process of an automation supervisory system. By the fact of being available through Web, the system will allow a remote access to the PLC, comprehending a larger number of users. This first module is focused on the Modbus protocol (TCP and RTU/ASCII)

Projecto dum laboratório remoto para automação de processos industriais

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia Mecânica

Laboratório remoto de automação industrial (Lab-RAI)

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e Computadores

Teste da rede de interconexões de field programmable analog arrays

Os dispositivos analógicos programáveis (FPAAs, do inglês, Field Programmable Analog Arrays), apesar de ainda não terem a mesma popularidade de seus pares digitais (FPGAs, do inglês, Field Programmable Gate Arrays), possuem uma gama de aplicações bastante ampla, que vai desde o condicionamento de sinais em sistemas de instrumentação, até o processamento de sinais de radiofreqüência (RF) em telecomunicações. Porém, ao mesmo tempo em que os FPAAs trouxeram um impressionante ganho na agilidade de concepção de circuitos analógicos, também trouxeram um conjunto de novos problemas relativos ao teste deste tipo de dispositivo. Os FPAAs podem ser divididos em duas partes fundamentais: seus blocos programáveis básicos (CABs, do inglês, Configurable Analog Blocks) e sua rede de interconexões. A rede de interconexões, por sua vez, pode ser dividida em duas partes: interconexões internas (locais e globais entre CABs) e interconexões externas (envolvendo células de I/O). Todas estas partes apresentam características estruturais e funcionais distintas, de forma que devem ser testadas separadamente, pois necessitam que se considerem modelos de falhas, configurações e estímulos de teste específicos para assegurar uma boa taxa de detecção de defeitos. Como trabalhos anteriores já estudaram o teste dos CABs, o foco desta dissertação está direcionado ao desenvolvimento de metodologias que se propõem a testar a rede de interconexões de FPAAs. Apesar das várias diferenças entre as redes de interconexões de FPGAs e FPAAs, muitas também são as semelhanças entre elas, sendo, portanto, indiscutível que o ponto de partida deste trabalho tenha que ser o estudo das muitas técnicas propostas para o teste de interconexões em FPGAs, para posterior adaptação ao caso dos FPAAs. Além disto, embora o seu foco não recaia sobre o teste de CABs, pretende-se utilizá-los como recursos internos do dispositivo passíveis de gerar sinais e analisar respostas de teste, propondo uma abordagem de auto-teste integrado de interconexões que reduza o custo relativo ao equipamento externo de teste. Eventualmente, estes mesmos recursos poderão também ser utilizados para diagnóstico das partes defeituosas. Neste trabalho, utiliza-se como veículo de experimentação um dispositivo específico (Anadigm AN10E40), mas pretende-se que as metodologias de teste propostas sejam abrangentes e possam ser facilmente adaptadas a outros FPAAs comerciais que apresentem redes de interconexão semelhantes.

fwWorkCell : framework para a construção de simuladores didáticos de células de trabalho

Braços robóticos articulados são cada vez mais utilizados hoje em dia e consistem de dispositivos mecânicos programáveis, equipados com sensores e atuadores sob o controle de um sistema computacional. Existem atualmente no mercado inúmeros fabricantes e modelos destes braços, cada um adequado a uma determinada utilização ou faixa de mercado. Para que se saiba operar devidamente este robô é necessário um período de aprendizagem. Essa necessidade pode ser suprida pelo emprego dos simuladores de braços robóticos.Desenvolver um simulador é uma atividade complexa, mas alguns elementos de sua estrutura e de seu comportamento são comuns a vários tipos de simuladores e podem idealmente ser reusados. Permitir reuso de código e de projeto é exatamente um dos principais fatores que motivaram a construção de um framework. Este trabalho descreve a definição e a construção do fwWorkCell , um framework que permita agilizar a construção destes simuladores. Tal agilidade será obtida através da implementação de um ambiente de edição e de classes genéricas para controle, visualização e programação dos robôs. A proposta deste framework inclui definição de classes genéricas e de controle, a construção de todo um ambiente de suporte à manipulação e visualização das células de trabalho e suas simulações e visa dar suporte à construção de uma grande variedade de simuladores. O framework proposto foi utilizado em uma aplicação real: através dele foi feita a migração de um simulador já existente.