Decimal Multiplication using compact BCD Multiplier

Decimal multiplication is an integral part offinancial, commercial, and internet-based computations. The basic building block of a decimal multiplier is a single digit multiplier. It accepts two Binary Coded Decimal (BCD) inputs and gives a product in the range [0, 81] represented by two BCD digits. A novel design for single digit decimal multiplication that reduces the critical path delay and area is proposed in this research. Out of the possible 256 combinations for the 8-bit input, only hundred combinations are valid BCD inputs. In the hundred valid combinations only four combinations require 4 x 4 multiplication, combinations need x multiplication, and the remaining combinations use either x or x 3 multiplication. The proposed design makes use of this property. This design leads to more regular VLSI implementation, and does not require special registers for storing easy multiples. This is a fully parallel multiplier utilizing only combinational logic, and is extended to a Hex/Decimal multiplier that gives either a decimal output or a binary output. The accumulation ofpartial products generated using single digit multipliers is done by an array of multi-operand BCD adders for an (n-digit x n-digit) multiplication.

Fixed Point Decimal Multiplication Using RPS Algorithm

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. A novel design for single digit decimal multiplication that reduces the critical path delay and area for an iterative multiplier is proposed in this research. The partial products are generated using single digit multipliers, and are accumulated based on a novel RPS algorithm. This design uses n single digit multipliers for an n × n multiplication. The latency for the multiplication of two n-digit Binary Coded Decimal (BCD) operands is (n + 1) cycles and a new multiplication can begin every n cycle. The accumulation of final partial products and the first iteration of partial product generation for next set of inputs are done simultaneously. This iterative decimal multiplier offers low latency and high throughput, and can be extended for decimal floating-point multiplication.

Performance analysis of double digit decimal multiplier on various FPGA logic families

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that performs 2 digit multiplications simultaneously in one clock cycle. This design offers low latency and high throughput. When multiplying two n-digit operands to produce a 2n-digit product, the design has a latency of (n / 2) 1 cycles. The paper presents area and delay comparisons for 7-digit, 16-digit, 34-digit double digit decimal multipliers on different families of Xilinx, Altera, Actel and Quick Logic FPGAs. The multipliers presented can be extended to support decimal floating-point multiplication for IEEE P754 standard

High performance, low latency double digit decimal multiplier on ASIC and FPGA

Decimal multiplication is an integral part of financial, commercial, and internet-based computations. This paper presents a novel double digit decimal multiplication (DDDM) technique that offers low latency and high throughput. This design performs two digit multiplications simultaneously in one clock cycle. Double digit fixed point decimal multipliers for 7digit, 16 digit and 34 digit are simulated using Leonardo Spectrum from Mentor Graphics Corporation using ASIC Library. The paper also presents area and delay comparisons for these fixed point multipliers on Xilinx, Altera, Actel and Quick logic FPGAs. This multiplier design can be extended to support decimal floating point multiplication for IEEE 754- 2008 standard.

Design and synthesis of efficient mac architectures for high speed decimal processor

Most of the commercial and financial data are stored in decimal fonn. Recently, support for decimal arithmetic has received increased attention due to the growing importance in financial analysis, banking, tax calculation, currency conversion, insurance, telephone billing and accounting. Performing decimal arithmetic with systems that do not support decimal computations may give a result with representation error, conversion error, and/or rounding error. In this world of precision, such errors are no more tolerable. The errors can be eliminated and better accuracy can be achieved if decimal computations are done using Decimal Floating Point (DFP) units. But the floating-point arithmetic units in today's general-purpose microprocessors are based on the binary number system, and the decimal computations are done using binary arithmetic. Only few common decimal numbers can be exactly represented in Binary Floating Point (BF P). ln many; cases, the law requires that results generated from financial calculations performed on a computer should exactly match with manual calculations. Currently many applications involving fractional decimal data perform decimal computations either in software or with a combination of software and hardware. The performance can be dramatically improved by complete hardware DFP units and this leads to the design of processors that include DF P hardware.VLSI implementations using same modular building blocks can decrease system design and manufacturing cost. A multiplexer realization is a natural choice from the viewpoint of cost and speed.This thesis focuses on the design and synthesis of efficient decimal MAC (Multiply ACeumulate) architecture for high speed decimal processors based on IEEE Standard for Floating-point Arithmetic (IEEE 754-2008). The research goal is to design and synthesize deeimal'MAC architectures to achieve higher performance.Efficient design methods and architectures are developed for a high performance DFP MAC unit as part of this research.

Year 6 students' idiosyncratic notions of unitising, reunitising and regrouping decimal number places

Having flexible notions of the unit (e.g., 26 ones can be thought of as 2.6 tens, 1 ten 16 ones, 260 tenths, etc.) should be a major focus of elementary mathematics education. However, often these powerful notions are relegated to computations where the major emphasis is on "getting the right answer" thus procedural knowledge rather than conceptual knowledge becomes the primary focus. This paper reports on 22 high-performing students' reunitising processes ascertained from individual interviews on tasks requiring unitising, reunitising and regrouping; errors were categorised to depict particular thinking strategies. The results show that, even for high-performing students, regrouping is a cognitively complex task. This paper analyses this complexity and draws inferences for teaching.

Strategies for comparing decimal numbers with the same whole-number part

The strategies employed by 130 Grade 5 Brisbane students in comparing decimal numbers which have the same whole-number part were compared with those identified in similar studies conducted in the USA, France and Israel. Three new strategies were identified. Similar to USA results, the most common comparison errors stemmed from the incorrect whole-number strategy in which length is confused with size. The findings of this present study tend to support Resnick et al.’s (1989) hypothesis that the introduction of decimal-fraction recording before common-fraction recording seems to promote better comparison of decimal numbers.

Construction of multiplicative abstract schema for decimal-number numeration

This paper reports on an intervention study planned to help Year 6 students construct the multiplicative structure underlying decimal-number numeration. Three types of intervention were designed from a numeration model developed from a large study of 173 Year 6 students’ decimal-number knowledge. The study found that students could acquire multiplicative structure as an abstract schema if instruction took account of prior knowledge as informed by the model.

Place value, multiplicativity, reunitizing and effective classroom teaching of decimal numeration

Student understanding of decimal number is poor (e.g., Baturo, 1998; Behr, Harel, Post & Lesh, 1992). This paper reports on a study which set out to determine the cognitive complexities inherent in decimal-number numeration and what teaching experiences need to be provided in order to facilitate an understanding of decimal-number numeration. The study gave rise to a theoretical model which incorporated three levels of knowledge. Interview tasks were developed from the model to probe 45 students’ understanding of these levels, and intervention episodes undertaken to help students construct the baseline knowledge of position and order (Level 1 knowledge) and an understanding of multiplicative structure (Level 3 knowledge). This paper describes the two interventions and reports on the results which suggest that helping students construct appropriate mental models is an efficient and effective teaching strategy.

Optical techniques for real-time binary multiplication

An optical system which performs the multiplication of binary numbers is described and proof-of-principle experiments are performed. The simultaneous generation of all partial products, optical regrouping of bit products, and optical carry look-ahead addition are novel features of the proposed scheme which takes advantage of the parallel operations capability of optical computers. The proposed processor uses liquid crystal light valves (LCLVs). By space-sharing the LCLVs one such system could function as an array of multipliers. Together with the optical carry look-ahead adders described, this would constitute an optical matrix-vector multiplier.

Co-constructing decimal number knowledge

This mathematics education research provides significant insights for the teaching of decimals to children. It is well known that decimals is one of the most difficult topics to learn and teach. Annette’s research is unique in that it focuses not only on the cognitive, but also on the affective and conative aspects of learning and teaching of decimals. The study is innovative as it includes the students as co-constructors and co-researchers. The findings open new ways of thinking for educators about how students cognitively process decimal knowledge, as well as how students might develop a sense of self as a learner, teacher and researcher in mathematics.

Tissue culture of forest trees: Clonal multiplication of Eucalyptus grandis L

Axillary shoot proliferation was obtained using explants of Eucalyptus grandis L. juvenile and mature stages on a defined medium. Murashige and Skoog medium (MS) supplemented with benzyladenine (BA), naphthalene acetic acid (NAA) and additional thiamine. Excised shoots were induced to root on a sequence of three media: (1) White's medium containing indoleacetic acid (IAA), NAA and indole butyric acid; (IBA), (2) half-strength MS medium with charcoal and (3) half-strength MS liquid medium. The two types of explants differed in rooting response, with juvenile-derived shoots giving 60% rooting and adult-derived ones only 35%. Thus, the factors limiting cloning of selected trees in vitro are determined to be those controlling rooting of shoots in E. grandis.

Multiplication of hybrid aspen (Populus tremula L. x P. tremuloides Michx.) from cuttings

The primary aim of the present study was to find an efficient and simple method of vegetative propagation for producing large numbers of hybrid aspen (Populus tremuloides L. x P. tremula Michx.) plants for forest plantations. The key objectives were to investigate the main physiological factors that affect the ability of cuttings to regenerate and to determine whether these factors could be manipulated by different growth conditions. In addition, clonal variation in traits related to propagation success was examined. According to our results, with the stem cutting method, depending on the clone, it is possible to obtain only 1−8 plants from one stock plant per year. With the root cutting method the corresponding values for two-year-old stock plants are 81−207 plants. The difference in number of cuttings between one- and two-year-old stock plants is so pronounced that it is economically feasible to grow stock plants for two years. There is no reason to use much older stock plants as a source of cuttings, as it has been observed that rooting ability diminishes as root diameter increases. Clonal variation is the most important individual factor in propagation of hybrid aspen. The fact that the efficiently sprouted clones also rooted best facilitates the selection of clones for large-scale propagation. In practice, root cuttings taken from all parts of the root system of hybrid aspen were capable of producing new shoots and roots. However, for efficient rooting it is important to use roots smaller than one centimeter in diameter. Both rooting and sprouting, as well as sprouting rate, were increased by high soil temperature; in our studies the highest temperature tested (30ºC) was the best. Light accelerated the sprouting of root cuttings, but they rooted best in dark conditions. Rooting is essential because without roots the sprouted cutting cannot survive long. For aspen the criteria for clone selection are primarily fiber qualities and growth rate, but ability to regenerate efficiently is also essential. For large-scale propagation it is very important to find clones from which many cuttings per stock plant can be obtained. In light of production costs, however, it is even more important that the regeneration ability of the produced cuttings be high.