Implication de DC-SIGN et DC-SIGNR dans la transmission mère-enfant du VIH-1

La transmission mère-enfant du VIH-1 (TME) représente le principal mode d’infection chez l’enfant et se produit durant la grossesse (in utero, IU), l’accouchement (intrapartum, IP) ou l’allaitement (postpartum, PP). Les mécanismes qui sous-tendent le passage du VIH-1 à travers le placenta et les muqueuses intestinales du nouveau-né sont encore très peu décrits. « Dendritic cell-specific ICAM-grabbing non-integrin » (DC-SIGN) et son homologue DC-SIGN « related » (DC-SIGNR) sont des récepteurs d’antigènes exprimés au niveau du placenta et capables de capter et de transmettre le VIH-1 aux cellules adjacentes. Ils pourraient donc participer au passage trans placentaire du VIH-1 et le polymorphisme génétique affectant l’expression ou modifiant l’interaction avec le virus aurait une influence sur la TME du VIH-1. Afin d’explorer cette hypothèse, nous avons procédé à une analyse exhaustive du polymorphisme de DC-SIGN et DC-SIGNR dans la population du Zimbabwe. Par la suite, nous avons déterminé l’association entre le polymorphisme de DC-SIGN et DC-SIGNR et la TME du VIH-1 dans une cohorte d’enfants nés de mères VIH-positives à Harare, au Zimbabwe. Enfin, nous avons défini l’impact fonctionnel des mutations associées. Les enfants homozygotes pour les haplotypes H1 et H3 dans le gène de DC-SIGNR sont 4 à 6 fois plus à risque de contracter le VIH-1 par voie IU et IP. H1 et H3 contiennent la mutation du promoteur p-198A et la mutation de l’intron 2, int2-180A, et des études fonctionnelles nous ont permis de démontrer que p-198A diminue l’activité transcriptionnelle du promoteur de DC-SIGNR et l’expression des transcrits d’ARNm dans le placenta, alors que int2-180A modifie le répertoire d’isoformes de DC-SIGNR vers une proportion diminuée d’isoformes membranaires. Les enfants porteurs des haplotypes H4 et H6 de DC-SIGN sont 2 à 6 fois plus à risque de contracter le VIH-1 par voie IU. Ces haplotypes contiennent deux mutations du promoteur (p-336T/C et p-201C/A) et quatre mutations codant pour un changement d’acide aminé dans l’exon 4 (R198Q, E214D, R221Q ou L242V) associées à un risque augmenté de transmission IU, IP et PP du VIH-1. Des études fonctionnelles ont démontré que les mutations du promoteur diminuent l’expression de DC-SIGN dans les macrophages placentaires. Toutefois, l’exposition IU au VIH-1 module le niveau d’expression de DC-SIGN, résultant en des niveaux d’expression similaires entre les macrophages des porteurs des allèles sauvages et mutés. Les mutations de l’exon 4 augmentent l’affinité de DC-SIGN pour le VIH-1 et sa capacité à capturer et à transmettre le virus aux lymphocytes T, favorisant possiblement la dissémination du VIH-1 à travers le placenta. L’association entre les mutations de DC-SIGN et la transmission IP et PP du VIH-1 suggèrent qu’il aurait aussi un rôle à jouer dans les muqueuses intestinales de l’enfant. Notre étude démontre pour la première fois l’implication de DC-SIGN et DC-SIGNR dans la TME du VIH-1. L’augmentation des capacités de capture et de transmission de DC-SIGN résulte en une susceptibilité accrue de l’enfant à l’infection au VIH-1 et concorde avec un rôle dans la dissémination transplacentaire. Toutefois, la diminution préférentielle des transcrits membranaires de DC-SIGNR au placenta augmente la TME du VIH-1 et laisse croire à son implication via un autre mécanisme. Ces mécanismes pourraient aussi s’appliquer à d’autres pathogènes reconnus par DC-SIGN et DC-SIGNR et transmis de la mère à l’enfant.

DC-SIGNR, a DC-SIGN homologue expressed in endothelial cells, binds to human and simian immunodeficiency viruses and activates infection in trans

DC-SIGN, a C-type lectin expressed on the surface of dendritic cells (DCs), efficiently binds and transmits HIVs and simian immunodeficiency viruses to susceptible cells in trans. A DC-SIGN homologue, termed DC-SIGNR, has recently been described. Herein we show that DC-SIGNR, like DC-SIGN, can bind to multiple strains of HIV-1, HIV-2, and simian immunodeficiency virus and transmit these viruses to both T cell lines and human peripheral blood mononuclear cells. Binding of virus to DC-SIGNR was dependent on carbohydrate recognition. Immunostaining with a DC-SIGNR-specific antiserum showed that DC-SIGNR was expressed on sinusoidal endothelial cells in the liver and on endothelial cells in lymph node sinuses and placental villi. The presence of this efficient virus attachment factor on multiple endothelial cell types indicates that DC-SIGNR could play a role in the vertical transmission of primate lentiviruses, in the enabling of HIV to traverse the capillary endothelium in some organs, and in the presentation of virus to CD4-positive cells in multiple locations including lymph nodes.

Polymorphisms in the C-type lectin genes cluster in chromosome 19 and predisposition to severe acute respiratory syndrome coronavirus (SARS-CoV) infection

Background: Polymorphisms of CLEC4M have been associated with predisposition for infection by the severe acute respiratory syndrome coronavirus (SARS-CoV). DC-SIGNR, a C-type lectin encoded by CLEC4M, is a receptor for the virus. A variable number tandem

Asymmetrical DC link voltage configuration for a diode-clamped inverter

There is a trade off between a number of output voltage levels and the reliability and efficiency of a multilevel converter. A new configuration of diode-clamped multilevel inverters with a different combination of DC link capacitors voltage has been proposed in this paper. Two different symmetrical and asymmetrical unequal arrangements for a four-level diode-clamped inverter have been compared, in order to find an optimum arrangement with lower switching losses and optimised output voltage quality. The simulation and hardware results for a four-level inverter show that the asymmetrical configuration can obtain more output voltage levels with the same number of components compared with a conventional four-level inverter and this will lead to the reduction of the harmonic content of the output voltage. A new family of multi-output DC-DC converters with a simple control strategy has been utilised as a front-end converter to supply the DC link capacitor voltages for the optimised configuration.

Multi-output DC-DC converters based on diode-clamped converters configuration : topology and control strategy

This paper presents a new DC-DC Multi-Output Boost (MOB) converter which can share its total output between different series of output voltages for low and high power applications. This configuration can be utilised instead of several single output power supplies. This is a compatible topology for a diode-clamed inverter in the grid connection systems, where boosting low rectified output-voltage and series DC link capacitors is required. To verify the proposed topology, steady state and dynamic analysis of a MOB converter are examined. A simple control strategy has been proposed to demonstrate the performance of the proposed topology for a double-output boost converter. The topology and its control strategy can easily be extended to offer multiple outputs. Simulation and experimental results are presented to show the validity of the control strategy for the proposed converter.

A new family of multi-output DC-DC converter topologies to supply an asymmetrical four-level diode-clamped inverter

Purpose Multi-level diode-clamped inverters have the challenge of capacitor voltage balancing when the number of DC-link capacitors is three or more. On the other hand, asymmetrical DC-link voltage sources have been applied to increase the number of voltage levels without increasing the number of switches. The purpose of this paper is to show that an appropriate multi-output DC-DC converter can resolve the problem of capacitor voltage balancing and utilize the asymmetrical DC-link voltages advantages. Design/methodology/approach A family of multi-output DC-DC converters is presented in this paper. The application of these converters is to convert the output voltage of a photovoltaic (PV) panel to regulate DC-link voltages of an asymmetrical four-level diode-clamped inverter utilized for domestic applications. To verify the versatility of the presented topology, simulations have been directed for different situations and results are presented. Some related experiments have been developed to examine the capabilities of the proposed converters. Findings The three-output voltage-sharing converters presented in this paper have been mathematically analysed and proven to be appropriate to improve the quality of the residential application of PV by means of four-level asymmetrical diode-clamped inverter supplying highly resistive loads. Originality/value This paper shows that an appropriate multi-output DC-DC converter can resolve the problem of capacitor voltage balancing and utilize the asymmetrical DC-link voltages advantages and that there is a possibility of operation at high-modulation index despite reference voltage magnitude and power factor variations.

Flexible high-power multi DC-DC converters for train systems

This thesis reports on the investigations, simulations and analyses of novel power electronics topologies and control strategies. The research is financed by an Australian Research Council (ARC) Linkage (07-09) grant. Therefore, in addition to developing original research and contributing to the available knowledge of power electronics, it also contributes to the design of a DC-DC converter for specific application to the auxiliary power supply in electric trains. Specifically, in this regard, it contributes to the design of a 7.5 kW DC-DC converter for the industrial partner (Schaffler and Associates Ltd) who supported this project. As the thesis is formatted as a ‘thesis by publication’, the contents are organized around published papers. The research has resulted in eleven papers, including seven peer reviewed and published conference papers, one published journal paper, two journal papers accepted for publication and one submitted journal paper (provisionally accepted subject to few changes). In this research, several novel DC-DC converter topologies are introduced, analysed, and tested. The similarity of all of the topologies devised lies in their ‘current circulating’ switching state, which allows them to store some energy in the inductor, as extra inductor current. The stored energy may be applied to enhance the performance of the converter in the occurrence of load current or input voltage disturbances. In addition, when there is an alternating load current, the ability to store energy allows the converter to perform satisfactorily despite frequently and highly varying load current. In this research, the capability of current storage has been utilised to design topologies for specific applications, and the enhancement of the performance of the considered applications has been illustrated. The simplest DC-DC converter topology, which has a ‘current circulating’ switching state, is the Positive Buck-Boost (PBB) converter (also known as the non-inverting Buck-Boost converter). Usually, the topology of the PBB converter is operating as a Buck or a Boost converter in applications with widely varying input voltage or output reference voltage. For example, in electric railways (the application of our industrial partner), the overhead line voltage alternates from 1000VDC to 500VDC and the required regulated voltage is 600VDC. In the course of this research, our industrial partner (Schaffler and Associates Ltd) industrialized a PBB converter–the ‘Mudo converter’–operating at 7.5 kW. Programming the onboard DSP and testing the PBB converter in experimental and nominal power and voltage was part of this research program. In the earlier stages of this research, the advantages and drawbacks of utilization of the ‘current circulating’ switching state in the positive Buck-Boost converter were investigated. In brief, the advantages were found to be robustness against input voltage and current load disturbances, and the drawback was extra conduction and switching loss. Although the robustness against disturbances is desirable for many applications, the price of energy loss must be minimized to attract attention to the utilization of the PBB converter. In further stages of this research, two novel control strategies for different applications were devised to minimise the extra energy loss while the advantages of the positive Buck-Boost converter were fully utilized. The first strategy is Smart Load Controller (SLC) for applications with pre-knowledge or predictability of input voltage and/or load current disturbances. A convenient example of these applications is electric/hybrid cars where a master controller commands all changes in loads and voltage sources. Therefore, the master controller has a pre-knowledge of the load and input voltage disturbances so it can apply the SLC strategy to utilize robustness of the PBB converter. Another strategy aiming to minimise energy loss and maximise the robustness in the face of disturbance is developed to cover applications with unexpected disturbances. This strategy is named Dynamic Hysteresis Band (DHB), and is used to manipulate the hysteresis band height after occurrence of disturbance to reduce dynamics of the output voltage. When no disturbance has occurred, the PBB converter works with minimum inductor current and minimum energy loss. New topologies based on the PBB converter have been introduced to address input voltage disturbances for different onboard applications. The research shows that the performance of applications of symmetrical/asymmetrical multi-level diode-clamped inverters, DC-networks, and linear-assisted RF amplifiers may be enhanced by the utilization of topologies based on the PBB converter. Multi-level diode-clamped inverters have the problem of DC-link voltage balancing when the power factor of their load closes to unity. This research has shown that this problem may be solved with a suitable multi-output DC-DC converter supplying DClink capacitors. Furthermore, the multi-level diode-clamped inverters supplied with asymmetrical DC-link voltages may improve the quality of load voltage and reduce the level of Electromagnetic Interference (EMI). Mathematical analyses and experiments on supplying symmetrical and asymmetrical multi-level inverters by specifically designed multi-output DC-DC converters have been reported in two journal papers. Another application in which the system performance can be improved by utilization of the ‘current circulating’ switching state is linear-assisted RF amplifiers in communicational receivers. The concept of ‘linear-assisted’ is to divide the signal into two frequency domains: low frequency, which should be amplified by a switching circuit; and the high frequency domain, which should be amplified by a linear amplifier. The objective is to minimize the overall power loss. This research suggests using the current storage capacity of a PBB based converter to increase its bandwidth, and to increase the domain of the switching converter. The PBB converter addresses the industrial demand for a DC-DC converter for the application of auxiliary power supply of a typical electric train. However, after testing the industrial prototype of the PBB converter, there were some voltage and current spikes because of switching. To attenuate this problem without significantly increasing the switching loss, the idea of Active Gate Signalling (AGS) is presented. AGS suggests a smart gate driver that selectively controls the switching process to reduce voltage/current spikes, without unacceptable reduction in the efficiency of switching.

Flying-capacitor-based chopper circuit for DC capacitor voltage balancing in diode-clamped multilevel inverter

This paper proposes a flying-capacitor-based chopper circuit for dc capacitor voltage equalization in diode-clamped multilevel inverters. Its important features are reduced voltage stress across the chopper switches, possible reduction in the chopper switching frequency, improved reliability, and ride-through capability enhancement. This topology is analyzed using three- and four-level flying-capacitor-based chopper circuit configurations. These configurations are different in capacitor and semiconductor device count and correspondingly reduce the device voltage stresses by half and one-third, respectively. The detailed working principles and control schemes for these circuits are presented. It is shown that, by preferentially selecting the available chopper switch states, the dc-link capacitor voltages can be efficiently equalized in addition to having tightly regulated flying-capacitor voltages around their references. The various operating modes of the chopper are described along with their preferential selection logic to achieve the desired performances. The performance of the proposed chopper and corresponding control schemes are confirmed through both simulation and experimental investigations.

Dwell-time and run-time control for DC mass rapid transit railways

Dwell times at stations and inter-station run times are the two major operational parameters to maintain train schedule in railway service. Current practices on dwell-time and run-time control are that they are only optimal with respect to certain nominal traffic conditions, but not necessarily the current service demand. The advantages of dwell-time and run-time control on trains are therefore not fully considered. The application of a dynamic programming approach, with the aid of an event-based model, to devise an optimal set of dwell times and run times for trains under given operational constraints over a regional level is presented. Since train operation is interactive and of multi-attributes, dwell-time and run-time coordination among trains is a multi-dimensional problem. The computational demand on devising trains' instructions, a prime concern in real-time applications, is excessively high. To properly reduce the computational demand in the provision of appropriate dwell times and run times for trains, a DC railway line is divided into a number of regions and each region is controlled by a dwell- time and run-time controller. The performance and feasibility of the controller in formulating the dwell-time and run-time solutions for real-time applications are demonstrated through simulations.

AC/DC electrical characteristics of epoxy-multi wall carbon nanotube nanocomposites

Expoxy nanocomposites with multiwell carbon nanotubes (mwcnts) filler up to 0.3%wt were prepared by sheer mixing and good dispersion of the MWCNTS in the epoxy was successfully achieved. The electrical behaviour was characterized by measurements of the alternating current (ac) and direct current (dc) conductives at room temperature. Typical percolation behaviour was observed at a low percolation threshold of 0.055%. Frequency independent ac conductivity was observed at low frequencies but not at high frequencies. An equivalent circuit models was used to predict the impedence response in these nanocomposites.

Corona ions from overhead transmission voltage powerlines : effect on DC e-field and ambient particle concentration levels

Along with their essential role in electricity transmission and distribution, some powerlines also generate large concentrations of corona ions. This study aimed at comprehensive investigation of corona ions, vertical dc e-field, ambient aerosol particle charge and particle number concentration levels in the proximity of some high/sub-transmission voltage powerlines. The influence of meteorology on the instantaneous value of these parameters, and the possible existence of links or associations between the parameters measured were also statistically investigated. The presence of positive and negative polarities of corona ions was associated with variation in the mean vertical dc e-field, ambient ion and particle charge concentration level. Though these variations increased with wind speed, their values also decreased with distance from the powerlines. Predominately positive polarities of ions were recorded up to a distance of 150 m (with the maximum values recorded 50 m downwind of the powerlines). At 200 m from the source, negative ions predominated. Particle number concentration levels however remained relatively constant (103 particle cm-3) irrespective of the sampling site and distance from the powerlines. Meteorological factors of temperature, humidity and wind direction showed no influence on the electrical parameters measured. The study also discovered that e-field measurements were not necessarily a true representation of the ground-level ambient ion/particle charge concentrations.

A new unequal DC link voltage configuration for a single phase multilevel converter to reduce low order harmonics

Multilevel converters are used in high power and high voltage applications due to their attractive benefits in generating high quality output voltage. Increasing the number of voltage levels can lead to a reduction in lower order harmonics. Various modulation and control techniques are introduced for multilevel converters like Space Vector Modulation (SVM), Sinusoidal Pulse Width Modulation (SPWM) and Harmonic Elimination (HE) methods. Multilevel converters may have a DC link with equal or unequal DC voltages. In this paper a new modulation technique based on harmonic elimination method is proposed for those multilevel converters that have unequal DC link voltages. This new technique has better effect on output voltage quality and less Total Harmonic Distortion (THD) than other modulation techniques. In order to verify the proposed modulation technique, MATLAB simulations are carried out for a single-phase diode-clamped inverter.