941 resultados para Converter currents


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Teaching a course of special electric loads in a continuing education program to power engineers is a difficult task because they are not familiarized with switching topology circuits. Normally, in a typical program, many hours are dedicated to explain the thyristors switching sequence and to draw the converter currents and terminal voltages waveforms for different operative conditions. This work presents teaching support software in order to optimize the time spent in this task and, mainly to benefit the assimilation of the proposed subjects, studying the static converter under different non-ideal operative conditions.

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Este trabalho apresenta contribuições para algoritmos de controle utilizados em filtros ativos e híbridos conectados em redes elétricas trifásicas a 3 ou a 4 fios. Em relação aos algoritmos de controle para filtros ativos, a contribuição consiste em estender o conceito da filtragem harmônica seletiva para compensação de correntes harmônicas e desequilibradas em uma rede trifásica a 4 fios. Esses algoritmos derivam dos conceitos utilizados na teoria da potência instantânea (teoria pq), em conjunto com um circuito de sincronismo PLL. É importante ressaltar que estes algoritmos não utilizam as correntes consumidas pelas cargas, ou seja, apenas as tensões no ponto da rede onde o filtro está conectado são utilizadas para determinação das correntes harmônicas de referência. Apenas as correntes na saída do conversor são utilizadas como realimentação do controle PWM. Estes algoritmos também foram utilizados no filtro híbrido para compensação de correntes harmônicas em uma rede trifásica a 3 fios. Por fim foi feito uma alteração nesses algoritmos de controle que permite eliminar as correntes utilizadas na realimentação do controle PWM. Resultados de simulação são apresentados com objetivo de observar o comportamento desses algoritmos tanto no filtro ativo quanto no híbrido nas condições mencionadas.

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Dissertação para obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Eletrotécnica Ramo de Automação e Eletrónica Industrial

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In recent years, multilevel converters are becoming more popular and attractive than traditional converters in high voltage and high power applications. Multilevel converters are particularly suitable for harmonic reduction in high power applications where semiconductor devices are not able to operate at high switching frequencies or in high voltage applications where multilevel converters reduce the need to connect devices in series to achieve high switch voltage ratings. This thesis investigated two aspects of multilevel converters: structure and control. The first part of this thesis focuses on inductance between a DC supply and inverter components in order to minimise loop inductance, which causes overvoltages and stored energy losses during switching. Three dimensional finite element simulations and experimental tests have been carried out for all sections to verify theoretical developments. The major contributions of this section of the thesis are as follows: The use of a large area thin conductor sheet with a rectangular cross section separated by dielectric sheets (planar busbar) instead of circular cross section wires, contributes to a reduction of the stray inductance. A number of approximate equations exist for calculating the inductance of a rectangular conductor but an assumption was made that the current density was uniform throughout the conductors. This assumption is not valid for an inverter with a point injection of current. A mathematical analysis of a planar bus bar has been performed at low and high frequencies and the inductance and the resistance values between the two points of the planar busbar have been determined. A new physical structure for a voltage source inverter with symmetrical planar bus bar structure called Reduced Layer Planar Bus bar, is proposed in this thesis based on the current point injection theory. This new type of planar busbar minimises the variation in stray inductance for different switching states. The reduced layer planar busbar is a new innovation in planar busbars for high power inverters with minimum separation between busbars, optimum stray inductance and improved thermal performances. This type of the planar busbar is suitable for high power inverters, where the voltage source is supported by several capacitors in parallel in order to provide a low ripple DC voltage during operation. A two layer planar busbar with different materials has been analysed theoretically in order to determine the resistance of bus bars during switching. Increasing the resistance of the planar busbar can gain a damping ratio between stray inductance and capacitance and affects the performance of current loop during switching. The aim of this section is to increase the resistance of the planar bus bar at high frequencies (during switching) and without significantly increasing the planar busbar resistance at low frequency (50 Hz) using the skin effect. This contribution shows a novel structure of busbar suitable for high power applications where high resistance is required at switching times. In multilevel converters there are different loop inductances between busbars and power switches associated with different switching states. The aim of this research is to consider all combinations of the switching states for each multilevel converter topology and identify the loop inductance for each switching state. Results show that the physical layout of the busbars is very important for minimisation of the loop inductance at each switch state. Novel symmetrical busbar structures are proposed for multilevel converters with diode-clamp and flying-capacitor topologies which minimise the worst case in stray inductance for different switching states. Overshoot voltages and thermal problems are considered for each topology to optimise the planar busbar structure. In the second part of the thesis, closed loop current techniques have been investigated for single and three phase multilevel converters. The aims of this section are to investigate and propose suitable current controllers such as hysteresis and predictive techniques for multilevel converters with low harmonic distortion and switching losses. This section of the thesis can be classified into three parts as follows: An optimum space vector modulation technique for a three-phase voltage source inverter based on a minimum-loss strategy is proposed. One of the degrees of freedom for optimisation of the space vector modulation is the selection of the zero vectors in the switching sequence. This new method improves switching transitions per cycle for a given level of distortion as the zero vector does not alternate between each sector. The harmonic spectrum and weighted total harmonic distortion for these strategies are compared and results show up to 7% weighted total harmonic distortion improvement over the previous minimum-loss strategy. The concept of SVM technique is a very convenient representation of a set of three-phase voltages or currents used for current control techniques. A new hysteresis current control technique for a single-phase multilevel converter with flying-capacitor topology is developed. This technique is based on magnitude and time errors to optimise the level change of converter output voltage. This method also considers how to improve unbalanced voltages of capacitors using voltage vectors in order to minimise switching losses. Logic controls require handling a large number of switches and a Programmable Logic Device (PLD) is a natural implementation for state transition description. The simulation and experimental results describe and verify the current control technique for the converter. A novel predictive current control technique is proposed for a three-phase multilevel converter, which controls the capacitors' voltage and load current with minimum current ripple and switching losses. The advantage of this contribution is that the technique can be applied to more voltage levels without significantly changing the control circuit. The three-phase five-level inverter with a pure inductive load has been implemented to track three-phase reference currents using analogue circuits and a programmable logic device.

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A general electrical model of a piezoelectric transducer for ultrasound applications consists of a capacitor in parallel with RLC legs. A high power voltage source converter can however generate significant voltage stress across the transducer that creates high leakage currents. One solution is to reduce the voltage stress across the piezoelectric transducer by using an LC filter, however a main drawback is changing the piezoelectric resonant frequency and its characteristics. Thereby it reduces the efficiency of energy conversion through the transducer. This paper proposes that a high frequency current source converter is a suitable topology to drive high power piezoelectric transducers efficiently.

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Active Front-End (AFE) converter operation produces electrically noisy DC bus on common mode basis. This results in higher ground current as compared to three phase diode bridge rectifier. Filter topologies for DC bus have to deal problems with switching frequency and harmonic currents. The proposed filter approach reduces common mode voltage and circulates third harmonic current within the system, resulting in minimal ground current injection. The filtering technique, its constrains and design to attenuate common mode voltage and eliminate lower order harmonics injection to ground is discussed. The experimental results for operation of the converter with both SPWM and CSVPWM are presented.

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This paper presents a computationally efficient model for a dc-dc boost converter, which is valid for continuous and discontinuous conduction modes; the model also incorporates significant non-idealities of the converter. Simulation of the dc-dc boost converter using an average model provides practically all the details, which are available from the simulation using the switching (instantaneous) model, except for the quantum of ripple in currents and voltages. A harmonic model of the converter can be used to evaluate the ripple quantities. This paper proposes a combined (average-cum-harmonic) model of the boost converter. The accuracy of the combined model is validated through extensive simulations and experiments. A quantitative comparison of the computation times of the average, combined and switching models are presented. The combined model is shown to be more computationally efficient than the switching model for simulation of transient and steady-state responses of the converter under various conditions.

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Insulated gate bipolar transistors (IGBTs) are used in high-power voltage-source converters rated up to hundreds of kilowatts or even a few megawatts. Knowledge of device switching characteristics is required for reliable design and operation of the converters. Switching characteristics are studied widely at high current levels, and corresponding data are available in datasheets. But the devices in a converter also switch low currents close to the zero crossings of the line currents. Further, the switching behaviour under these conditions could significantly influence the output waveform quality including zero crossover distortion. Hence, the switching characteristics of high-current IGBTs (300-A and 75-A IGBT modules) at low load current magnitudes are investigated experimentally in this paper. The collector current, gate-emitter voltage and collector-emitter voltage are measured at various low values of current (less than 10% of the device rated current). A specially designed in-house constructed coaxial current transformer (CCT) is used for device current measurement without increasing the loop inductance in the power circuit. Experimental results show that the device voltage rise time increases significantly during turn-off transitions at low currents.

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Insulated gate bipolar transistors (IGBTs) are used in high-power voltage-source converters rated up to hundreds of kilowatts or even a few megawatts. Knowledge of device switching characteristics is required for reliable design and operation of the converters. Switching characteristics are studied widely at high current levels, and corresponding data are available in datasheets. But the devices in a converter also switch low currents close to the zero crossings of the line currents. Further, the switching behaviour under these conditions could significantly influence the output waveform quality including zero crossover distortion. Hence, the switching characteristics of high-current IGBTs (300-A and 75-A IGBT modules) at low load current magnitudes are investigated experimentally in this paper. The collector current, gate-emitter voltage and collector-emitter voltage are measured at various low values of current (less than 10% of the device rated current). A specially designed in-house constructed coaxial current transformer (CCT) is used for device current measurement without increasing the loop inductance in the power circuit. Experimental results show that the device voltage rise time increases significantly during turn-off transitions at low currents.

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A 5V/1 V Switched Capacitor (SC) dc-dc converter designed for a 0.18μm CMOS process is analysed in detail, in this paper. Analytical equations are derived for the voltages and currents through the main components of the SC converter. The model includes switches, capacitors, equivalent series resistances and the load. The switches in the converter are represented by MOSFETs in the UMC 0.18μm CMOS process. The impact of system parameters on output voltage ripple are studied using the analytical expressions.

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1.5 mu m DFB LD butt-joint integrated with vertical tapered spotsize converter was fabricated by LP-MOVPE. The vertical far field angle (FWHM) was decreased from 34degrees to 10degrees the threshold currents was as low as 19.8mA, the output power was 9.6mw at 100mA without HR coating and the SMSR was 35.8dB. The 1-dBm misalignment tolerance was 3.2 mu m, while the counterpart of the device without SSC was 2.2 mu m.

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Dissertação para a obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Energia

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This work presents a new high power factor three-phase rectifier based on a Y-connected differential autotransformer with reduced kVA and 18-pulse input current followed by three DC-DC boost converters. The topology provides a regulated output voltage and natural three-phase input power factor correction. The lowest input current harmonic components are the 17th and the 19th. Three boost converters, with constant input currents and regulated parallel connected output voltages are used to process 4kW each one. Analytical results from Fourier analyses of winding currents and the vector diagram of winding voltages are presented. Simulation results to verify the proposed concept and experimental results are shown in the paper.

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This paper describes the design and development of a high input power-factor (HPF) AC to AC converter for naval applications using Permanent Magnet Generator (PMG). The proposed converter comprises an isolated three-phase uncontrolled multipulse rectification stage directly connected to a single-phase inverter stage, without the use of DC to DC intermediary stage, resulting in more simplicity for the overall circuitry, assuring robustness, reliability and reduced costs. Furthermore, the multipulse rectifier stage is capable to provide high power factor and input currents with low total harmonic distortion (THD). The output voltage of the PMG varies from 260V rms (220 Hz) to 380V rms (360 Hz), depending on load conditions. The output single-phase inverter stage was designed to operate with wide range of DC bus voltage, maintaining 120V rms, 60 Hz output. Measured total harmonic distortion for the AC output voltage represents less than 2%, at 3.6kW nominal linear load. © 2010 IEEE.

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This work proposes a new three-phase multipulse rectifier based on the delta autotransformer connection with DC-DC Boost stages and constant hysteresis control which has the objective of providing a reliable DC bus for on-board applications, electric motor drives and similars, always considering power quality issues. Thus, the proposal presents 0.99 power factor, 6% harmonic distortions in the currents from the mains and enhanced magnetic core utilization, which results in low weight and volume for the overall converter. The proposed control technique uses the simple constant hysteresis concept, thus leading to a low-cost but effective and reliable strategy. © 2011 IEEE.