875 resultados para Classification of Solder Joint
Resumo:
Inspection of solder joints has been a critical process in the electronic manufacturing industry to reduce manufacturing cost, improve yield, and ensure product quality and reliability. The solder joint inspection problem is more challenging than many other visual inspections because of the variability in the appearance of solder joints. Although many research works and various techniques have been developed to classify defect in solder joints, these methods have complex systems of illumination for image acquisition and complicated classification algorithms. An important stage of the analysis is to select the right method for the classification. Better inspection technologies are needed to fill the gap between available inspection capabilities and industry systems. This dissertation aims to provide a solution that can overcome some of the limitations of current inspection techniques. This research proposes two inspection steps for automatic solder joint classification system. The “front-end” inspection system includes illumination normalisation, localization and segmentation. The illumination normalisation approach can effectively and efficiently eliminate the effect of uneven illumination while keeping the properties of the processed image. The “back-end” inspection involves the classification of solder joints by using Log Gabor filter and classifier fusion. Five different levels of solder quality with respect to the amount of solder paste have been defined. Log Gabor filter has been demonstrated to achieve high recognition rates and is resistant to misalignment. Further testing demonstrates the advantage of Log Gabor filter over both Discrete Wavelet Transform and Discrete Cosine Transform. Classifier score fusion is analysed for improving recognition rate. Experimental results demonstrate that the proposed system improves performance and robustness in terms of classification rates. This proposed system does not need any special illumination system, and the images are acquired by an ordinary digital camera. In fact, the choice of suitable features allows one to overcome the problem given by the use of non complex illumination systems. The new system proposed in this research can be incorporated in the development of an automated non-contact, non-destructive and low cost solder joint quality inspection system.
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Purpose: Computer vision has been widely used in the inspection of electronic components. This paper proposes a computer vision system for the automatic detection, localisation, and segmentation of solder joints on Printed Circuit Boards (PCBs) under different illumination conditions. Design/methodology/approach: An illumination normalization approach is applied to an image, which can effectively and efficiently eliminate the effect of uneven illumination while keeping the properties of the processed image the same as in the corresponding image under normal lighting conditions. Consequently special lighting and instrumental setup can be reduced in order to detect solder joints. These normalised images are insensitive to illumination variations and are used for the subsequent solder joint detection stages. In the segmentation approach, the PCB image is transformed from an RGB color space to a YIQ color space for the effective detection of solder joints from the background. Findings: The segmentation results show that the proposed approach improves the performance significantly for images under varying illumination conditions. Research limitations/implications: This paper proposes a front-end system for the automatic detection, localisation, and segmentation of solder joint defects. Further research is required to complete the full system including the classification of solder joint defects. Practical implications: The methodology presented in this paper can be an effective method to reduce cost and improve quality in production of PCBs in the manufacturing industry. Originality/value: This research proposes the automatic location, identification and segmentation of solder joints under different illumination conditions.
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Inspection of solder joints has been a critical process in the electronic manufacturing industry to reduce manufacturing cost, improve yield, and ensure project quality and reliability. This paper proposes the use of the Log-Gabor filter bank, Discrete Wavelet Transform and Discrete Cosine Transform for feature extraction of solder joint images on Printed Circuit Boards (PCBs). A distance based on the Mahalanobis Cosine metric is also presented for classification of five different types of solder joints. From the experimental results, this methodology achieved high accuracy and a well generalised performance. This can be an effective method to reduce cost and improve quality in the production of PCBs in the manufacturing industry.
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Solder materials are used to provide a connection between electronic components and printed circuit boards (PCBs) using either the reflow or wave soldering process. As a board assembly passes through a reflow furnace the solder (initially in the form of solder paste) melts, reflows, then solidifies, and finally deforms between the chip and board. A number of defects may occur during this process such as flux entrapment, void formation, and cracking of the joint, chip or board. These defects are a serious concern to industry, especially with trends towards increasing component miniaturisation and smaller pitch sizes. This paper presents a modelling methodology for predicting solder joint shape, solidification, and deformation (stress) during the assembly process.
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Abstract not available
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This paper proposes the validity of a Gabor filter bank for feature extraction of solder joint images on Printed Circuit Boards (PCBs). A distance measure based on the Mahalanobis Cosine metric is also presented for classification of five different types of solder joints. From the experimental results, this methodology achieved high accuracy and a well generalised performance. This can be an effective method to reduce cost and improve quality in the production of PCBs in the manufacturing industry.
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The trend towards miniaturization of electronic products leads to the need for very small sized solder joints. Therefore, there is a higher reliability risk that too large a fraction of solder joints will transform into Intermetallic Compounds (IMCs) at the solder interface. In this paper, fracture mechanics study of the IMC layer for SnPb and Pb-free solder joints was carried out using finite element numerical computer modelling method. It is assumed that only one crack is present in the IMC layer. Linear Elastic Fracture Mechanics (LEFM) approach is used for parametric study of the Stress Intensity Factors (SIF, KI and KII), at the predefined crack in the IMC layer of solder butt joint tensile sample. Contrary to intuition, it is revealed that a thicker IMC layer in fact increases the reliability of solder joint for a cracked IMC. Value of KI and KII are found to decrease with the location of the crack further away from the solder interfaces while other parameters are constant. Solder thickness and strain rate were also found to have a significant influence on the SIF values. It has been found that soft solder matrix generates non-uniform plastic deformation across the solder-IMC interface near the crack tip that is responsible to obtain higher KI and KII.
Resumo:
Inspection of solder joints has been a critical process in the electronic manufacturing industry to reduce manufacturing cost, improve yield, and ensure product quality and reliability. This paper proposes two inspection modules for an automatic solder joint classification system. The “front-end” inspection system includes illumination normalisation, localisation and segmentation. The “back-end” inspection involves the classification of solder joints using the Log Gabor filter and classifier fusion. Five different levels of solder quality with respect to the amount of solder paste have been defined. The Log Gabor filter has been demonstrated to achieve high recognition rates and is resistant to misalignment. This proposed system does not need any special illumination system, and the images are acquired by an ordinary digital camera. This system could contribute to the development of automated non-contact, non-destructive and low cost solder joint quality inspection systems.
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A computational model of solder joint formation and the subsequent cooling behaviour is described. Given the rapid changes in the technology of printed circuit boards, there is a requirement for comprehensive models of solder joint formation which permit detailed analysis of design and optimization options. Solder joint formation is complex, involving a range of interacting phenomena. This paper describes a model implementation (as part of a more comprehensive framework) to describe the shape formation (conditioned by surface tension), heat transfer, phase change and the development of elastoviscoplastic stress. The computational modelling framework is based upon mixed finite element and finite volume procedures, and has unstructured meshes enabling arbitrarily complex geometries to be analysed. Initial results for both through-hole and surface-mount geometries are presented.
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The effect of thermal-mechanical loading on a surface mount assembly with interface cracks between the solder and the resistor and between the solder and the printed circuit board (PCB) was studied using a non-linear thermal finite element analysis. The thermal effect was taken as cooling from the solder eutectic temperature to room temperature. Mechanical loading at the ends of the PCB was also applied. The results showed that cooling had the effect of causing large residual shear displacement at the region near the interface cracks. The mechanical loading caused additional crack opening displacements. The analysis on the values of J-integral for the interface cracks showed that J-integral was approximately path independent, and that the effect of crack at the solder/PCB interface is much more serious than that between the component and solder.
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The objective of this paper is to investigate the effect of the pad size ratio between the chip and board end of a solder joint on the shape of that solder joint in combination with the solder volume available. The shape of the solder joint is correlated to its reliability and thus of importance. For low density chip bond pad applications Flip Chip (FC) manufacturing costs can be kept down by using larger size board pads suitable for solder application. By using “Surface Evolver” software package the solder joint shapes associated with different size/shape solder preforms and chip/board pad ratios are predicted. In this case a so called Flip-Chip Over Hole (FCOH) assembly format has been used. Assembly trials involved the deposition of lead-free 99.3Sn0.7Cu solder on the board side, followed by reflow, an underfill process and back die encapsulation. During the assembly work pad off-sets occurred that have been taken into account for the Surface Evolver solder joint shape prediction and accurately matched the real assembly. Overall, good correlation was found between the simulated solder joint shape and the actual fabricated solder joint shapes. Solder preforms were found to exhibit better control over the solder volume. Reflow simulation of commercially available solder preform volumes suggests that for a fixed stand-off height and chip-board pad ratio, the solder volume value and the surface tension determines the shape of the joint.
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The relationship between the damage caused at different thermal cycles is very important. The whole of accelerated thermal cycle testing is based on the premise that damage at one cycle is representative of damage at a different cycle. In this paper, the relative damage caused by six thermal cycle profiles are predicted using Finite Element (FE) modelling and the results validated against experiments. Both creep strain and strain energy density were used as damage indicators and creep strain was found to correlate better with experiment. The validated FE model is then used to investigate the effect of altering each of the thermal profile parameters (ramp and swell times, hot and cold temperatures). The components used for testing are surface mount resistors - 1206, 0805 and 0603. The solders investigated are eutectic SnAgCu and eutectic SnAg.
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Solder joints are often the cause of failure in electronic devices, failing due to cyclic creep induced ductile fatigue. This paper will review the modelling methods available to predict the lifetime of SnPb and SnAgCu solder joints under thermo-mechanical cycling conditions such as power cycling, accelerated thermal cycling and isothermal testing, the methods do not apply to other damage mechanisms such as vibration or drop-testing. Analytical methods such as recommended by the IPC are covered, which are simple to use but limited in capability. Finite element modelling methods are reviewed, along with the necessary constitutive laws and fatigue laws for solder, these offer the most accurate predictions at the current time. Research on state-of-the-art damage mechanics methods is also presented, although these have not undergone enough experimental validation to be recommended at present
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The thermal stress in a Sn3.5Ag1Cu half-bump solder joint under a 3.82×108 A/m2 current stressing was analyzed using a coupled-field simulation. Substantial thermal stress accumulated around the Al-to-solder interface, especially in the Ni+(Ni,Cu)3Sn4 layer, where a maximal stress of 138 MPa was identified. The stress gradient in the Ni layer was about 1.67×1013 Pa/m, resulting in a stress migration force of 1.82×10-16 N, which is comparable to the electromigration force, 2.82×10-16 N. Dissolution of the Ni+(Ni,Cu)3Sn4 layer, void formation with cracks at the anode side, and extrusions at the cathode side were observed