High court determines that it cannot be assumed that hot chips are only eaten at lunch

In Strong v Woolworth Ltd (t/as Big W) (2012) 285 ALR 420 the appellant was injured when she fell at a shopping centre outside the respondent’s premises. The appellant was disabled, having had her right leg amputated above the knee and therefore walked with crutches. One of the crutches came into contact with a hot potato chip which was on the floor, causing the crutch to slip and the appellant to fall. The appellant sued in negligence, alleging that the respondent was in breach of its duty of care by failing to institute and maintain a cleaning system to detect spillages and foreign objects within its sidewalk sales area. The issue before the High Court was whether it could be established on the balance of probabilities as to when the hot chip had fallen onto the ground so as to prove causation in fact...

Determination of creep behaviour of concrete made by brick chips in Bangladesh

Concrete made of brick chips as coarse aggregate are extensively used in Bangladesh for construction of different types of structures from residential and commercial buildings to industrial complex. As creep is influenced among many factors including the constituents’ materials, relative humidity and temperature, it is essential to examine the creep behavior for Bangladeshi brick chips made concrete in Bangladeshi environment. In this work, investigation on the behaviour of creep in concrete of same grade made with brick chips collected from various locations under single stage loading was done. With these investigations, a formula was derived to get theoretical creep values for 24 MPa brick chips made concrete in Bangladeshi environment.

Latency, Power and Performance Trade-offs in Network-on-Chips by Link Microarchitecture Exploration

This paper presents a power, latency and throughput trade-off study on NoCs by varying microarchitectural (e.g. pipelining) and circuit level (e.g. frequency and voltage) parameters. We change pipelining depth, operating frequency and supply voltage for 3 example NoCs - 16 node 2D Torus, Tree network and Reduced 2D Torus. We use an in-house NoC exploration framework capable of topology generation and comparison using parameterized models of Routers and links developed in SystemC. The framework utilizes interconnect power and delay models from a low-level modelling tool called Intacte[1]1. We find that increased pipelining can actually reduce latency. We also find that there exists an optimal degree of pipelining which is the most energy efficient in terms of minimizing energy-delay product.

Fault-Tolerant Average Execution Time Optimization for General Purpose Multi-Processor System-on Chips

Fault-tolerance is due to the semiconductor technology development important, not only for safety-critical systems but also for general-purpose (non-safety critical) systems. However, instead of guaranteeing that deadlines always are met, it is for general-purpose systems important to minimize the average execution time (AET) while ensuring fault-tolerance. For a given job and a soft (transient) error probability, we define mathematical formulas for AET that includes bus communication overhead for both voting (active replication) and rollback-recovery with checkpointing (RRC). And, for a given multi-processor system-on-chip (MPSoC), we define integer linear programming (ILP) models that minimize AET including bus communication overhead when: (1) selecting the number of checkpoints when using RRC, (2) finding the number of processors and job-to-processor assignment when using voting, and (3) defining fault-tolerance scheme (voting or RRC) per job and defining its usage for each job. Experiments demonstrate significant savings in AET.

Microstructure and damping behaviour of consolidated magnesium chips

Chips produced by turning a commercial grade pure magnesium billet were consolidated by solid state recycling technique of cold compaction followed by hot extrusion. The cold compacted billets were extruded at four different temperatures: 250 degrees C, 300 degrees C, 350 degrees C and 400 degrees C. For the purpose of comparison, cast magnesium (pure) billets were extruded under similar conditions. Extruded products were characterized for damping properties. Damping capacity and dynamic modulus was measured as a function of time and temperature at a fixed frequency of 5 Hz 10 to 14% increase in damping capacity was observed in chip consolidated products compared to reference material. Microstructural changes after the temperature sweep tests were examined. Chip boundaries present in consolidated products were observed to suppress grain coarsening which otherwise was significant in reference material. The present work is significant from the viewpoint of recycling of machined chips and development of sustainable manufacturing processes. (C) 2012 Elsevier B.V. All rights reserved.

Microstructure and tensile properties of consolidated magnesium chips

In this study tensile properties of consolidated magnesium chips obtained from solid state re-cycling (SSR) has been examined and correlated with the microstructure. Chips machined from as-cast billet of pure magnesium were consolidated through SSR technique, comprising of compaction at ambient conditions followed by hot extrusion at four different temperatures viz., 250, 300, 350 and 400 degrees C. The extruded rods were characterized for microstructure and their room temperature tensile properties. Both ultimate tensile strength and 0.2% proof stress of these consolidated materials are higher by 15-35% compared to reference material (as cast and extruded). Further these materials obey Hall-Petch relation with respect to strength dependence of grain size. Strain hardening behavior, measured in terms of hardening exponent, hardening capacity and hardening rate was found to be distinctly different in chip consolidated material compared to reference material. Strength asymmetry, measured as a ratio of compressive proof stress to tensile proof stress was higher in chip consolidated material. (C) 2012 Elsevier B.V. All rights reserved.

Formation Mechanism Of Lamellar Chips During Machining Of Bulk Metallic Glass

The uniqThe unique lamellar chips formed in turning–machining of a Vit 1 bulk metallic glass (BMG) are found to be due to repeated shearband formation in the primary shear zone (PSZ). A coupled thermomechanical orthogonal cutting model, taking into account force, free volume and energy balance in the PSZ, is developed to quantitatively characterize lamellar chip formation. Its onset criterion is revealed through a linear perturbation analysis. Lamellar chip formation is understood as a self-sustained limit-cycle phenomenon: there is autonomous feedback in stress, free volume and temperature in the PSZ. The underlying mechanism is the symmetry breaking of free volume flow and source, rather than thermal instability. These results are fundamentally useful for machining BMGs and even for understanding the physical nature of inhomogeneous flow in BMGs.ue lamellar chips formed in turning–machining of a Vit 1 bulk metallic glass (BMG) are found to be due to repeated shearband.

Microfluidic effects of transporting signaling components in cell coculture chips

A theoretical model has been developed to investigate the microfluidic transport of the signaling chemicals in the cell coculture chips. Using an epidermal growth factor (EGF)-like growth factor as the sample chemical, the effects of velocities and channel geometry were studied for the continuous-flow microchannel bioreactors. It is found that different perfusion velocities must be applied in the parallel channels to facilitate the communication, i.e., transport of the signaling component, between the coculture channels. Such communication occurs in a unidirectional way because the signaling chemicals can only flow from the high velocity area to the low velocity area. Moreover, the effect of the transport of the signaling component between the coculture channels on the growth of the monolayer cells and the multicellular tumor spheroid (MTS) in the continuous-flow coculture environment were simulated using 3D models. The numerical results demonstrated that the concentration gradients will induce the heterogeneous growth of the cells and the MTSs, which should be taken into account in designing the continuous-flow perfusion bioreactor for the cell coculture research.

Fabrication of microfluidic optical waveguides on glass chips with femtosecond laser pulses

We describe the fabrication of microfluidic channel structures on the surface of a borosilicate glass slide by femtosecond laser direct writing for optical waveguide application. Liquid with a variable refractive index is fed into the microchannel, serving as the core of the waveguide. We demonstrate that either a multimode or a single-mode waveguide can be achieved by controlling the refractive index of the liquid. (C) 2007 Optical Society of America

Multiplex detection of mutations in clinical isolates of rifampin-resistant Mycobacterium tuberculosis by short oligonucleotide Ligation assay on DNA chips

A new approach, short-oligonucleotide-ligation assay on DNA chip (SOLAC), is developed to detect mutations in rifampin-resistant Mycobacterium tuberculosis. The method needs only four common probes to detect 15 mutational variants of the rpoB gene within 12 h. Fifty-five rifampin-resistant M. tuberculosis isolates were analyzed, resulting in 87.3% accuracy and 83.6% concordance relative to DNA sequencing.

A Novel CMOS Color Pixel for Vision Chips

This paper presents a novel CMOS color pixel with a 2D metal-grating structure for real-time vision chips. It consists of an N-well/P-substrate diode without salicide and 2D metal-grating layers on the diode. The periods of the 2D metal structure are controlled to realize color filtering. We implemented sixteen kinds of the pixels with the different metal-grating structures in a standard 0.18 mu m CMOS process. The measured results demonstrate that the N-well/P-substrate diode without salicide and with the 2D metal-grating structures can serve as the high speed RGB color active pixel sensor for real-time vision chips well.

Measurement of 3db Bandwidth of Laser Diode Chips

An accurate technique for measuring the frequency response of semiconductor laser diode chips is proposed and experimentally demonstrated. The effects of test jig parasites can be completely removed in the measurement by a new calibration method. In theory, the measuring range of the measurement system is only determined by the measuring range of the instruments network analyzer and photo detector. Diodes' bandwidth of 7.5GHz and 10GHz is measured. The results reveal that the method is feasible and comparing with other method, it is more precise andeasier to use.

Highly efficient separation of dsDNA fragments on glass chips by using an ultralow viscosity sieving matrix

A novel protocol has been established to separate dsDNA fragments with high efficiency on glass chips by using an ultralow viscosity sieving matrix with added glucose. Low-molecular-weight hydroxypropylmethylcellulose (HPMC), with a viscosity nearly equivalent to that of water, was used to electrophoretically separate fluorescent inter-calator-labeled double-stranded DNA (dsDNA) fragments on microfluidic glass chips. In comparison with conventional sieving protocols, low-molecular-weight HPMC as sieving matrix could result in reduced running cost and analysis time, in addition to a comparable separation efficiency of dsDNA fragments. In this paper, the addition of glucose was investigated to enhance the separation of DNA in the lowest viscosity polymer evaluated. The effect of staining dye and field strength were also evaluated. At an applied electric field strength of 200 V/cm, satisfactory resolution of the PBR322/HaeIII DNA marker could be achieved within 4 min by using 2% HPMC-5 with 6% glucose added. Coelectrophoresing PCR product along with phiX174/HaeIII DNA sizing marker was also demonstrated by using the ultralow viscosity HPMC-5 solution on a glass chip.