971 resultados para Binary Coded Decimal


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Applications that cannot tolerate the loss of accuracy that results from binary arithmetic demand hardware decimal arithmetic designs. Binary arithmetic in Quantum-dot cellular automata (QCA) technology has been extensively investigated in recent years. However, only limited attention has been paid to QCA decimal arithmetic. In this paper, two cost-efficient binary-coded decimal (BCD) adders are presented. One is based on the carry flow adder (CFA) using a conventional correction method. The other uses the carry look ahead (CLA) algorithm which is the first QCA CLA decimal adder proposed to date. Compared with previous designs, both decimal adders achieve better performance in terms of latency and overall cost. The proposed CFA-based BCD adder has the smallest area with the least number of cells. The proposed CLA-based BCD adder is the fastest with an increase in speed of over 60% when compared with the previous fastest decimal QCA adder. It also has the lowest overall cost with a reduction of over 90% when compared with the previous most cost-efficient design.

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Decimal multiplication is an integral part offinancial, commercial, and internet-based computations. The basic building block of a decimal multiplier is a single digit multiplier. It accepts two Binary Coded Decimal (BCD) inputs and gives a product in the range [0, 81] represented by two BCD digits. A novel design for single digit decimal multiplication that reduces the critical path delay and area is proposed in this research. Out of the possible 256 combinations for the 8-bit input, only hundred combinations are valid BCD inputs. In the hundred valid combinations only four combinations require 4 x 4 multiplication, combinations need x multiplication, and the remaining combinations use either x or x 3 multiplication. The proposed design makes use of this property. This design leads to more regular VLSI implementation, and does not require special registers for storing easy multiples. This is a fully parallel multiplier utilizing only combinational logic, and is extended to a Hex/Decimal multiplier that gives either a decimal output or a binary output. The accumulation ofpartial products generated using single digit multipliers is done by an array of multi-operand BCD adders for an (n-digit x n-digit) multiplication.

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Decimal multiplication is an integral part of financial, commercial, and internet-based computations. A novel design for single digit decimal multiplication that reduces the critical path delay and area for an iterative multiplier is proposed in this research. The partial products are generated using single digit multipliers, and are accumulated based on a novel RPS algorithm. This design uses n single digit multipliers for an n × n multiplication. The latency for the multiplication of two n-digit Binary Coded Decimal (BCD) operands is (n + 1) cycles and a new multiplication can begin every n cycle. The accumulation of final partial products and the first iteration of partial product generation for next set of inputs are done simultaneously. This iterative decimal multiplier offers low latency and high throughput, and can be extended for decimal floating-point multiplication.

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Multiplexers, as in the case of binary, are very useful building blocks in the development of quaternary systems. The use of quaternary multiplexer (QMUX) in the implementation of quaternary adder, subtractor and multiplier is described in this paper. Quaternary coded decimal (QCD) adder/subtractor and quaternary excess-3 adder/subtractor realization using QMUX are also proposed

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Quantization formats of four digital holographic codes (Lohmann,Lee, Burckhardt and Hsueh-Sawchuk) are evaluated. A quantitative assessment is made from errors in both the Fourier transform and image domains. In general, small errors in the Fourier amplitude or phase alone do not guarantee high image fidelity. From quantization considerations, the Lee hologram is shown to be the best choice for randomly phase coded objects. When phase coding is not feasible, the Lohmann hologram is preferable as it is easier to plot.

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Most of the commercial and financial data are stored in decimal fonn. Recently, support for decimal arithmetic has received increased attention due to the growing importance in financial analysis, banking, tax calculation, currency conversion, insurance, telephone billing and accounting. Performing decimal arithmetic with systems that do not support decimal computations may give a result with representation error, conversion error, and/or rounding error. In this world of precision, such errors are no more tolerable. The errors can be eliminated and better accuracy can be achieved if decimal computations are done using Decimal Floating Point (DFP) units. But the floating-point arithmetic units in today's general-purpose microprocessors are based on the binary number system, and the decimal computations are done using binary arithmetic. Only few common decimal numbers can be exactly represented in Binary Floating Point (BF P). ln many; cases, the law requires that results generated from financial calculations performed on a computer should exactly match with manual calculations. Currently many applications involving fractional decimal data perform decimal computations either in software or with a combination of software and hardware. The performance can be dramatically improved by complete hardware DFP units and this leads to the design of processors that include DF P hardware.VLSI implementations using same modular building blocks can decrease system design and manufacturing cost. A multiplexer realization is a natural choice from the viewpoint of cost and speed.This thesis focuses on the design and synthesis of efficient decimal MAC (Multiply ACeumulate) architecture for high speed decimal processors based on IEEE Standard for Floating-point Arithmetic (IEEE 754-2008). The research goal is to design and synthesize deeimal'MAC architectures to achieve higher performance.Efficient design methods and architectures are developed for a high performance DFP MAC unit as part of this research.

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Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

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We address the collective dynamics of a soliton train propagating in a medium described by the nonlinear Schrödinger equation. Our approach uses the reduction of train dynamics to the discrete complex Toda chain (CTC) model for the evolution of parameters for each train constituent: such a simplification allows one to carry out an approximate analysis of the dynamics of positions and phases of individual interacting pulses. Here, we employ the CTC model to the problem which has relevance to the field of fibre optics communications where each binary digit of transmitted information is encoded via the phase difference between the two adjacent solitons. Our goal is to elucidate different scenarios of the train distortions and the subsequent information garbling caused solely by the intersoliton interactions. First, we examine how the structure of a given phase pattern affects the initial stage of the train dynamics and explain the general mechanisms for the appearance of unstable collective soliton modes. Then we further discuss the nonlinear regime concentrating on the dependence of the Lax scattering matrix on the input phase distribution; this allows one to classify typical features of the train evolution and determine the distance where the soliton escapes from its slot. In both cases, we demonstrate deep mathematical analogies with the classical theory of crystal lattice dynamics.

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We address the collective dynamics of a soliton train propagating in a medium described by the nonlinear Schrödinger equation. Our approach uses the reduction of train dynamics to the discrete complex Toda chain (CTC) model for the evolution of parameters for each train constituent: such a simplification allows one to carry out an approximate analysis of the dynamics of positions and phases of individual interacting pulses. Here, we employ the CTC model to the problem which has relevance to the field of fibre optics communications where each binary digit of transmitted information is encoded via the phase difference between the two adjacent solitons. Our goal is to elucidate different scenarios of the train distortions and the subsequent information garbling caused solely by the intersoliton interactions. First, we examine how the structure of a given phase pattern affects the initial stage of the train dynamics and explain the general mechanisms for the appearance of unstable collective soliton modes. Then we further discuss the nonlinear regime concentrating on the dependence of the Lax scattering matrix on the input phase distribution; this allows one to classify typical features of the train evolution and determine the distance where the soliton escapes from its slot. In both cases, we demonstrate deep mathematical analogies with the classical theory of crystal lattice dynamics.

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Having flexible notions of the unit (e.g., 26 ones can be thought of as 2.6 tens, 1 ten 16 ones, 260 tenths, etc.) should be a major focus of elementary mathematics education. However, often these powerful notions are relegated to computations where the major emphasis is on "getting the right answer" thus procedural knowledge rather than conceptual knowledge becomes the primary focus. This paper reports on 22 high-performing students' reunitising processes ascertained from individual interviews on tasks requiring unitising, reunitising and regrouping; errors were categorised to depict particular thinking strategies. The results show that, even for high-performing students, regrouping is a cognitively complex task. This paper analyses this complexity and draws inferences for teaching.

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The dancing doctorate is an interrogative endeavour which can but nurture the art form and forge a beneficial dynamism between those who seek and those who assess the emerging knowledges of dance’. (Vincs, 2009) From 2006-2008 three dance academics from Perth, Brisbane and Melbourne undertook a research project entitled Dancing between Diversity and Consistency: Refining Assessment in Postgraduate Degrees in Dance, funded by the ALTC Priority Projects Program. Although assessment rather than supervision was the primary focus of this research, interviews with 40 examiner/supervisors, 7 research deans and 32 candidates across Australia and across the creative arts, primarily in dance, provide an insight into what might be considered best practice in preparing students for higher research degrees, and the challenges that embodied and experiential knowledges present for supervision. The study also gained the industry perspectives of dance professionals in a series of national forums in 5 cities, based around the value of higher degrees in dance. The qualitative data gathered from these two primary sources was coded and analysed using the NVivo system. Further perspectives were drawn from international consultant and dance researcher Susan Melrose, as well as recent publications in the field. Dance is a young addition to academia and consequently there tends to be a close liaison between the academy and the industry, with a relational fluidity that is both beneficial and problematic. This partially explains why dance research higher degrees are predominantly practice-led (or multi-modal, referring to those theses where practice comprises the substantial examinable component). As a physical, embodied art form, dance engages with the contested territory of legitimising alternative forms of knowledge that do not sit comfortably with accepted norms of research. In supporting research students engaged with dance practice, supervisors traverse the tricky terrain of balancing university academic requirements with studies that are emergent, not only in the practice and attendant theory but in their methodologies and open-ended outcomes; and in an art form in which originality and new knowledge also arises from collaborative creative processes. Formal supervisor accreditation through training is now mandatory in most Australian universities, but it tends to be generic and not address supervisory specificity. This paper offers the kind of alternative proposed by Edwards (2002) that improving postgraduate supervision will be effective if supervisors are empowered to generate their own standards and share best practice; in this case, in ways appropriate to the needs of their discipline and alternative modes of thesis presentation. In order to frame the qualities and processes conducive to this goal, this paper will draw on both the experiences of interviewees and on philosophical premises which underpin the research findings of our study. These include the ongoing challenge of dissolving the binary oppositions of theory and practice, especially in creative arts practice where theory resides in and emerges from the doing as much as in articulating reflection about the doing through what Melrose (2003) terms ‘mixed mode disciplinary practices’. In guiding practitioners through research higher degrees, how do supervisors deal with not only different forms of knowledge but indeed differing modes of knowledge? How can they navigate tensions that occur between the ‘incompatible competencies’ (Candlin, 2000) of the ‘spectating’ academic experts with their ‘irrepressible drive ... to inscribe, interpret, and hence to practise temporal closure’, and practitioner experts who create emergent works of ‘residual unfinishedness’ (Melrose 2006) which are not only embodied but ephemeral, as in the case of live performance?