4H-SiC基底Al_2O_3/SiO_2双层减反射膜的设计和制备

在4H-SiC基底上设计并制备了Al2O3/SiO2紫外双层减反射膜,通过扫描电镜(SEM)和实测反射率谱来验证理论设计的正确性。利用编程计算得到Al2O3和SiO2的最优物理膜厚分别为42.0nm和96.1nm以及参考波长λ=280nm处最小反射率为0.09%。由误差分析可知,实际镀膜时保持双层膜厚度之和与理论值一致有利于降低膜系反射率。实验中应当准确控制SiO2折射率并使Al2O3折射率接近1.715。用电子束蒸发法在4H-SiC基底上淀积Al2O3/SiO2双层膜,厚度分别为42nm和96nm。SEM截面图表明淀积的薄膜和基底间具有较强的附着力。实测反射率极小值为0.33%,对应λ=276nm,与理论结果吻合较好。与传统SiO2单层膜相比,Al2O3/SiO2双层膜具有反射率小,波长选择性好等优点,从而论证了其在4H-SiC基紫外光电器件减反射膜上具有较好的应用前景。

Al2O3/SiO2 films prepared by electron-beam evaporation as UV antireflection coatings on 4H-SiC

Al2O3/SiO2 films have been deposited as UV antireflection coatings on 4H-SiC by electron-beam evaporation and characterized by reflection spectrum, scanning electron microscopy (SEM) and X-ray photoelectron spectroscopy (XPS). The reflectance of the Al2O3/SiO2 films is 0.33% and 10 times lower than that of a thermally grown SiO2 single layer at 276 nm. The films are amorphous in microstructure and characterize good adhesion to 4H-SiC substrate. XPS results indicate an abrupt interface between evaporated SiO2 and 4H-SiC substrate free of Si-suboxides. These results make the possibility for 4H-SiC based high performance UV optoelectronic devices with Al2O3/SiO2 films as antireflection coatings. (C) 2007 Elsevier B.V. All rights reserved.

Morphological defects and uniformity issues of 4H-SiC homoepitaxial layers grown on off-oriented (0001)Si faces

The morphological defects and uniformity of 4H-SiC epilayers grown by hot wall CVD at 1500 degrees C on off-oriented (0001) Si faces are characterized by atomic force microscope, Nomarski optical microscopy, and Micro-Raman spectroscopy. Typical morphological defects including triangular defects, wavy steps, round pits, and groove defects are observed in mirror-like SiC epilayers. The preparation of the substrate surface is necessary for the growth of high-quality 4H-SiC epitaxial layers with low-surface defect density under optimized growth conditions. (c) 2006 Elsevier Ltd. All rights reserved.

Homoepitaxial growth of 4H-SiC multi-epilayers and its application to UV detection

Homoepitaxial growth of 4H-SiC p(+)/pi/n(-) multi-epilayer on n(+) substrate and in-situ doping of p(+) and pi-epilayer have been achieved in the LPCVD system with SiH4+C2H4+H-2. The surface morphologies, homogeneities and doping concentrations of the n(-)-single-epilayers and the p(+)/pi/n(-) multi-epilayers were investigated by Nomarski, AFM, Raman and SIMS, respectively. AFM and Raman investigation showed that both single- and,multi-epilayers have good surface morphologies and homogeneities, and the SIMS analyses indicated the boron concentration in p+ layer was at least 100 times higher than that in pi layer. The UV photodetectors fabricated on 4H-SiC p(+)/pi/n(-) multi-epilayers showed low dark current and high detectivity in the UV range.

Morphological defects and uniformity issues of 4H-SiC homoepitaxial layers grown on off-oriented (0001)Si faces

The morphological defects and uniformity of 4H-SiC epilayers grown by hot wall CVD at 1500 degrees C on off-oriented (0001) Si faces are characterized by atomic force microscope, Nomarski optical microscopy, and Micro-Raman spectroscopy. Typical morphological defects including triangular defects, wavy steps, round pits, and groove defects are observed in mirror-like SiC epilayers. The preparation of the substrate surface is necessary for the growth of high-quality 4H-SiC epitaxial layers with low-surface defect density under optimized growth conditions. (c) 2006 Elsevier Ltd. All rights reserved.

Evaluation of termination techniques for 4H-SiC PiN diodes and trench JFETs

An investigation concerning suitable termination techniques for 4H-SiC trench JFETs is presented. Field plates, p+ floating rings and junction termination extension techniques are used to terminate 1.2kV class PiN diodes. The fabricated PiN diodes evaluated here have a similar design to trench JFETs. Therefore, the conclusions for PiN diodes can be applied to JFET structures as well. Numerical simulations are also used to illustrate the effect of the terminations on the diodes' blocking mode behaviour.

Switching performance of epitaxially grown normally-off 4H-SiC JFET

Static and dynamic behavior of the epitaxially grown dual gate trench 4H-SiC junction field effect transistor (JFET) is investigated. Typical on-state resistance Ron was 6-10mΩcm2 at VGS = 2.5V and the breakdown voltage between the range of 1.5-1.8kV was realized at VGS = -5V for normally-off like JFETs. It was found that the turn-on energy delivers the biggest part of the switching losses. The dependence of switching losses from gate resistor is nearly linear, suggesting that changing the gate resistor, a way similar to Si-IGBT technology, can easily control di/dt and dv/dt. Turn-on losses at 200°C are lower compared to those at 25°C, which indicates the influence of the high internal p-type gate layer resistance. Inductive switching numerical analysis suggested the strong influence of channel doping conditions on the turn-on switching performance. The fast switching normally-off JFET devices require heavily doped narrow JFET channel design. © (2009) Trans Tech Publications, Switzerland.