1000 resultados para silicon


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We have demonstrated a simple, scalable and inexpensive method based on microwave plasma for synthesizing 5 to 10 g/h of nanomaterials. Luminescent nano silicon particles were synthesized by homogenous nucleation of silicon vapour produced by the radial injection of silicon tetrachloride vapour and nano titanium nitride was synthesized by using liquid titanium tetrachloride as the precursor. The synthesized nano silicon and titanium nitride powders were characterized by XRD, XPS, TEM, SEM and BET. The characterization techniques indicated that the synthesized powders were indeed crystalline nanomaterials.

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We report on the threshold voltage modeling of ultra-thin (1 nm-5 nm) silicon body double-gate (DG) MOSFETs using self-consistent Poisson-Schrodinger solver (SCHRED). We define the threshold voltage (V th) of symmetric DG MOSFETs as the gate voltage at which the center potential (Φ c) saturates to Φ c (s a t), and analyze the effects of oxide thickness (t ox) and substrate doping (N A) variations on V th. The validity of this definition is demonstrated by comparing the results with the charge transition (from weak to strong inversion) based model using SCHRED simulations. In addition, it is also shown that the proposed V t h definition, electrically corresponds to a condition where the inversion layer capacitance (C i n v) is equal to the oxide capacitance (C o x) across a wide-range of substrate doping densities. A capacitance based analytical model based on the criteria C i n v C o x is proposed to compute Φ c (s a t), while accounting for band-gap widening. This is validated through comparisons with the Poisson-Schrodinger solution. Further, we show that at the threshold voltage condition, the electron distribution (n(x)) along the depth (x) of the silicon film makes a transition from a strong single peak at the center of the silicon film to the onset of a symmetric double-peak away from the center of the silicon film. © 2012 American Institute of Physics.

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Silicon nanowires (NWs) have been grown in the vapor phase for the first time with bismuth (Bi) as a catalyst using the electron beam evaporation method at a low substrate temperature of 280 degrees C. The grown Si nanowires were randomly oriented on the substrate with an average length of 900 nm for a deposition time of 15 min. Bi faceted nanoparticles (crowned) at the end of the grown Si nanowires have been observed and attributed to the Vapor-Liquid-Solid (VLS) growth mechanism. Transmission Electron Microscopy analysis on the nanowires revealed their single crystalline nature and interestingly bismuth particles were observed in Si nanowires. The obtained results have shown a new window for Si nanowires growth with bismuth as a catalyst. (C) 2012 Elsevier B.V. All rights reserved.

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DC reactive magnetron sputtering technique was employed for deposition of titanium dioxide (TiO2) films. The films were formed on Corning glass and p-Si (100) substrates by sputtering of titanium target in an oxygen partial pressure of 6x10-2 Pa and at different substrate temperatures in the range 303 673 K. The films formed at 303 K were X-ray amorphous whereas those deposited at substrate temperatures?=?473 K were transformed into polycrystalline nature with anatase phase of TiO2. Fourier transform infrared spectroscopic studies confirmed the presence of characteristic bonding configuration of TiO2. The surface morphology of the films was significantly influenced by the substrate temperature. MOS capacitor with Al/TiO2/p-Si sandwich structure was fabricated and performed currentvoltage and capacitancevoltage characteristics. At an applied gate voltage of 1.5 V, the leakage current density of the device decreased from 1.8?x?10-6 to 5.4?x?10-8 A/cm2 with the increase of substrate temperature from 303 to 673 K. The electrical conduction in the MOS structure was more predominant with Schottky emission and Fowler-Nordheim conduction. The dielectric constant (at 1 MHz) of the films increased from 6 to 20 with increase of substrate temperature. The optical band gap of the films increased from 3.50 to 3.56 eV and refractive index from 2.20 to 2.37 with the increase of substrate temperature from 303 to 673 K. Copyright (c) 2012 John Wiley & Sons, Ltd.

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We investigate the relaxation dynamics of photogenerated carriers in silicon nanowires consisting of a crystalline core and a surrounding amorphous shell, using femtosecond time-resolved differential reflectivity and transmission spectroscopy at 3.15 eV and 1.57 eV photon energies. The complex behaviour of the differential transmission and reflectivity transients is the mixed contributions from the crystalline core and the amorphous silicon on the nanowire surface and the substrate where competing effects of state-filling and photoinduced absorption govern the carrier dynamics. Faster relaxation rates are observed on increasing the photogenerated carrier density. Independent experimental results on crystalline silicon-on-sapphire (SOS) help us in separating the contributions from the carrier dynamics in crystalline core and the amorphous regions in the nanowire samples. Further, single-beam z-scan nonlinear transmission experiments at 1.57 eV in both open- and close-aperture configurations yield two-photon absorption coefficient beta (similar to 3 cm/GW) and nonlinear refraction coefficient gamma (-2.5 x 10 (-aEuro parts per thousand 4) cm(2)/GW).

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We report the fabrication of nanoholes on silicon surface by exploiting the solubility of silicon in gallium by local droplet etching. Nanometer-sized gallium droplets yield nanoholes when annealed in ultra-high vacuum at moderate temperatures (similar to 500 degrees C) without affecting the other regions. High vacuum and moderate annealing temperatures are key parameters to obtain well-defined nanoholes with diameter comparable to that of Ga droplets. Self-assembly of Ga droplet leads to a nanohole density of 4-8 x 10(10)/cm(2).

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A two step silicon surface texturing, consisting of potassium hydroxide (KOH) etching followed by tetra-methyl ammonium hydroxide etching is presented. This combined texturing results in 13.8% reflectivity at 600 nm compared to 16.1% reflectivity for KOH etching due to the modification of microstructure of etched pyramids. This combined etching also results in significantly lower flat-band voltage (V-FB) (-0.19V compared to -1.3 V) and interface trap density (D-it) (2.13 x 10(12) cm(-2) eV(-1) compared to 3.2 x 10(12) cm(-2) eV(-1)). (C) 2013 American Institute of Physics. http://dx.doi.org/10.1063/1.4776733]

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In this paper, we address a physics based closed form model for the energy band gap (E-g) and the transport electron effective mass in relaxed and strained 100] and 110] oriented rectangular Silicon Nanowire (SiNW). Our proposed analytical model along 100] and 110] directions are based on the k.p formalism of the conduction band energy dispersion relation through an appropriate rotation of the Hamiltonian of the electrons in the bulk crystal along 001] direction followed by the inclusion of a 4 x 4 Luttinger Hamiltonian for the description of the valance band structure. Using this, we demonstrate the variation in Eg and the transport electron effective mass as function of the cross-sectional dimensions in a relaxed 100] and 110] oriented SiNW. The behaviour of these two parameters in 100] oriented SiNW has further been studied with the inclusion of a uniaxial strain along the transport direction and a biaxial strain, which is assumed to be decomposed from a hydrostatic deformation along 001] with the former one. In addition, the energy band gap and the effective mass of a strained 110] oriented SiNW has also been formulated. Using this, we compare our analytical model with that of the extracted data using the nearest neighbour empirical tight binding sp(3)d(5)s* method based simulations and has been found to agree well over a wide range of device dimensions and applied strain. (C) 2012 Elsevier Ltd. All rights reserved.

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Silicon nanowires were grown on Si substrates by electron beam evaporation (EBE) was demonstrated using Indium as an alternate catalyst to gold. We have studied the effect of substrate (growth) temperature, deposition time on the growth of nanowires. It was observed that a narrow temperature window from 300 degrees C to 400 degrees C for the nanowires growth. At growth temperature >= 400 degrees C suppression of nanowires growth was observed due to evaporation of catalyst particle. It is also observed that higher deposition times also leading to the absence of nanowire growth as well as uncatalyzed deposition on the nanowires side walls due to limited surface diffusion of ad atoms and catalyst evaporation.

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Fourier Transform Infrared (FTIR) spectroscopic analysis has been carried out on the hydrogenated amorphous silicon (a-Si:H) thin films deposited by DC, pulsed DC (PDC) and RF sputtering process to get insight regarding the total hydrogen concentration (C-H) in the films, configuration of hydrogen bonding, density of the films (decided by the vacancy and void incorporation) and the microstructure factor (R*) which varies with the type of sputtering carried out at the same processing conditions. The hydrogen incorporation is found to be more in RF sputter deposited films as compared to PDC and DC sputter deposited films. All the films were broadly divided into two regions namely vacancy dominated and void dominated regions. At low hydrogen dilutions the films are vacancy dominated and at high hydrogen dilutions they are void dominated. This demarcation is at C-H = 23 at.% H for RF, C-H = 18 at.% H for PDC and C-H = 14 at.% H for DC sputter deposited films. The microstructure structure factor R* is found to be as low as 0.029 for DC sputter deposited films at low C-H. For a given C-H, DC sputter deposited films have low R* as compared to PDC and RF sputter deposited films. Signature of dihydride incorporation is found to be more in DC sputter deposited films at low C-H.

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In this paper, we analyze the combined effects of size quantization and device temperature variations (T = 50K to 400 K) on the intrinsic carrier concentration (n(i)), electron concentration (n) and thereby on the threshold voltage (V-th) for thin silicon film (t(si) = 1 nm to 10 nm) based fully-depleted Double-Gate Silicon-on-Insulator MOSFETs. The threshold voltage (V-th) is defined as the gate voltage (V-g) at which the potential at the center of the channel (Phi(c)) begins to saturate (Phi(c) = Phi(c(sat))). It is shown that in the strong quantum confinement regime (t(si) <= 3nm), the effects of size quantization far over-ride the effects of temperature variations on the total change in band-gap (Delta E-g(eff)), intrinsic carrier concentration (n(i)), electron concentration (n), Phi(c(sat)) and the threshold voltage (V-th). On the other hand, for t(si) >= 4 nm, it is shown that size quantization effects recede with increasing t(si), while the effects of temperature variations become increasingly significant. Through detailed analysis, a physical model for the threshold voltage is presented both for the undoped and doped cases valid over a wide-range of device temperatures, silicon film thicknesses and substrate doping densities. Both in the undoped and doped cases, it is shown that the threshold voltage strongly depends on the channel charge density and that it is independent of incomplete ionization effects, at lower device temperatures. The results are compared with the published work available in literature, and it is shown that the present approach incorporates quantization and temperature effects over the entire temperature range. We also present an analytical model for V-th as a function of device temperature (T). (C) 2013 AIP Publishing LLC.

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Transfer free processes using Cu films greatly simplify the fabrication of reliable suspended graphene devices. In this paper, the authors report on the use of electrodeposited Cu films on Si for transfer free fabrication of suspended graphene devices. The quality of graphene layers on optimized electrodeposited Cu and Cu foil are found to be the same. By selectively etching the underlying Cu, the authors have realized by a transfer free process metal contacted, suspended graphene beams up to 50 mu m in length directly on Si. The suspended graphene beams do not show any increase in defect levels over the as grown state indicating the efficiency of the transfer free process. Measured room temperature electronic mobilities of up to 5200 cm(2)/V.s show that this simpler and CMOS compatible route has the potential to replace the foil based route for such suspended nano and micro electromechanical device arrays. (C) 2014 American Vacuum Society.

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We present the study of low-frequency noise, or 1/f noise, in degenerately doped Si: P and Ge: P delta-layers at low temperatures. For the Si: P d-layers we find that the noise is several orders of magnitude lower than that of bulk Si: P systems in the metallic regime and is one of the lowest values reported for doped semiconductors. Ge: P d-layers as a function of perpendicular magnetic field, shows a factor of two reduction in noise magnitude at the scale of B-phi, where B-phi is phase breaking field. We show that this is a characteristic feature of universal conductance fluctuations.

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Vacancy, void incorporation and Si-H-x configuration in hydrogenated amorphous silicon (a-Si:H) thin films was studied. Films were grown by Direct Current (DC), pulsed DC and Radio Frequency (RF) magnetron sputtering. Fourier Transform Infrared (FTIR) spectroscopic analysis has been carried out on the films and found that, the a-Si: H films grown by DC magnetron sputtering are of good quality compared to pulsed DC and RF deposited films. The effect of Substrate temperature (T-S) on the total hydrogen concentration (C-H), configuration of hydrogen bonding, density (decided by the vacancy and void incorporation) and the microstructure factor (R*) was studied. T-S is found to be an active parameter in affecting the above said properties of the films. The films contain both vacancies and voids. At low hydrogen dilutions the films are vacancy dominated and at high hydrogen dilutions they are void dominated. It is found that T-S favors monohydride (Si-H) bonding at the cost of dihydride (Si-H-2) bonding. This dividing line is at C-H=14 at.% H for DC sputter deposited films. The microstructure structure factor R* is found to be zero for as deposited DC films at T-S=773K. The threshold C-H for void dominated region is found to be C-H=23 at.% H for RF, C-H=18 at.% H for PDC and C-H similar to 14 at.%H for DC sputter deposited films.