Analysis and compensation of power amplifier nonlinearity in MIMO transmit diversity systems

The nonlinearity of high-power amplifiers (HPAs) has a crucial effect on the performance of multiple-input-multiple-output (MIMO) systems. In this paper, we investigate the performance of MIMO orthogonal space-time block coding (OSTBC) systems in the presence of nonlinear HPAs. Specifically, we propose a constellation-based compensation method for HPA nonlinearity in the case with knowledge of the HPA parameters at the transmitter and receiver, where the constellation and decision regions of the distorted transmitted signal are derived in advance. Furthermore, in the scenario without knowledge of the HPA parameters, a sequential Monte Carlo (SMC)-based compensation method for the HPA nonlinearity is proposed, which first estimates the channel-gain matrix by means of the SMC method and then uses the SMC-based algorithm to detect the desired signal. The performance of the MIMO-OSTBC system under study is evaluated in terms of average symbol error probability (SEP), total degradation (TD) and system capacity, in uncorrelated Nakagami-m fading channels. Numerical and simulation results are provided and show the effects on performance of several system parameters, such as the parameters of the HPA model, output back-off (OBO) of nonlinear HPA, numbers of transmit and receive antennas, modulation order of quadrature amplitude modulation (QAM), and number of SMC samples. In particular, it is shown that the constellation-based compensation method can efficiently mitigate the effect of HPA nonlinearity with low complexity and that the SMC-based detection scheme is efficient to compensate for HPA nonlinearity in the case without knowledge of the HPA parameters.

On the effect of power amplifier nonlinearity on MIMO transmit diversity systems

Nonlinearity of high-power amplifier (HPA) plays a crucial role in the performance of multiple-input multiple-output (MIMO) systems. In this paper, we investigate the performance of MIMO orthogonal space-time block coding (STBC) systems in the presence of nonlinear HPA. Specifically, we assess the impact of HPA nonlinearity on the average symbol error probability (SEP), total degradation (TD), and system capacity of orthogonal STBC in uncorrelated Nakagami-m fading channels. Numerical results are provided and show the effects of several system parameters, such as the output back-off (OBO) of nonlinear HPA, numbers of transmit and receive antennas, and modulation order of quadrature amplitude modulation (QAM), on performance.

A novel single-phase ZCS-PWM high-power-factor boost rectifier

This paper presents a novel single-phase high-power-factor (HPF) pulsewidth-modulated (PWM) boost rectifier featuring soft commutation of the active switches at zero current (ZC), It incorporates the most desirable properties of conventional PWM and soft-switching resonant techniques.The input current shaping is achieved with average current mode control and continuous inductor current mode.This new PWM converter provides ZC turn on and turn off of the active switches, and it is suitable for high-power applications employing insulated gate bipolar transistors (IGBT's),The principle of operation, the theoretical analysis, a design example, and experimental results from a laboratory prototype rated at 1600 W with 400-Vdc output voltage are presented. The measured efficiency and the power factor were 96.2% and 0.99%, respectively, with an input current total harmonic distortion (THD) equal to 3.94%, for an input voltage with THD equal to 3.8%, at rated load.

Variable-Structure Control Design of Switched Systems With an Application to a DC-DC Power Converter

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Robust fault diagnosis in power distribution systems based on fuzzy ARTMAP neural network-aided evidence theory

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Power Factor Correction Boost Converter Based on the Three-State Switching Cell

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

A low-voltage low-power analog memory cell with built-in 4-quadrant multiplication

An accurate switched-current (SI) memory cell and suitable for low-voltage low-power (LVLP) applications is proposed. Information is memorized as the gate-voltage of the input transistor, in a tunable gain-boosting triode-transconductor. Additionally, four-quadrant multiplication between the input voltage to the transconductor regulation-amplifier (X-operand) and the stored voltage (Y-operand) is provided. A simplified 2 x 2-memory array was prototyped according to a standard 0.8 mum n-well CMOS process and 1.8-V supply. Measured current-reproduction error is less than 0.26% for 0.25 muA less than or equal to I-SAMPLE less than or equal to 0.75 muA. Standby consumption is 6.75 muW per cell @I-SAMPLE = 0.75 muA. At room temperature, leakage-rate is 1.56 nA/ms. Four-quadrant multiplier (4QM) full-scale operands are 2x(max) = 320 mV(pp) and 2y(max). = 448 mV(pp), yielding a maximum output swing of 0.9 muA(pp). 4QM worst-case nonlinearity is 7.9%.

A CMOS/SOI single-input PWM discriminator for low-voltage body-implanted applications

A CMOS/SOI circuit to decode Pulse-Width Modulation (PWM) signals is presented as part of a body-implanted neurostimulator for visual prosthesis. Since encoded data is the sole input to the circuit, the decoding technique is based on a novel double-integration concept and does not require low-pass filtering. Non-overlapping control phases are internally derived from the incoming pulses and a fast-settling comparator ensures good discrimination accuracy in the megahertz range. The circuit was integrated on a 2 mum single-metal thin-film CMOS/SOI fabrication process and has an effective area of 2 mm(2). Measured resolution of encoding parameter a is better than 10% at 6 MHz and V-DD = 3.3 V. Idle-mode consumption is 340 LW. Pulses of frequencies up to 15 MHz and alpha = 10% can be discriminated for 2.3 V less than or equal to V-DD less than or equal to 3.3 V. Such an excellent immunity to V-DD deviations meets a design specification with respect to inherent coupling losses on transmitting data and power by means of a transcutaneous link.

Single-phase high power factor hybrid rectifier suitable for high-power applications

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Analysis and design of constant-frequency peak-current-controlled high-power-factor boost rectifier with slope compensation

This paper presents the analysis and the design of a peak-current-controlled high-power-factor boost rectifier, with slope compensation, operating at constant frequency. The input current shaping is achieved, with continuous inductor current mode, with no multiplier to generate a current reference. The resulting overall circuitry is very simple, in comparison with the average-current-controlled boost rectifier. Experimental results are presented, taken from a laboratory prototype rated at 370 W and operating at 67 kHz. The measured power factor was 0.99, with a input current THD equal to 5.6%, for an input voltage THD equal to 2.26%.

Novel high-power-factor isolated electronic ballast for multiple tubular fluorescent lamps

This paper presents a novel isolated electronic ballast for multiple fluorescent lamps, featuring high power-factor, and high efficiency. Two stages compose this new electronic ballast, namely, a new voltage step-down isolated Sepic rectifier, and a classical resonant Half-Bridge inverter. The new isolated Sepic rectifier is obtained from a Zero-Current-Switching (ZCS) Pulse-Width-Modulated (PWM) soft-commutation cell. The average-current control technique is used in this preregulator stage in order to provide low phase displacement and low Total-Harmonic-Distortion (THD) at input current, resulting in high power-factor, and attending properly IEC 61000-3-2 standards. The resonant Half-Bridge inverter performs Zero-Voltage-Switching (ZVS), providing conditions for the obtaining of overall high efficiency. It is developed a design example for the new isolated electronic ballast rated at 200W output power, 220Vrms input voltage, 115Vdc dc link voltage, with rectifier and inverter stages operating at 50kHz. Finally, experimental results are presented in order to verify the developed analysis. The THD at input current is equal to 5.25%, for an input voltage THD equal to 1.63%, and the measured overall efficiency is about 88.25%, at rated load.

A novel programmable PFC based hybrid rectifier for ultra clean power application

A novel hybrid high power rectifier capable to achieve unity power factor is proposed in this paper. Single-phase SEPIC rectifiers are associated in parallel with each leg of three-phase 6-pulse diode rectifier resulting in a programmable input current waveform structure. In this paper it is described the principles of operation of the proposed converter with detailed simulation and experimental results. For a total harmonic distortion of the input line current (THDI) less than 2% the rated power of the SEPIC rectifiers is 33%. Therefore, power rating of the SEPIC parallel converters is a fraction of the output power, on the range of 20% to 33% of the nominal output power, making the proposed solution economically viable for high power installations, with fast pay back of the investment. Moreover, retrofits to existing installations are also possible with this proposed topology, since the parallel path can be easily controlled by integration with the already existing de-link. Experimental results are presented for a 3 kW implemented prototype, in order to verify the developed analysis.

An AC voltage regulator with high-power-factor, and control using a FPGA device

This paper presents the analysis, design, simulation, and experimental results for a high frequency high Power-Factor (PF) AC (Alternate Current) voltage regulator, using a Sepic converter as power stage. The control technique employed to impose a sinusoidal input current waveform, with low Total Harmonic Distortion (THD), is the sinusoidal variable hysteresis control. The control technique was implemented in a FPGA (Field Programmable Gate Array) device, using a Hardware Description Language (VHDL). Through the use of the proposed control technique, the AC voltage regulator performs active power-factor correction, and low THD in the input current, for linear and non-linear loads, satisfying the requirements of the EEC61000-3-2 standards. Experimental results from an example prototype, designed for 300W of nominal output power, 50kHz (switching frequency), and 127Vrms of nominal input and output voltages, are presented in order to validate the proposed AC regulator. © 2005 IEEE.

Frequency-adjustable positive sequence detector for power conditioning applications

This paper proposes a novel and simple positive sequence detector (PSD), which is inherently self-adjustable to fundamental frequency deviations by means of a software-based PLL (Phase Locked Loop). Since the proposed positive sequence detector is not based on Fortescue's classical decomposition and no special input filtering is needed, its dynamic response may be as fast as one fundamental cycle. The digital PLL ensures that the positive sequence components can be calculated even under distorted waveform conditions and fundamental frequency deviations. For the purpose of validating the proposed models, the positive sequence detector has been implemented in a PC-based Power Quality Monitor and experimental results illustrate its good performance. The PSD algorithm has also been evaluated in the control loop of a Series Active Filter and simulation results demonstrate its effectiveness in a closed-loop system. Moreover, considering single-phase applications, this paper also proposes a general single-phase PLL and a Fundamental Wave Detector (FWD) immune to frequency variations and waveform distortions. © 2005 IEEE.

A neural approach to evaluate the effect of lightning in power transformers

This paper proposes the application of computational intelligence techniques to assist complex problems concerning lightning in transformers. In order to estimate the currents related to lightning in a transformer, a neural tool is presented. ATP has generated the training vectors. The input variables used in Artificial Neural Networks (ANN) were the wave front time, the wave tail time, the voltage variation rate and the output variable is the maximum current in the secondary of the transformer. These parameters can define the behavior and severity of lightning. Based on these concepts and from the results obtained, it can be verified that the overvoltages at the secondary of transformer are also affected by the discharge waveform in a similar way to the primary side. By using the tool developed, the high voltage process in the distribution transformers can be mapped and estimated with more precision aiding the transformer project process, minimizing empirics and evaluation errors, and contributing to minimize the failure rate of transformers. © 2009 The Berkeley Electronic Press. All rights reserved.