968 resultados para I-V curve tracing
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Thesis (doctoral)--Konigliche Ludwig-Maximilians-Universitat zu Munchen.
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Cover-title.
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Mode of access: Internet.
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Record romanized.
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In Cyrillic characters.
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Dissertação de Mestrado apresentada ao Instituto Superior de Psicologia Aplicada para obtenção de grau de Mestre na especialidade de Psicologia Clínica.
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The joint process between tapes of coated conductors is a critical issue for the most of the applications of high temperature superconductors (HTS). Using different fabrication techniques joints of YBCO coated superconductors were prepared and characterized through electrical measurements. For soldering material low melting point eutectic alloys, such as In-Sn (m.p. 116 degrees C) and Sn-Pb (m. p. 189 degrees C) were selected to prepare lap joints with effective length between 1 to 20 cm. The splice resistance and the critical current of the joints were evaluated by I-V curve measurements with the maximum current strength above the critical current, in order to evaluate the degree of degradation for each joint method. Pressed lap joints prepared with tapes without external reinforcement presented low resistance lap joint nevertheless some critical current degradation occurs when strong pressing is applied. When mechanical pressure is applied during the soldering process we can reduce the thickness of the solder alloy and a residual resistance arises from contributions of high resistivity matrix and external reinforcement. The lap joints for reinforced tape were prepared using two methods: the first, using ""as-supplied"" tape and the other after reinforcement-removal; in the latter case, the tapes were resoldered using Sn-Pb alloy. The results using several joint geometries, distinct surface preparation processes and different soldering materials are presented and analysed. The solder alloy with lower melting point and the longer joint length presented the smallest joint resistance.
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This paper focuses on a novel formalization for assessing the five parameter modeling of a photovoltaic cell. An optimization procedure is used as a feasibility problem to find the parameters tuned at the open circuit, maximum power, and short circuit points in order to assess the data needed for plotting the I-V curve. A comparison with experimental results is presented for two monocrystalline PV modules.
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This paper focuses on a novel formalization for assessing the five parameter modeling of a photovoltaic cell. An optimization procedure is used as a feasibility problem to find the parameters tuned at the open circuit, maximum power, and short circuit points in order to assess the data needed for plotting the I-V curve. A comparison with experimental results is presented for two monocrystalline PV modules.
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The use of a solar photovoltaic (PV) panel simulator can be a valued tool for the design and evaluation of the several components of a photovoltaic system. This simulator is based on power electronic converter controlled in such a way that will behave as a PV panel. Thus, in this paper a PV panel simulator based on a two quadrant DC/DC power converter is proposed. This topology will allow to achieve fast responses, like suddenly changes in the irradiation and temperature. To control the power converter it will be used a fast and robust sliding mode controller. Therefore, with the proposed system I-V curve simulation of a PV panel is obtained. Experimental results from a laboratory prototype are presented in order to confirm the theoretical operation.
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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
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Continuation methods have been long used in P-V curve tracing due to their efficiency in the resolution of ill-conditioned cases, with close to singular Jacobian matrices, such as the maximum loading point of power systems. Several parameterization techniques have been proposed to avoid matrix singularity and successfully solve those cases. This paper presents a simple geometric parameterization technique to overcome the singularity of the Jacobian matrix by the addition of a line equations located at the plane determined by a bus voltage magnitude and the loading factor. This technique enlarges the set of voltage variables that can be used to whole P-V curve tracing, without ill-conditioning problems and no need of parameter changes. Simulation results, obtained for large realistic Brazilian and American power systems, show that the robustness and efficiency of the conventional power flow are not only preserved but also improved.
Study of the dielectric and ferroelectric properties of chemically processed BaxSr1-xTiO3 thin films
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Polycrystalline BaxSr1-xTiO3 (x = 0.4 and 0.8) thin films with a perovskite structure were prepared by the polymeric precursor method on a platinum-coated silicon substrate. High-quality thin films with uniform composition and thickness were successfully produced by dip-coating and spin-coating techniques. The resulting thin films prepared by dip and spin-coating showed a well-developed dense polycrystalline structure with uniform grain size distribution. The metal-BST-metal structure of the thin films displays good dielectric and ferroelectric properties. The ferroelectric nature to BaxSr1-xTiO3 (x = 0.8) thin film, indicated by butterfly-shaped C-V curves and confirmed by the hysteresis curve, showed 2P(r) = 5.0 muC/cm(2) and E-c = 20 kV/cm. The capacitance-frequency curve reveals that the dielectric constant may reach a value of up to 794 at 1 kHz. on the other hand, the BaxSr1-xTiO3 (x = 0.4) thin films had paraelectric nature and dielectric constant and the dissipation factor at a frequency of 100 kHz were 680 and 0.01, respectively, for film annealed at 700 degreesC. In addition, an examination of the film's I-V curve at room temperature revealed the presence of two conduction regions in the BaxSr1-xTiO3 (x = 0.4 and 0.8) thin films, showing ohmic-like behavior at low voltage and a Schottky-emission or Poole-Frenkel mechanism at high voltage. (C) 2001 Elsevier B.V. B.V. All rights reserved.
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Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)
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The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. To resolve this issue the industry is improving existing technologies such as Flash and exploring new ones. Among those new technologies is the Phase Change Memory (PCM), which overcomes some of the shortcomings of the Flash such as durability and scalability. This alternative non-volatile memory technology, which uses resistance contrast in phase-change materials, offers more density relative to DRAM, and can help to increase main memory capacity of future systems while remaining within the cost and power constraints. Chalcogenide materials can suitably be exploited for manufacturing phase-change memory devices. Charge transport in amorphous chalcogenide-GST used for memory devices is modeled using two contributions: hopping of trapped electrons and motion of band electrons in extended states. Crystalline GST exhibits an almost Ohmic I(V) curve. In contrast amorphous GST shows a high resistance at low biases while, above a threshold voltage, a transition takes place from a highly resistive to a conductive state, characterized by a negative differential-resistance behavior. A clear and complete understanding of the threshold behavior of the amorphous phase is fundamental for exploiting such materials in the fabrication of innovative nonvolatile memories. The type of feedback that produces the snapback phenomenon is described as a filamentation in energy that is controlled by electron–electron interactions between trapped electrons and band electrons. The model thus derived is implemented within a state-of-the-art simulator. An analytical version of the model is also derived and is useful for discussing the snapback behavior and the scaling properties of the device.