953 resultados para CIRCUIT
Resumo:
This paper proposes two methods to improve the modelling of thin film transistors (TFTs). The first involves integrating Poissons equation numerically, given a density of trap states and other relevant material parameters including a constant mobility. Theresult is conductance as a numerical function of gate voltage. The second method recognizes that the data for areal conductance found by numerical integration, may easily be found by measurement without making assumptions about the density of trap states.
Resumo:
This paper describes a unified approach to modelling the polysilicon thin film transistor (TFT) for the purposes of circuit design. The approach uses accurate methods of predicting the channel conductance and then fitting the resulting data with a polynomial. Two methods are proposed to find the channel conductance: a device model and measurement. The approach is suitable because the TFT does not have a well defined threshold voltage. The polynomial conductance is then integrated generally to find the drain current and channel charge, necessary for a complete circuit model. © 1991 The Japan Society of Applied Physics.
Resumo:
The GTO model presented in this paper uses analytical expressions to describe the internal physics of the device. It has been implemented to run as compiled code in the SPICE simulation package and as a MAST template in the Saber simulator. A rigorous comparison of measured simulated waveforms and performance parameters (including turn-off energies) for a 3000A device is described and discussed.
Resumo:
This paper presents a time-stepping shaker modeling scheme. The new method improves the accuracy of analysis of armature-position-dependent inductances and force factors, analysis of axial variation of current density in copper plates (short-circuited turns), and analysis of cooling holes in the magnetic circuit. Linear movement modeling allows armature position to be precisely included in the shaker analysis. A more accurate calculation of eddy currents in the coupled circuit is in particular crucial for the shaker analysis in a mid-or high-frequency operation range. Large currents in a shaker, including eddy currents, incur large Joule losses, which in turn require the use of a cooling system to keep temperature at bay. Sizable cooling holes have influence on the saturation state of iron poles, and hence have to be properly taken into account.
Resumo:
This paper presents a practical destruction-free parameter extraction methodology for a new physics-based circuit simulator buffer-layer Integrated Gate Commutated Thyristor (IGCT) model. Most key parameters needed for this model can be extracted by one simple clamped inductive-load switching experiment. To validate this extraction method, a clamped inductive load switching experiment was performed, and corresponding simulations were carried out by employing the IGCT model with parameters extracted through the presented methodology. Good agreement has been obtained between the experimental data and simulation results.