356 resultados para nanowire transistor


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A new integrated mathematical model for the simulation of offshore wind energy conversion system performance is presented in this paper. The mathematical model considers an offshore variable-speed turbine in deep water equipped with a permanent magnet synchronous generator using full-power two-level converter, converting the energy of a variable frequency source in injected energy into the electric network with constant frequency, through a high voltage DC transmission submarine cable. The mathematical model for the drive train is a concentrate two mass model which incorporates the dynamic for the structure and tower due to the need to emulate the effects of the moving surface. Controller strategy considered is a proportional integral one. Also, pulse width modulation using space vector modulation supplemented with sliding mode is used for trigger the transistor of the converter. Finally, a case study is presented to access the system performance. © 2014 IEEE.

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IEEE Electron Device Letters, VOL. 29, NO. 9,

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Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Electrónica Industrial

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Thesis presented in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the subject of Electrical and Computer Engineering by the Universidade Nova de Lisboa,Faculdade de Ciências e Tecnologia

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Dissertação para obtenção do Grau de Mestre em Engenharia Eletrotécnica e Computadores

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In this work, cellulose-based electro and ionic conductive composites were developed for application in cellulose based printed electronics. Electroconductive inks were successfully formulated for screen-printing using carbon fibers (CFs) and multi-walled carbon nanotubes (MWCNTs) as conductive functional material and cellulose derivatives working as binder. The formulated inks were used to fabricate conductive flexible and disposable electrodes on paper-based substrates. Interesting results were obtained after 10 printing passes and drying at RT of the ink with 10 % wt. of pristine CFs and 3% wt. of carboxymethyl cellulose (CMC), exhibiting a resistivity of 1.03 Ωcm and a resolution of 400 μm. Also, a resistivity of 0.57 Ωcm was obtained for only one printing pass using an ink based on 0.5 % wt. MWCNTs and 3 % wt. CMC. It was also demonstrated that ionic conductive cellulose matrix hydrogel can be used in electrolyte-gated transistors (EGTs). The electrolytes revealed a double layer capacitance of 12.10 μFcm-2 and ionic conductivity of 3.56x10-7 Scm-1. EGTs with a planar configuration, using sputtered GIZO as semiconducting layer, reached an ON/OFF ratio of 3.47x105, a VON of 0.2 V and a charge carrier mobility of 2.32 cm2V-1s-1.

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This work reports the development of field-effect transistors (FETs), whose channel is based on zinc oxide (ZnO) nanoparticles (NPs). Using screen-printing as the primary deposition technique, different inks were developed, where the semiconducting ink is based on a ZnO NPs dispersion in ethyl cellulose (EC). These inks were used to print electrolyte-gated transistors (EGTs) in a staggered-top gate structure on glass substrates, using a lithium-based polymeric electrolyte. In another approach, FETs with a staggered-bottom gate structure on paper were developed using a sol-gel method to functionalize the paper’s surface with ZnO NPs, using zinc acetate dihydrate (ZnC4H6O4·2H2O) and sodium hydroxide (NaOH) as precursors. In this case, the paper itself was used as dielectric. The various layers of the two devices were characterized using X-ray diffraction (XRD), scanning electron microscopy (SEM), Fourier Transform Infrared spectroscopy (FTIR), thermogravimetric and differential scanning calorimetric analyses (TG-DSC). Electrochemical impedance spectroscopy (EIS) was used in order to evaluate the electric double-layer (EDL) formation, in the case of the EGTs. The ZnO NPs EGTs present electrical modulation for annealing temperatures equal or superior to 300 ºC and in terms of electrical properties they showed On/Off ratios in the order of 103, saturation mobilities (μSat) of 1.49x10-1 cm2(Vs)-1 and transconductance (gm) of 10-5 S. On the other hand, the ZnO NPs FETs on paper exhibited On/Off ratios in the order of 102, μSat of 4.83x10- 3 cm2(Vs)-1and gm around 10-8 S.

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Dissertação de mestrado integrado em Engenharia Electrónica Industrial e Computadores

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Los eventos transitorios únicos analógicos (ASET, Analog Single Event Transient) se producen debido a la interacción de un ión pesado o un protón de alta energía con un dispositivo sensible de un circuito analógico. La interacción del ión con un transistor bipolar o de efecto de campo MOS induce pares electrón-hueco que provocan picos que pueden propagarse a la salida del componente analógico provocando transitorios que pueden inducir fallas en el nivel sistema. Los problemas más graves debido a este tipo de fenómeno se dan en el medioambiente espacial, muy rico en iones pesados. Casos típicos los constituyen las computadoras de a bordo de satélites y otros artefactos espaciales. Sin embargo, y debido a la continua contracción de dimensiones de los transistores (que trae aparejado un aumento de sensibilidad), este fenómeno ha comenzado a observarse a nivel del mar, provocado fundamentalmente por el impacto de neutrones atmosféricos. Estos efectos pueden provocar severos problemas a los sistemas informáticos con interfaces analógicas desde las que obtienen datos para el procesamiento y se han convertido en uno de los problemas más graves a los que tienen que hacer frente los diseñadores de sistemas de alta escala de integración. Casos típicos son los Sistemas en Chip que incluyen módulos de procesamiento de altas prestaciones como las interfaces analógicas.El proyecto persigue como objetivo general estudiar la susceptibilidad de sistemas informáticos a ASETs en sus secciones analógicas, proponiendo estrategias para la mitigación de los errores.Como objetivos específicos se pretende: -Proponer nuevos modelos de ASETs basados en simulaciones en el nivel dispositivo y resueltas por el método de elementos finitos.-Utilizar los modelos para identificar las secciones más propensas a producir errores y consecuentemente para ser candidatos a la aplicación de técnicas de endurecimiento a radiaciones.-Utilizar estos modelos para estudiar la naturaleza de los errores producidos en sistemas de procesamiento de datos.-Proponer soluciones novedosas para la mitigación de estos efectos en los mismos circuitos analógicos evitando su propagación a las secciones digitales.-Proponer soluciones para la mitigación de los efectos en el nivel sistema.Para llevar a cabo el proyecto se plantea un procedimiento ascendente para las investigaciones a realizar, comenzando por descripciones en el nivel físico para posteriormente aumentar el nivel de abstracción en el que se encuentra modelado el circuito. Se propone el modelado físico de los dispositivos MOS y su resolución mediante el Método de Elementos Finitos. La inyección de cargas en las zonas sensibles de los modelos permitirá determinar los perfiles de los pulsos de corriente que deben inyectarse en el nivel circuito para emular estos efectos. Estos procedimientos se realizarán para los distintos bloques constructivos de las interfaces analógicas, proponiendo estrategias de mitigación de errores en diferentes niveles.Los resultados esperados del presente proyecto incluyen hardware para detección de errores y tolerancia a este tipo de eventos que permitan aumentar la confiabilidad de sistemas de tratamiento de la información, así como también nuevos datos referentes a efectos de la radiación en semiconductores, nuevos modelos de fallas transitorias que permitan una simulación de estos eventos en el nivel circuito y la determinación de zonas sensibles de interfaces analógicas típicas que deben ser endurecidas para radiación.

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En la actualidad, la gran cantidad de aplicaciones que surgen dentro del ámbito de la radiofrecuencia hacen que el desarrollo de dispositivos dentro de este campo sea constante. Estos dispositivos cada vez requieren mayor potencia para frecuencias de trabajo elevadas, lo que sugiere abrir vías de investigación sobre dispositivos de potencia que ofrezcan los resultados deseados para altas frecuencias de operación (GHz). Dentro de este ámbito, el objetivo principal de este proyecto es el de realizar un estudio sobre este tipo de dispositivos, siendo el transistor LDMOS el candidato elegido para tal efecto, debido a su buen comportamiento en frecuencia para tensiones elevadas de funcionamiento.

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Report for the scientific sojourn carried out at the Paul Drude Institut für Festkörperelektronik of the Stanford University, USA, from 2010 to 2012. The objective of this project is the transport and control of electronic charge and spin along GaAs-based semiconductor heterostructures. The electronic transport has been achieved by taking advantage of the piezolectric field induced by surface acoustic waves in non-centrosymmetric materials like GaAs. This piezolectric field separates photogenerated electrons and holes at different positions along the acoustic wave, where they acummulate and are transported at the same velocity as the wave. Two different kinds of structures have been studied: quantum wells grown along the (110) direction, both intrinsic and n-doped, as well as GaAs nanowires. The analysis of the charge acoustic transport was performed by micro-photoluminescence, whereas the detection of the spin transport was done either by analyzing the polarization state of the emitted photoluminescence or by Kerr reflectometry. Our results in GaAs quantum wells show that charge and spin transport is clearly observed at the non-doped structures,obtaining spin lifetimes of the order of several nanoseconds, whereas no acoutically induced spin transport was detected for the n-doped quantum wells. In the GaAs nanowires, we were able of transporting successfully both electrons and holes along the nanowire axis, but no conservation of the spin polarization has been observed until now. The photoluminescence emitted by these structures after acoustic transport, however, shows anti-bunching characteristics, making this system a very good candidate for its use as single photon emitters.

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The occurrence of heterostructures of cubic silicon/hexagonal silicon as disks defined along the nanowire (111) growth direction is reviewed in detail for Si nanowires obtained using Cu as catalyst. Detailed measurements on the structural properties of both semiconductor phases and their interface are presented. We observe that during growth, lamellar twinning on the cubic phase along the (111) direction is generated. Consecutive presence of twins along the (111) growth direction was found to be correlated with the origin of the local formation of the hexagonal Si segments along the nanowires, which define quantum wells of hexagonal Si diamond. Finally, we evaluate and comment on the consequences of the twins and wurtzite in the final electronic properties of the wires with the help of the predicted energy band diagram.

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Defects in SnO2 nanowires have been studied by cathodoluminescence, and the obtained spectra have been compared with those measured on SnO2 nanocrystals of different sizes in order to reveal information about point defects not determined by other characterization techniques. Dependence of the luminescence bands on the thermal treatment temperatures and pre-treatment conditions have been determined pointing out their possible relation, due to the used treatment conditions, with the oxygen vacancy concentration. To explain these cathodoluminescence spectra and their behavior, a model based on first-principles calculations of the surface oxygen vacancies in the different crystallographic directions is proposed for corroborating the existence of surface state bands localized at energy values compatible with the found cathodoluminescence bands and with the gas sensing mechanisms. CL bands centered at 1.90 and 2.20 eV are attributed to the surface oxygen vacancies 100° coordinated with tin atoms, whereas CL bands centered at 2.37 and 2.75 eV are related to the surface oxygen vacancies 130° coordinated. This combined process of cathodoluminescence and ab initio calculations is shown to be a powerful tool for nanowire defect analysis.

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We propose a light emitting transistor based on silicon nanocrystals provided with 200 Mbits/ s built-in modulation. Suppression of electroluminescence from silicon nanocrystals embedded into the gate oxide of a field effect transistor is achieved by fast Auger quenching. In this process, a modulating drain signal causes heating of carriers in the channel and facilitates the charge injection into the nanocrystals. This excess of charge enables fast nonradiative processes that are used to obtain 100% modulation depths at modulating voltages of 1 V.

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The study of the thermal behavior of complex packages as multichip modules (MCM¿s) is usually carried out by measuring the so-called thermal impedance response, that is: the transient temperature after a power step. From the analysis of this signal, the thermal frequency response can be estimated, and consequently, compact thermal models may be extracted. We present a method to obtain an estimate of the time constant distribution underlying the observed transient. The method is based on an iterative deconvolution that produces an approximation to the time constant spectrum while preserving a convenient convolution form. This method is applied to the obtained thermal response of a microstructure as analyzed by finite element method as well as to the measured thermal response of a transistor array integrated circuit (IC) in a SMD package.