Estudo dos mecanismos governantes do efeito de escala na microusinagem

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Desenvolvimento de um monitor de vibrações utilizando sensores de tecnologia micro-eletromecânica - MEMS

Pós-graduação em Engenharia Mecânica - FEG

Estrutura e propriedades de filmes finos ferroelétricos do sistema PZT

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Apoptose, microinflamação e expressão de receptores de hidrocarboneto arílico nos folículos pilosos de pacientes com alopecia de padrão feminino

Pós-graduação em Patologia - FMB

Sensores ópticos para quantificação de sulfeto de hidrogênio em matrizes gasosas por espectrometria de floorescênica do UV-visível e espectroscopia de absorção no infravermelho: João Flávio da Silveira Petruci. -

Pós-graduação em Química - IQ

Real-time monitoring of ozone in air using substrate-integrated hollow waveguide mid-infrared sensors

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Monitoring of hydrogen sulfide via substrate-integrated hollow waveguide mid-infrared sensors in real-time

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Desenvolvimento de filmes finos de Bi3NbO7 pelo método dos precursores poliméricos em diferentes eletrodos óxidos

Technology always advances and thus the device miniaturization and improved performance, besides multifunctionality, they become extremely necessary. A wave of research on the area tends to grow in number and importance in today's market, it is necessary to search for new materials, new applicability of the existing ones and new processes for increasingly cheaper costs. Dielectric materials are considered a key element in this sector being the main electrical properties its high dielectric constant and low dielectric loss. The Polymeric Precursor Method appears as a good alternative because is a low cost, simple process with controlled stoichiometry. In this method, two steps were performed. In a first step, the precursor solution was decomposed into powders and in a second step the precursor solution was converted in thin films. In this work, was used the polymeric precursor methods to get thin films where they were heat treated and characterized by XRD, SEM and AFM. We have obtained Bi3NbO7 thin films with good homogeneity and uniform distribution of grains were noted. We observed that the best condition to obtain the tetragonal phase is annealing the film at high temperatures for a longer soaking time and with excess of bismuth. Several oxides electrodes were evaluated aiming to obtain textured dielectric thin films

Diversidade, distribuição e diversificação do gênero Brachycephalus Fitzinger, 1826 (Anura: Brachycephalidae)

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Síntese de nanopartículas de sulfeto de cobre, preparação e estabilidade coloidal de fluidos trocadores de calor em meio aquoso

Pós-graduação em Química - IQ

iCONVERT: an integrated device for the UV-assisted determination of H2S via mid-infrared gas sensors

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)

Study of Micro Rotary Ultrasonic Machining

Product miniaturization for applications in fields such as biotechnology, medical devices, aerospace, optics and communications has made the advancement of micromachining techniques essential. Machining of hard and brittle materials such as ceramics, glass and silicon is a formidable task. Rotary ultrasonic machining (RUM) is capable of machining these materials. RUM is a hybrid machining process which combines the mechanism of material removal of conventional grinding and ultrasonic machining. Downscaling of RUM for micro scale machining is essential to generate miniature features or parts from hard and brittle materials. The goal of this thesis is to conduct a feasibility study and to develop a knowledge base for micro rotary ultrasonic machining (MRUM). Positive outcome of the feasibility study led to a comprehensive investigation on the effect of process parameters. The effect of spindle speed, grit size, vibration amplitude, tool geometry, static load and coolant on the material removal rate (MRR) of MRUM was studied. In general, MRR was found to increase with increase in spindle speed, vibration amplitude and static load. MRR was also noted to depend upon the abrasive grit size and tool geometry. The behavior of the cutting forces was modeled using time series analysis. Being a vibration assisted machining process, heat generation in MRUM is low which is essential for bone machining. Capability of MRUM process for machining bone tissue was investigated. Finally, to estimate the MRR a predictive model was proposed. The experimental and the theoretical results exhibited a matching trend.

Trichomycterus anhanga, a new species of miniature catfish related to T. hasemani and T. johnsoni (Siluriformes: Trichomycteridae) from the Amazon basin, Brazil

Trichomycterus anhanga is described from the Amazon basin, northern Brazil. The species is diagnosed by the latero-sensory system which is restricted to LL1 and LL2, the pectoral fin with two branched rays, the absence of pelvic fins and girdle, the reduced jaws and pharyngeal dentition, the presence of six to seven interopercular odontodes, the absence of a lateral series of spots, the presence of a small dark spot on the ventral surface of the mandibular symphysis, the narrow comma-shaped palatine, the absence of procurrent rays anterior to the dorsal and anal fins, the position of insertion of the first dorsal-fin pterygiophore and the presence of a single pair of pleural ribs. Trichomycterus anhanga shares with T. hasemani and T. johnsoni a wide cranial fontanel which occupies most of the skull roof. Miniaturization as well as synapomorphies for the T. hasemani group are discussed.

Infraestructura polivalente basada en sensores inalámbricos aplicada a la monitorización medioambiental georreferenciada.

Máster Universitario en Sistemas Inteligentes y Aplicaciones Numéricas en Ingeniería (SIANI)

Memory hierarchy and data communication in heterogeneous reconfigurable SoCs

The miniaturization race in the hardware industry aiming at continuous increasing of transistor density on a die does not bring respective application performance improvements any more. One of the most promising alternatives is to exploit a heterogeneous nature of common applications in hardware. Supported by reconfigurable computation, which has already proved its efficiency in accelerating data intensive applications, this concept promises a breakthrough in contemporary technology development. Memory organization in such heterogeneous reconfigurable architectures becomes very critical. Two primary aspects introduce a sophisticated trade-off. On the one hand, a memory subsystem should provide well organized distributed data structure and guarantee the required data bandwidth. On the other hand, it should hide the heterogeneous hardware structure from the end-user, in order to support feasible high-level programmability of the system. This thesis work explores the heterogeneous reconfigurable hardware architectures and presents possible solutions to cope the problem of memory organization and data structure. By the example of the MORPHEUS heterogeneous platform, the discussion follows the complete design cycle, starting from decision making and justification, until hardware realization. Particular emphasis is made on the methods to support high system performance, meet application requirements, and provide a user-friendly programmer interface. As a result, the research introduces a complete heterogeneous platform enhanced with a hierarchical memory organization, which copes with its task by means of separating computation from communication, providing reconfigurable engines with computation and configuration data, and unification of heterogeneous computational devices using local storage buffers. It is distinguished from the related solutions by distributed data-flow organization, specifically engineered mechanisms to operate with data on local domains, particular communication infrastructure based on Network-on-Chip, and thorough methods to prevent computation and communication stalls. In addition, a novel advanced technique to accelerate memory access was developed and implemented.